[5.16,0/3] Support for Ingenic JZ47xx SPI controller

Hi,

This patchset introduces support for SPI controllers found in the
Ingenic JZ47xx family of SoCs. Of particular note, this allows to
replace GPIO backed SPI on the MIPS Creator CI20 board. 

Mark:
Checkpatch generates a `need consistent spacing around '*'` error on
this patchset, however I believe this is a false positive due to it
confusing a pointer with multiplication operator inside a macro.

Rob:
I refrained from adding SPI pin groups into the bindings, as I felt that
would be enforcing a policy (SPI signals can be multiplexed on multiple
pin groups on the board, per use case). Instead, I included an example
pin configuration into the relevant commit description.

Other controllers already present in ci20.dts do specify their pin
groups, but I think this is bad practice. Do you have particular
guidelines on this?

Pavel:
Feel free to add your Tested-by, if you still have your CI20 setup
around :) I tested this driver with two SPI mode MMC/SD card readers and
also with the spi-loopback test driver. 

Cheers,
Artur

Artur Rojek (2):
  SPI: add Ingenic JZ47xx driver.
  MIPS: JZ4780: CI20: DTS: add SPI controller config

Paul Cercueil (1):
  dt-bindings: spi: Document Ingenic SPI controller bindings

 .../devicetree/bindings/spi/ingenic,spi.yaml  |  72 +++
 arch/mips/boot/dts/ingenic/ci20.dts           |   9 +-
 arch/mips/boot/dts/ingenic/jz4780.dtsi        |  44 +-
 drivers/spi/Kconfig                           |   9 +
 drivers/spi/Makefile                          |   1 +
 drivers/spi/spi-ingenic.c                     | 482 ++++++++++++++++++
 6 files changed, 602 insertions(+), 15 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/spi/ingenic,spi.yaml
 create mode 100644 drivers/spi/spi-ingenic.c

On 2021-08-31 01:01, Artur Rojek wrote:
> From: Paul Cercueil <paul@crapouillou.net>
> 
> Add a documentation file to describe the Device Tree bindings for the
> SPI controller found in Ingenic SoCs.
> 
> Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Woops, forgot to add my --signoff for this patch:

Signed-off-by: Artur Rojek <contact@artur-rojek.eu>

Cheers,
Artur
> ---
>  .../devicetree/bindings/spi/ingenic,spi.yaml  | 72 +++++++++++++++++++
>  1 file changed, 72 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/spi/ingenic,spi.yaml
> 
> diff --git a/Documentation/devicetree/bindings/spi/ingenic,spi.yaml
> b/Documentation/devicetree/bindings/spi/ingenic,spi.yaml
> new file mode 100644
> index 000000000000..cf56cc484b19
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/spi/ingenic,spi.yaml
> @@ -0,0 +1,72 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/spi/ingenic,spi.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Ingenic SoCs SPI controller devicetree bindings
> +
> +maintainers:
> +  - Artur Rojek <contact@artur-rojek.eu>
> +  - Paul Cercueil <paul@crapouillou.net>
> +
> +allOf:
> +  - $ref: /schemas/spi/spi-controller.yaml#
> +
> +properties:
> +  compatible:
> +    oneOf:
> +      - enum:
> +          - ingenic,jz4750-spi
> +          - ingenic,jz4780-spi
> +      - items:
> +          - enum:
> +              - ingenic,jz4760-spi
> +              - ingenic,jz4770-spi
> +          - const: ingenic,jz4750-spi
> +
> +  reg:
> +    maxItems: 1
> +
> +  interrupts:
> +    maxItems: 1
> +
> +  clocks:
> +    maxItems: 1
> +
> +  dmas:
> +    maxItems: 2
> +    minItems: 2
> +
> +  dma-names:
> +    items:
> +      - const: rx
> +      - const: tx
> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts
> +  - clocks
> +  - dmas
> +  - dma-names
> +
> +unevaluatedProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/clock/jz4770-cgu.h>
> +    spi@10043000 {
> +      compatible = "ingenic,jz4770-spi", "ingenic,jz4750-spi";
> +      reg = <0x10043000 0x1c>;
> +      #address-cells = <1>;
> +      #size-cells = <0>;
> +
> +      interrupt-parent = <&intc>;
> +      interrupts = <8>;
> +
> +      clocks = <&cgu JZ4770_CLK_SSI0>;
> +
> +      dmas = <&dmac1 23 0xffffffff>, <&dmac1 22 0xffffffff>;
> +      dma-names = "rx", "tx";
> +    };

On Tue, 31 Aug 2021 01:01:36 +0200, Artur Rojek wrote:
> This patchset introduces support for SPI controllers found in the
> Ingenic JZ47xx family of SoCs. Of particular note, this allows to
> replace GPIO backed SPI on the MIPS Creator CI20 board.
> 
> Mark:
> Checkpatch generates a `need consistent spacing around '*'` error on
> this patchset, however I believe this is a false positive due to it
> confusing a pointer with multiplication operator inside a macro.
> 
> [...]

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next

Thanks!

[1/3] dt-bindings: spi: Document Ingenic SPI controller bindings
      commit: ff4daa7dd7e624a989dc882f7dcce6d8818b1036
[2/3] SPI: add Ingenic JZ47xx driver.
      commit: ae5f94cc00a7fdce830fd4bfe7a8c77ae7704666
[3/3] MIPS: JZ4780: CI20: DTS: add SPI controller config
      commit: 7b3fd8109b5d343b535e796328223b4f1c4aff5c

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark