| Message ID | 20210826123844.8464-1-yifeng.zhao@rock-chips.com |
|---|---|
| Headers | show |
| Series | | expand |
On Thu, 26 Aug 2021 20:38:42 +0800, Yifeng Zhao wrote: > Add the compatible strings for the Naneng combo PHY found on rockchip SoC. > > Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com> > --- > > .../phy/phy-rockchip-naneng-combphy.yaml | 100 ++++++++++++++++++ > 1 file changed, 100 insertions(+) > create mode 100644 Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.yaml > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.example.dt.yaml:0:0: /example-0/syscon@fdc50000: failed to match any schema with compatible: ['rockchip,rk3568-pipegrf', 'syscon'] Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.example.dt.yaml:0:0: /example-0/syscon@fdc70000: failed to match any schema with compatible: ['rockchip,pipe-phy-grf', 'syscon'] doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/patch/1521096 This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit.
On Thu, Aug 26, 2021 at 8:42 AM Yifeng Zhao <yifeng.zhao@rock-chips.com> wrote: > > Add Naneng combo PHY support for RK3568 > > This phy can be used as pcie-phy, usb3-phy, sata-phy or sgmii-phy. Good Afternoon, Some feedback on this driver, for when you resend it to the mailing list. I'm sending this against the cover letter since the mailing list doesn't have the actual driver. The driver doesn't work out of the box, you renamed the clocks but missed one use point. There's a lot of "magic numbers" that need to be defined. Configuration could use some cleanup. A parallel problem, if the PCIe phy fails to probe (because of the aforementioned clock issue) the PCIe controller hard locks the board during probe. I look forward to version two. Very Respectfully, Peter Geis > > > > Yifeng Zhao (3): > dt-bindings: phy: rockchip: Add Naneng combo PHY bindings > phy/rockchip: add naneng combo phy for RK3568 > arm64: dts: rockchip: add naneng combo phy nodes for rk3568 > > .../phy/phy-rockchip-naneng-combphy.yaml | 100 +++ > arch/arm64/boot/dts/rockchip/rk356x.dtsi | 68 ++ > drivers/phy/rockchip/Kconfig | 8 + > drivers/phy/rockchip/Makefile | 1 + > .../rockchip/phy-rockchip-naneng-combphy.c | 646 ++++++++++++++++++ > 5 files changed, 823 insertions(+) > create mode 100644 Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.yaml > create mode 100644 drivers/phy/rockchip/phy-rockchip-naneng-combphy.c > > -- > 2.17.1 > > > > > _______________________________________________ > Linux-rockchip mailing list > Linux-rockchip@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-rockchip