| Message ID | 20210819152552.23784-1-zajec5@gmail.com |
|---|---|
| State | New |
| Headers | show |
| Series | dt-bindings: mfd: add Broadcom's MISC block | expand |
On 8/19/2021 5:25 PM, Rafał Miłecki wrote: > From: Rafał Miłecki <rafal@milecki.pl> > > Broadcom's MISC is an MFD hardware block used on some of their SoCs like > bcm63xx and bcm4908. At this point only PCIe reset is fully understood > and documented. More functions may be added later. > > Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Acked-by: Florian Fainelli <f.fainelli@gmail.com> -- Florian
On Thu, 19 Aug 2021 17:25:52 +0200, Rafał Miłecki wrote: > From: Rafał Miłecki <rafal@milecki.pl> > > Broadcom's MISC is an MFD hardware block used on some of their SoCs like > bcm63xx and bcm4908. At this point only PCIe reset is fully understood > and documented. More functions may be added later. > > Signed-off-by: Rafał Miłecki <rafal@milecki.pl> > --- > Broadcom's BCM4908 struct with MISC block registers: > > typedef struct Misc { > uint32 miscStrapBus; /* 0x00 */ > uint32 miscStrapOverride; /* 0x04 */ > uint32 miscSoftwareDebug[6]; /* 0x08 */ > uint32 miscWDResetCtrl; /* 0x20 */ > uint32 miscSoftwareDebugNW[2];/* 0x24 */ > uint32 miscSoftResetB; /* 0x2c */ > uint32 miscQAMPllStatus; /* 0x30 */ > uint32 miscRsvd1; /* 0x34 */ > uint32 miscSpiMasterCtrl; /* 0x38 */ > uint32 miscAltBootVector; /* 0x3c */ > uint32 miscPeriphCtrl; /* 0x40 */ > uint32 miscPCIECtrl; /* 0x44 */ > uint32 miscAdsl_clock_sample; /* 0x48 */ > uint32 miscRngCtrl; /* 0x4c */ > uint32 miscMbox_data[4]; /* 0x50 */ > uint32 miscMbox_ctrl; /* 0x60 */ > uint32 miscxMIIPadCtrl[4]; /* 0x64 */ > uint32 miscxMIIPullCtrl[4]; /* 0x74 */ > uint32 miscWDResetEn; /* 0x84 */ > uint32 miscBootOverlayEn; /* 0x88 */ > uint32 miscSGMIIFiberDetect; /* 0x8c */ > uint32 miscUniMacCtrl; /* 0x90 */ > uint32 miscMaskUBUSErr; /* 0x94 */ > uint32 miscTOSsync; /* 0x98 */ > uint32 miscPM0_1_status; /* 0x9c */ > uint32 miscPM2_3_status; /* 0xa0 */ > uint32 miscSGB_status; /* 0xa4 */ > uint32 miscPM0_1_config; /* 0xa8 */ > uint32 miscPM2_3_config; /* 0xac */ > uint32 miscSGB_config; /* 0xb0 */ > uint32 miscPM0_1_tmon_config; /* 0xb4 */ > uint32 miscPM2_3_tmon_config; /* 0xb8 */ > uint32 miscSGB_tmon_config; /* 0xbc */ > uint32 miscMDIOmasterSelect; /* 0xc0 */ > uint32 miscUSIMCtrl; /* 0xc4 */ > uint32 miscUSIMPadCtrl; /* 0xc8 */ > uint32 miscPerSpareReg[3]; /* 0xcc - 0xd4 */ > uint32 miscDgSensePadCtrl; /* 0xd8 */ > uint32 miscPeriphMiscCtrl; /* 0xdc */ > uint32 miscPeriphMiscStat; /* 0xe0 */ > } Misc; > --- > .../devicetree/bindings/mfd/brcm,misc.yaml | 60 +++++++++++++++++++ > 1 file changed, 60 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mfd/brcm,misc.yaml > Reviewed-by: Rob Herring <robh@kernel.org>
On Thu, 19 Aug 2021, Rafał Miłecki wrote: > From: Rafał Miłecki <rafal@milecki.pl> > > Broadcom's MISC is an MFD hardware block used on some of their SoCs like > bcm63xx and bcm4908. At this point only PCIe reset is fully understood > and documented. More functions may be added later. > > Signed-off-by: Rafał Miłecki <rafal@milecki.pl> > --- > Broadcom's BCM4908 struct with MISC block registers: > > typedef struct Misc { > uint32 miscStrapBus; /* 0x00 */ > uint32 miscStrapOverride; /* 0x04 */ > uint32 miscSoftwareDebug[6]; /* 0x08 */ > uint32 miscWDResetCtrl; /* 0x20 */ > uint32 miscSoftwareDebugNW[2];/* 0x24 */ > uint32 miscSoftResetB; /* 0x2c */ > uint32 miscQAMPllStatus; /* 0x30 */ > uint32 miscRsvd1; /* 0x34 */ > uint32 miscSpiMasterCtrl; /* 0x38 */ > uint32 miscAltBootVector; /* 0x3c */ > uint32 miscPeriphCtrl; /* 0x40 */ > uint32 miscPCIECtrl; /* 0x44 */ > uint32 miscAdsl_clock_sample; /* 0x48 */ > uint32 miscRngCtrl; /* 0x4c */ > uint32 miscMbox_data[4]; /* 0x50 */ > uint32 miscMbox_ctrl; /* 0x60 */ > uint32 miscxMIIPadCtrl[4]; /* 0x64 */ > uint32 miscxMIIPullCtrl[4]; /* 0x74 */ > uint32 miscWDResetEn; /* 0x84 */ > uint32 miscBootOverlayEn; /* 0x88 */ > uint32 miscSGMIIFiberDetect; /* 0x8c */ > uint32 miscUniMacCtrl; /* 0x90 */ > uint32 miscMaskUBUSErr; /* 0x94 */ > uint32 miscTOSsync; /* 0x98 */ > uint32 miscPM0_1_status; /* 0x9c */ > uint32 miscPM2_3_status; /* 0xa0 */ > uint32 miscSGB_status; /* 0xa4 */ > uint32 miscPM0_1_config; /* 0xa8 */ > uint32 miscPM2_3_config; /* 0xac */ > uint32 miscSGB_config; /* 0xb0 */ > uint32 miscPM0_1_tmon_config; /* 0xb4 */ > uint32 miscPM2_3_tmon_config; /* 0xb8 */ > uint32 miscSGB_tmon_config; /* 0xbc */ > uint32 miscMDIOmasterSelect; /* 0xc0 */ > uint32 miscUSIMCtrl; /* 0xc4 */ > uint32 miscUSIMPadCtrl; /* 0xc8 */ > uint32 miscPerSpareReg[3]; /* 0xcc - 0xd4 */ > uint32 miscDgSensePadCtrl; /* 0xd8 */ > uint32 miscPeriphMiscCtrl; /* 0xdc */ > uint32 miscPeriphMiscStat; /* 0xe0 */ > } Misc; > --- > .../devicetree/bindings/mfd/brcm,misc.yaml | 60 +++++++++++++++++++ > 1 file changed, 60 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mfd/brcm,misc.yaml Applied, thanks. -- Lee Jones [李琼斯] Senior Technical Lead - Developer Services Linaro.org │ Open source software for Arm SoCs Follow Linaro: Facebook | Twitter | Blog
diff --git a/Documentation/devicetree/bindings/mfd/brcm,misc.yaml b/Documentation/devicetree/bindings/mfd/brcm,misc.yaml new file mode 100644 index 000000000000..cff7d772a7db --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/brcm,misc.yaml @@ -0,0 +1,60 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/brcm,misc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom's MISC block + +maintainers: + - Rafał Miłecki <rafal@milecki.pl> + +description: | + Broadcom's MISC is a hardware block used on some SoCs (e.g. bcm63xx and + bcm4908). It's used to implement some simple functions like a watchdog, PCIe + reset, UniMAC control and more. + +properties: + compatible: + items: + - const: brcm,misc + - const: simple-mfd + + reg: + description: MISC block registers + + ranges: true + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + +patternProperties: + '^reset-controller@[a-f0-9]+$': + $ref: ../reset/brcm,bcm4908-misc-pcie-reset.yaml + +additionalProperties: false + +required: + - reg + - '#address-cells' + - '#size-cells' + +examples: + - | + misc@ff802600 { + compatible = "brcm,misc", "simple-mfd"; + reg = <0xff802600 0xe4>; + + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0xe4>; + + reset-controller@44 { + compatible = "brcm,bcm4908-misc-pcie-reset"; + reg = <0x44 0x4>; + #reset-cells = <1>; + }; + };