| Message ID | 20210811123336.31357-1-kishon@ti.com |
|---|---|
| Headers | show |
| Series | PCI: Add support for J7200 and AM64 | expand |
Hi Lorenzo, On 11/08/21 6:03 pm, Kishon Vijay Abraham I wrote: > This series adds the compatible specific to J7200 and AM64 and > applies the erratas and configuration specific to them. > > This series also includes Nadeem's patch that adds a quirk in > Cadence driver which is used by J7200 [1]. > > The DT binding for both J7200 and AM64 is already merged. > > v1 of the patch series can be found at [2] > v2 of the patch series can be found at [3] Gentle ping on this series. I've dropped "misc: pci_endpoint_test: Do not request or allocate IRQs in probe" [A] from the previous version of the series which you had concerns with. [A] -> http://lore.kernel.org/r/02c1ddb7-539e-20a0-1bef-e10e76922a0e@ti.com Thanks Kishon > > Changes from v2: > 1) Drop the patch that does not request or allocate IRQs in probe for > J721E/AM654 > 2) Fix other minor comments given by Lorenzo > > Changes from v1: > 1) As suggested by Bjorn, used unsigned int :1, instead of bool for > structure members > 2) Removed using unnecessary local variables and also fixed some > code alignment > > [1] -> https://lore.kernel.org/r/20210528155626.21793-1-nadeem@cadence.com > [2] -> https://lore.kernel.org/r/20210706105035.9915-1-kishon@ti.com > [3] -> https://lore.kernel.org/r/20210803074932.19820-1-kishon@ti.com > > Kishon Vijay Abraham I (4): > PCI: cadence: Use bitfield for *quirk_retrain_flag* instead of bool > PCI: j721e: Add PCIe support for J7200 > PCI: j721e: Add PCIe support for AM64 > misc: pci_endpoint_test: Add deviceID for AM64 and J7200 > > Nadeem Athani (1): > PCI: cadence: Add quirk flag to set minimum delay in LTSSM > Detect.Quiet state > > drivers/misc/pci_endpoint_test.c | 8 +++ > drivers/pci/controller/cadence/pci-j721e.c | 61 +++++++++++++++++-- > .../pci/controller/cadence/pcie-cadence-ep.c | 4 ++ > .../controller/cadence/pcie-cadence-host.c | 3 + > drivers/pci/controller/cadence/pcie-cadence.c | 16 +++++ > drivers/pci/controller/cadence/pcie-cadence.h | 17 +++++- > 6 files changed, 103 insertions(+), 6 deletions(-) >
On Thu, Aug 19, 2021 at 06:12:54PM +0530, Kishon Vijay Abraham I wrote: > Hi Lorenzo, > > On 11/08/21 6:03 pm, Kishon Vijay Abraham I wrote: > > This series adds the compatible specific to J7200 and AM64 and > > applies the erratas and configuration specific to them. > > > > This series also includes Nadeem's patch that adds a quirk in > > Cadence driver which is used by J7200 [1]. > > > > The DT binding for both J7200 and AM64 is already merged. > > > > v1 of the patch series can be found at [2] > > v2 of the patch series can be found at [3] > > Gentle ping on this series. > > I've dropped "misc: pci_endpoint_test: Do not request or allocate IRQs > in probe" [A] from the previous version of the series which you had > concerns with. > > [A] -> http://lore.kernel.org/r/02c1ddb7-539e-20a0-1bef-e10e76922a0e@ti.com Understood. The question is, how did you solve the issue that was forcing you to have that patch in place in the updated series. Thanks, Lorenzo > > Thanks > Kishon > > > > > Changes from v2: > > 1) Drop the patch that does not request or allocate IRQs in probe for > > J721E/AM654 > > 2) Fix other minor comments given by Lorenzo > > > > Changes from v1: > > 1) As suggested by Bjorn, used unsigned int :1, instead of bool for > > structure members > > 2) Removed using unnecessary local variables and also fixed some > > code alignment > > > > [1] -> https://lore.kernel.org/r/20210528155626.21793-1-nadeem@cadence.com > > [2] -> https://lore.kernel.org/r/20210706105035.9915-1-kishon@ti.com > > [3] -> https://lore.kernel.org/r/20210803074932.19820-1-kishon@ti.com > > > > Kishon Vijay Abraham I (4): > > PCI: cadence: Use bitfield for *quirk_retrain_flag* instead of bool > > PCI: j721e: Add PCIe support for J7200 > > PCI: j721e: Add PCIe support for AM64 > > misc: pci_endpoint_test: Add deviceID for AM64 and J7200 > > > > Nadeem Athani (1): > > PCI: cadence: Add quirk flag to set minimum delay in LTSSM > > Detect.Quiet state > > > > drivers/misc/pci_endpoint_test.c | 8 +++ > > drivers/pci/controller/cadence/pci-j721e.c | 61 +++++++++++++++++-- > > .../pci/controller/cadence/pcie-cadence-ep.c | 4 ++ > > .../controller/cadence/pcie-cadence-host.c | 3 + > > drivers/pci/controller/cadence/pcie-cadence.c | 16 +++++ > > drivers/pci/controller/cadence/pcie-cadence.h | 17 +++++- > > 6 files changed, 103 insertions(+), 6 deletions(-) > >
Hi Lorenzo, On 19/08/21 7:14 pm, Lorenzo Pieralisi wrote: > On Thu, Aug 19, 2021 at 06:12:54PM +0530, Kishon Vijay Abraham I wrote: >> Hi Lorenzo, >> >> On 11/08/21 6:03 pm, Kishon Vijay Abraham I wrote: >>> This series adds the compatible specific to J7200 and AM64 and >>> applies the erratas and configuration specific to them. >>> >>> This series also includes Nadeem's patch that adds a quirk in >>> Cadence driver which is used by J7200 [1]. >>> >>> The DT binding for both J7200 and AM64 is already merged. >>> >>> v1 of the patch series can be found at [2] >>> v2 of the patch series can be found at [3] >> >> Gentle ping on this series. >> >> I've dropped "misc: pci_endpoint_test: Do not request or allocate IRQs >> in probe" [A] from the previous version of the series which you had >> concerns with. >> >> [A] -> http://lore.kernel.org/r/02c1ddb7-539e-20a0-1bef-e10e76922a0e@ti.com > > Understood. The question is, how did you solve the issue that was > forcing you to have that patch in place in the updated series. That issue only prevents more than 5 pci-endpoint-test devices to be tested simultaneously. For the GIC ITS issue, I'm planning to post the workaround mentioned in the errata document. Errata ID #i2101 GIC: ITS Misbehavior (https://www.ti.com/lit/er/sprz455a/sprz455a.pdf). Also the GIC ITS issue is not present in J7200 and AM64 which this series is planning to address. It's present only in J721E and AM65. Thanks Kishon > > Thanks, > Lorenzo > >> >> Thanks >> Kishon >> >>> >>> Changes from v2: >>> 1) Drop the patch that does not request or allocate IRQs in probe for >>> J721E/AM654 >>> 2) Fix other minor comments given by Lorenzo >>> >>> Changes from v1: >>> 1) As suggested by Bjorn, used unsigned int :1, instead of bool for >>> structure members >>> 2) Removed using unnecessary local variables and also fixed some >>> code alignment >>> >>> [1] -> https://lore.kernel.org/r/20210528155626.21793-1-nadeem@cadence.com >>> [2] -> https://lore.kernel.org/r/20210706105035.9915-1-kishon@ti.com >>> [3] -> https://lore.kernel.org/r/20210803074932.19820-1-kishon@ti.com >>> >>> Kishon Vijay Abraham I (4): >>> PCI: cadence: Use bitfield for *quirk_retrain_flag* instead of bool >>> PCI: j721e: Add PCIe support for J7200 >>> PCI: j721e: Add PCIe support for AM64 >>> misc: pci_endpoint_test: Add deviceID for AM64 and J7200 >>> >>> Nadeem Athani (1): >>> PCI: cadence: Add quirk flag to set minimum delay in LTSSM >>> Detect.Quiet state >>> >>> drivers/misc/pci_endpoint_test.c | 8 +++ >>> drivers/pci/controller/cadence/pci-j721e.c | 61 +++++++++++++++++-- >>> .../pci/controller/cadence/pcie-cadence-ep.c | 4 ++ >>> .../controller/cadence/pcie-cadence-host.c | 3 + >>> drivers/pci/controller/cadence/pcie-cadence.c | 16 +++++ >>> drivers/pci/controller/cadence/pcie-cadence.h | 17 +++++- >>> 6 files changed, 103 insertions(+), 6 deletions(-) >>>
On Wed, 11 Aug 2021 18:03:31 +0530, Kishon Vijay Abraham I wrote: > This series adds the compatible specific to J7200 and AM64 and > applies the erratas and configuration specific to them. > > This series also includes Nadeem's patch that adds a quirk in > Cadence driver which is used by J7200 [1]. > > The DT binding for both J7200 and AM64 is already merged. > > [...] Applied to pci/cadence, thanks! [1/5] PCI: cadence: Use bitfield for *quirk_retrain_flag* instead of bool https://git.kernel.org/lpieralisi/pci/c/f4455748b2 [2/5] PCI: cadence: Add quirk flag to set minimum delay in LTSSM Detect.Quiet state https://git.kernel.org/lpieralisi/pci/c/09c24094b2 [3/5] PCI: j721e: Add PCIe support for J7200 https://git.kernel.org/lpieralisi/pci/c/f1de58802f [4/5] PCI: j721e: Add PCIe support for AM64 https://git.kernel.org/lpieralisi/pci/c/c8a375a8e1 [5/5] misc: pci_endpoint_test: Add deviceID for AM64 and J7200 https://git.kernel.org/lpieralisi/pci/c/7c52009d94 Thanks, Lorenzo
This series adds the compatible specific to J7200 and AM64 and applies the erratas and configuration specific to them. This series also includes Nadeem's patch that adds a quirk in Cadence driver which is used by J7200 [1]. The DT binding for both J7200 and AM64 is already merged. v1 of the patch series can be found at [2] v2 of the patch series can be found at [3] Changes from v2: 1) Drop the patch that does not request or allocate IRQs in probe for J721E/AM654 2) Fix other minor comments given by Lorenzo Changes from v1: 1) As suggested by Bjorn, used unsigned int :1, instead of bool for structure members 2) Removed using unnecessary local variables and also fixed some code alignment [1] -> https://lore.kernel.org/r/20210528155626.21793-1-nadeem@cadence.com [2] -> https://lore.kernel.org/r/20210706105035.9915-1-kishon@ti.com [3] -> https://lore.kernel.org/r/20210803074932.19820-1-kishon@ti.com Kishon Vijay Abraham I (4): PCI: cadence: Use bitfield for *quirk_retrain_flag* instead of bool PCI: j721e: Add PCIe support for J7200 PCI: j721e: Add PCIe support for AM64 misc: pci_endpoint_test: Add deviceID for AM64 and J7200 Nadeem Athani (1): PCI: cadence: Add quirk flag to set minimum delay in LTSSM Detect.Quiet state drivers/misc/pci_endpoint_test.c | 8 +++ drivers/pci/controller/cadence/pci-j721e.c | 61 +++++++++++++++++-- .../pci/controller/cadence/pcie-cadence-ep.c | 4 ++ .../controller/cadence/pcie-cadence-host.c | 3 + drivers/pci/controller/cadence/pcie-cadence.c | 16 +++++ drivers/pci/controller/cadence/pcie-cadence.h | 17 +++++- 6 files changed, 103 insertions(+), 6 deletions(-)