| Message ID | 20210817211803.283639-7-richard.henderson@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | target/riscv: Use tcg_constant_* | expand |
On Wed, Aug 18, 2021 at 5:20 AM Richard Henderson <richard.henderson@linaro.org> wrote: > > Use ctx->w and the enhanced gen_arith function. > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > target/riscv/translate.c | 42 ------------------------- > target/riscv/insn_trans/trans_rvm.c.inc | 16 +++++----- > 2 files changed, 8 insertions(+), 50 deletions(-) > Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
On Wed, Aug 18, 2021 at 7:21 AM Richard Henderson <richard.henderson@linaro.org> wrote: > > Use ctx->w and the enhanced gen_arith function. > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > target/riscv/translate.c | 42 ------------------------- > target/riscv/insn_trans/trans_rvm.c.inc | 16 +++++----- > 2 files changed, 8 insertions(+), 50 deletions(-) > > diff --git a/target/riscv/translate.c b/target/riscv/translate.c > index 4819682bf1..e337dca01b 100644 > --- a/target/riscv/translate.c > +++ b/target/riscv/translate.c > @@ -491,48 +491,6 @@ static bool gen_arith_imm_tl(DisasContext *ctx, arg_i *a, DisasExtend ext, > return true; > } > > -static bool gen_arith_div_w(DisasContext *ctx, arg_r *a, > - void(*func)(TCGv, TCGv, TCGv)) > -{ > - TCGv source1, source2; > - source1 = tcg_temp_new(); > - source2 = tcg_temp_new(); > - > - gen_get_gpr(ctx, source1, a->rs1); > - gen_get_gpr(ctx, source2, a->rs2); > - tcg_gen_ext32s_tl(source1, source1); > - tcg_gen_ext32s_tl(source2, source2); > - > - (*func)(source1, source1, source2); > - > - tcg_gen_ext32s_tl(source1, source1); > - gen_set_gpr(ctx, a->rd, source1); > - tcg_temp_free(source1); > - tcg_temp_free(source2); > - return true; > -} > - > -static bool gen_arith_div_uw(DisasContext *ctx, arg_r *a, > - void(*func)(TCGv, TCGv, TCGv)) > -{ > - TCGv source1, source2; > - source1 = tcg_temp_new(); > - source2 = tcg_temp_new(); > - > - gen_get_gpr(ctx, source1, a->rs1); > - gen_get_gpr(ctx, source2, a->rs2); > - tcg_gen_ext32u_tl(source1, source1); > - tcg_gen_ext32u_tl(source2, source2); > - > - (*func)(source1, source1, source2); > - > - tcg_gen_ext32s_tl(source1, source1); > - gen_set_gpr(ctx, a->rd, source1); > - tcg_temp_free(source1); > - tcg_temp_free(source2); > - return true; > -} > - > static void gen_pack(TCGv ret, TCGv arg1, TCGv arg2) > { > tcg_gen_deposit_tl(ret, arg1, arg2, > diff --git a/target/riscv/insn_trans/trans_rvm.c.inc b/target/riscv/insn_trans/trans_rvm.c.inc > index 013b3f7009..3d93b24c25 100644 > --- a/target/riscv/insn_trans/trans_rvm.c.inc > +++ b/target/riscv/insn_trans/trans_rvm.c.inc > @@ -99,30 +99,30 @@ static bool trans_divw(DisasContext *ctx, arg_divw *a) > { > REQUIRE_64BIT(ctx); > REQUIRE_EXT(ctx, RVM); > - > - return gen_arith_div_w(ctx, a, &gen_div); > + ctx->w = true; > + return gen_arith(ctx, a, EXT_SIGN, gen_div); > } > > static bool trans_divuw(DisasContext *ctx, arg_divuw *a) > { > REQUIRE_64BIT(ctx); > REQUIRE_EXT(ctx, RVM); > - > - return gen_arith_div_uw(ctx, a, &gen_divu); > + ctx->w = true; > + return gen_arith(ctx, a, EXT_ZERO, gen_divu); > } > > static bool trans_remw(DisasContext *ctx, arg_remw *a) > { > REQUIRE_64BIT(ctx); > REQUIRE_EXT(ctx, RVM); > - > - return gen_arith_div_w(ctx, a, &gen_rem); > + ctx->w = true; > + return gen_arith(ctx, a, EXT_SIGN, gen_rem); > } > > static bool trans_remuw(DisasContext *ctx, arg_remuw *a) > { > REQUIRE_64BIT(ctx); > REQUIRE_EXT(ctx, RVM); > - > - return gen_arith_div_uw(ctx, a, &gen_remu); > + ctx->w = true; > + return gen_arith(ctx, a, EXT_ZERO, gen_remu); > } > -- > 2.25.1 > >
diff --git a/target/riscv/translate.c b/target/riscv/translate.c index 4819682bf1..e337dca01b 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -491,48 +491,6 @@ static bool gen_arith_imm_tl(DisasContext *ctx, arg_i *a, DisasExtend ext, return true; } -static bool gen_arith_div_w(DisasContext *ctx, arg_r *a, - void(*func)(TCGv, TCGv, TCGv)) -{ - TCGv source1, source2; - source1 = tcg_temp_new(); - source2 = tcg_temp_new(); - - gen_get_gpr(ctx, source1, a->rs1); - gen_get_gpr(ctx, source2, a->rs2); - tcg_gen_ext32s_tl(source1, source1); - tcg_gen_ext32s_tl(source2, source2); - - (*func)(source1, source1, source2); - - tcg_gen_ext32s_tl(source1, source1); - gen_set_gpr(ctx, a->rd, source1); - tcg_temp_free(source1); - tcg_temp_free(source2); - return true; -} - -static bool gen_arith_div_uw(DisasContext *ctx, arg_r *a, - void(*func)(TCGv, TCGv, TCGv)) -{ - TCGv source1, source2; - source1 = tcg_temp_new(); - source2 = tcg_temp_new(); - - gen_get_gpr(ctx, source1, a->rs1); - gen_get_gpr(ctx, source2, a->rs2); - tcg_gen_ext32u_tl(source1, source1); - tcg_gen_ext32u_tl(source2, source2); - - (*func)(source1, source1, source2); - - tcg_gen_ext32s_tl(source1, source1); - gen_set_gpr(ctx, a->rd, source1); - tcg_temp_free(source1); - tcg_temp_free(source2); - return true; -} - static void gen_pack(TCGv ret, TCGv arg1, TCGv arg2) { tcg_gen_deposit_tl(ret, arg1, arg2, diff --git a/target/riscv/insn_trans/trans_rvm.c.inc b/target/riscv/insn_trans/trans_rvm.c.inc index 013b3f7009..3d93b24c25 100644 --- a/target/riscv/insn_trans/trans_rvm.c.inc +++ b/target/riscv/insn_trans/trans_rvm.c.inc @@ -99,30 +99,30 @@ static bool trans_divw(DisasContext *ctx, arg_divw *a) { REQUIRE_64BIT(ctx); REQUIRE_EXT(ctx, RVM); - - return gen_arith_div_w(ctx, a, &gen_div); + ctx->w = true; + return gen_arith(ctx, a, EXT_SIGN, gen_div); } static bool trans_divuw(DisasContext *ctx, arg_divuw *a) { REQUIRE_64BIT(ctx); REQUIRE_EXT(ctx, RVM); - - return gen_arith_div_uw(ctx, a, &gen_divu); + ctx->w = true; + return gen_arith(ctx, a, EXT_ZERO, gen_divu); } static bool trans_remw(DisasContext *ctx, arg_remw *a) { REQUIRE_64BIT(ctx); REQUIRE_EXT(ctx, RVM); - - return gen_arith_div_w(ctx, a, &gen_rem); + ctx->w = true; + return gen_arith(ctx, a, EXT_SIGN, gen_rem); } static bool trans_remuw(DisasContext *ctx, arg_remuw *a) { REQUIRE_64BIT(ctx); REQUIRE_EXT(ctx, RVM); - - return gen_arith_div_uw(ctx, a, &gen_remu); + ctx->w = true; + return gen_arith(ctx, a, EXT_ZERO, gen_remu); }
Use ctx->w and the enhanced gen_arith function. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- target/riscv/translate.c | 42 ------------------------- target/riscv/insn_trans/trans_rvm.c.inc | 16 +++++----- 2 files changed, 8 insertions(+), 50 deletions(-) -- 2.25.1