| Message ID | f82f52076841285309a997f849e2786781548538.1629092894.git.vijayakannan.ayyathurai@intel.com |
|---|---|
| State | New |
| Headers | show |
| Series | [net-next,v1,1/3] net: stmmac: fix INTR TBU status affecting irq count statistic | expand |
On Mon, Aug 16, 2021 at 02:15:58PM +0800, Vijayakannan Ayyathurai wrote: > From: Voon Weifeng <weifeng.voon@intel.com> > > DMA channel status "Transmit buffer unavailable(TBU)" bit is not > considered as a successful dma tx. Hence, it should not affect > all the irq count statistic. > Acked-by: Wong Vee Khee <vee.khee.wong@linux.intel.com> > Fixes: 1103d3a5531c ("net: stmmac: dwmac4: Also use TBU interrupt to clean TX path") > Signed-off-by: Voon Weifeng <weifeng.voon@intel.com> > Signed-off-by: Vijayakannan Ayyathurai <vijayakannan.ayyathurai@intel.com> > --- > drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c > index e63270267578..f83db62938dd 100644 > --- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c > +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c > @@ -172,11 +172,12 @@ int dwmac4_dma_interrupt(void __iomem *ioaddr, > x->rx_normal_irq_n++; > ret |= handle_rx; > } > - if (likely(intr_status & (DMA_CHAN_STATUS_TI | > - DMA_CHAN_STATUS_TBU))) { > + if (likely(intr_status & DMA_CHAN_STATUS_TI)) { > x->tx_normal_irq_n++; > ret |= handle_tx; > } > + if (unlikely(intr_status & DMA_CHAN_STATUS_TBU)) > + ret |= handle_tx; > if (unlikely(intr_status & DMA_CHAN_STATUS_ERI)) > x->rx_early_irq++; >
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c index e63270267578..f83db62938dd 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c @@ -172,11 +172,12 @@ int dwmac4_dma_interrupt(void __iomem *ioaddr, x->rx_normal_irq_n++; ret |= handle_rx; } - if (likely(intr_status & (DMA_CHAN_STATUS_TI | - DMA_CHAN_STATUS_TBU))) { + if (likely(intr_status & DMA_CHAN_STATUS_TI)) { x->tx_normal_irq_n++; ret |= handle_tx; } + if (unlikely(intr_status & DMA_CHAN_STATUS_TBU)) + ret |= handle_tx; if (unlikely(intr_status & DMA_CHAN_STATUS_ERI)) x->rx_early_irq++;