| Message ID | 20210811114827.27322-8-semen.protsenko@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | Add minimal support for Exynos850 SoC | expand |
On Thu, 12 Aug 2021 at 11:17, Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> wrote: > > On 11/08/2021 13:48, Sam Protsenko wrote: > > Samsung Exynos850 is ARMv8-based mobile-oriented SoC. > > > > This patch adds minimal SoC support by including next Device Tree nodes: > > > > 1. Octa cores (Cortex-A55), supporting PSCI v1.0 > > 2. ARM architecture timer (armv8-timer) > > 3. Interrupt controller (GIC-400) > > 4. Pinctrl nodes for GPIO > > 5. Serial node > > > > Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> > > --- > > Changes in v3: > > - Used generic fixed clock for serial > > > > Changes in v2: > > * Commit message: > > - Documented added dts features instead of CPU features > > > > * exynos850-usi.dtsi: > > - Removed, moved everything to exynos850.dtsi > > > > * exynos850.dtsi: > > - Root node: > > - Added comment about engineering name (Exynos3830) > > - Renamed pinctrl nodes, adding domain names > > - Used hard coded IRQ numbers instead of named constants everywhere > > - Added soc node, moved next nodes there: gic, clock, pinctrls and > > serial > > - Used address-cells=1 for soc node and removed unneeded 0x0 from > > reg properties > > - Moved exynos850-pinctrl.dtsi include line to the end of > > exynos850.dtsi > > - Coding style fixes > > - cpus: > > - Used address-cells=1 for cpus node > > - Renamed cpu@0001 to cpu@1, and so on > > - Left only "arm,cortex-a55" for cpus compatible > > - Renamed reg = <0x0001> to <0x1> for cpus > > - armv8 timer: > > - Add comment about missing HV timer IRQ to armv8 timer node > > - Removed not existing properties from armv8 timer node > > - Fixed cpu number in CPU_MASK() > > - Removed obsolete clock-frequency property > > - GIC: > > - Fixed GIC type to be GIC-400 > > - Fixed size of GIC's 2nd region to be 0x2000 > > - serial node: > > - Hard coded clock number for serial_0 for now; will replace with > > named const once proper clock driver is implemented > > - Removed gate_uart_clk0 clock from serial_0, as that clock is not > > supported in serial driver anyway (yet) > > - clock node: > > - Fixed clock controller node name (@0x12.. -> @12..) > > > > * exynos850-pinctrl.dtsi: > > - Referenced pinctrl nodes instead of defining those again in root node > > - Fixed interrupt-cells (3 -> 2) > > - Fixed USI related comments for pin config nodes > > - Removed decon_f_te_* and fm_lna_en nodes (won't be used) > > - Reordered pin config nodes by pin numbers > > - Improved all comments > > - Used existing named constants for pin-function and pin-pud > > - Fixed node names (used hyphens instead of underscore) > > - Fixed warnings found in W=1 build > > > > .../boot/dts/exynos/exynos850-pinctrl.dtsi | 748 ++++++++++++++++++ > > arch/arm64/boot/dts/exynos/exynos850.dtsi | 261 ++++++ > > 2 files changed, 1009 insertions(+) > > create mode 100644 arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi > > create mode 100644 arch/arm64/boot/dts/exynos/exynos850.dtsi > > > > diff --git a/arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi > > new file mode 100644 > > index 000000000000..ba5d5f33e2f6 > > --- /dev/null > > +++ b/arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi > > @@ -0,0 +1,748 @@ > > +// SPDX-License-Identifier: GPL-2.0 > > +/* > > + * Samsung's Exynos850 SoC pin-mux and pin-config device tree source > > + * > > + * Copyright (C) 2017 Samsung Electronics Co., Ltd. > > + * Copyright (C) 2021 Linaro Ltd. > > + * > > + * Samsung's Exynos850 SoC pin-mux and pin-config options are listed as device > > + * tree nodes in this file. > > + */ > > + > > +#include <dt-bindings/interrupt-controller/arm-gic.h> > > +#include <dt-bindings/pinctrl/samsung.h> > > + > > +&pinctrl_alive { > > + gpa0: gpa0 { > > + gpio-controller; > > + #gpio-cells = <2>; > > + > > + interrupt-controller; > > + #interrupt-cells = <2>; > > + interrupt-parent = <&gic>; > > + interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; > > + }; > > + > > + gpa1: gpa1 { > > + gpio-controller; > > + #gpio-cells = <2>; > > + > > + interrupt-controller; > > + #interrupt-cells = <2>; > > + interrupt-parent = <&gic>; > > + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; > > + }; > > + > > + gpa2: gpa2 { > > + gpio-controller; > > + #gpio-cells = <2>; > > + > > + interrupt-controller; > > + #interrupt-cells = <2>; > > + interrupt-parent = <&gic>; > > + interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; > > + }; > > + > > + gpa3: gpa3 { > > + gpio-controller; > > + #gpio-cells = <2>; > > + > > + interrupt-controller; > > + #interrupt-cells = <2>; > > + interrupt-parent = <&gic>; > > + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; > > + }; > > + > > + gpa4: gpa4 { > > + gpio-controller; > > + #gpio-cells = <2>; > > + > > + interrupt-controller; > > + #interrupt-cells = <2>; > > + interrupt-parent = <&gic>; > > + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; > > + }; > > + > > + gpq0: gpq0 { > > + gpio-controller; > > + #gpio-cells = <2>; > > + > > + interrupt-controller; > > + #interrupt-cells = <2>; > > + }; > > + > > + /* I2C5 (also called CAM_PMIC_I2C in TRM) */ > > + i2c5_bus: i2c5-bus { > > + samsung,pins = "gpa3-5", "gpa3-6"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > > + samsung,pin-drv = <0>; > > + }; > > + > > + /* I2C6 (also called MOTOR_I2C in TRM) */ > > + i2c6_bus: i2c6-bus { > > + samsung,pins = "gpa3-7", "gpa4-0"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > > + samsung,pin-drv = <0>; > > + }; > > + > > + /* USI: UART */ > > + uart0_bus: uart0-bus { > > + samsung,pins = "gpq0-0", "gpq0-1"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > > + }; > > +}; > > + > > +&pinctrl_cmgp { > > + gpm0: gpm0 { > > + gpio-controller; > > + #gpio-cells = <2>; > > + > > + interrupt-controller; > > + #interrupt-cells = <2>; > > + interrupt-parent = <&gic>; > > + interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; > > + }; > > + > > + gpm1: gpm1 { > > + gpio-controller; > > + #gpio-cells = <2>; > > + > > + interrupt-controller; > > + #interrupt-cells = <2>; > > + interrupt-parent = <&gic>; > > + interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; > > + }; > > + > > + gpm2: gpm2 { > > + gpio-controller; > > + #gpio-cells = <2>; > > + > > + interrupt-controller; > > + #interrupt-cells = <2>; > > + interrupt-parent = <&gic>; > > + interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; > > + }; > > + > > + gpm3: gpm3 { > > + gpio-controller; > > + #gpio-cells = <2>; > > + > > + interrupt-controller; > > + #interrupt-cells = <2>; > > + interrupt-parent = <&gic>; > > + interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; > > + }; > > + > > + gpm4: gpm4 { > > + gpio-controller; > > + #gpio-cells = <2>; > > + > > + interrupt-controller; > > + #interrupt-cells = <2>; > > + interrupt-parent = <&gic>; > > + interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; > > + }; > > + > > + gpm5: gpm5 { > > + gpio-controller; > > + #gpio-cells = <2>; > > + > > + interrupt-controller; > > + #interrupt-cells = <2>; > > + interrupt-parent = <&gic>; > > + interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; > > + }; > > + > > + /* USI_CMGP0: HSI2C function */ > > + hsi2c3_bus: hsi2c3-bus { > > + samsung,pins = "gpm0-0", "gpm1-0"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > > + samsung,pin-drv = <0>; > > There are also macros for DRV. > Unfortunately, existing DRV macros won't work for Exynos850. DRV constants have different meaning for different GPIO domains in Exynos850, so I thought introducing several groups of DRV constants might be confusing. But please let me know if you still want me do that. > I assume you checked whether the actual values of FUNC/PULL/DRV macros > match Exynos850 datasheet. > Yep, they are good. > > + }; > > + > > + /* USI_CMGP0: UART function (4 pins, Auto Flow Control) */ > > + uart1_bus_single: uart1-bus { > > + samsung,pins = "gpm0-0", "gpm1-0", "gpm2-0", "gpm3-0"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > > + }; > > + > > + /* USI_CMGP0: UART function (2 pins, Non-Auto Flow Control) */ > > + uart1_bus_dual: uart1-bus-dual { > > + samsung,pins = "gpm0-0", "gpm1-0"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > > + }; > > + > > + /* USI_CMGP0: SPI function */ > > + spi1_bus: spi1-bus { > > + samsung,pins = "gpm0-0", "gpm1-0", "gpm2-0"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > > + samsung,pin-drv = <0>; > > + }; > > + > > + spi1_cs: spi1-cs { > > + samsung,pins = "gpm3-0"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > > + samsung,pin-drv = <0>; > > + }; > > + > > + spi1_cs_func: spi1-cs-func { > > + samsung,pins = "gpm3-0"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > > + samsung,pin-drv = <0>; > > + }; > > + > > + /* USI_CMGP1: HSI2C function */ > > + hsi2c4_bus: hsi2c4-bus { > > + samsung,pins = "gpm4-0", "gpm5-0"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > > + samsung,pin-drv = <0>; > > + }; > > + > > + /* USI_CMGP1: UART function (4 pins, Auto Flow Control) */ > > + uart2_bus_single: uart2-bus { > > + samsung,pins = "gpm4-0", "gpm5-0", "gpm6-0", "gpm7-0"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > > + }; > > + > > + /* USI_CMGP1: UART function (2 pins, Non-Auto Flow Control) */ > > + uart2_bus_dual: uart2-bus-dual { > > + samsung,pins = "gpm4-0", "gpm5-0"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > > + }; > > + > > + /* USI_CMGP1: SPI function */ > > + spi2_bus: spi2-bus { > > + samsung,pins = "gpm4-0", "gpm5-0", "gpm6-0"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > > + samsung,pin-drv = <0>; > > + }; > > + > > + spi2_cs: spi2-cs { > > + samsung,pins = "gpm7-0"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > > + samsung,pin-drv = <0>; > > + }; > > + > > + spi2_cs_func: spi2-cs-func { > > + samsung,pins = "gpm7-0"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > > + samsung,pin-drv = <0>; > > + }; > > +}; > > + > > +&pinctrl_aud { > > + gpb0: gpb0 { > > + gpio-controller; > > + #gpio-cells = <2>; > > + > > + interrupt-controller; > > + #interrupt-cells = <2>; > > + }; > > + > > + gpb1: gpb1 { > > + gpio-controller; > > + #gpio-cells = <2>; > > + > > + interrupt-controller; > > + #interrupt-cells = <2>; > > + }; > > + > > + aud_codec_mclk: aud-codec-mclk { > > + samsung,pins = "gpb0-0"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; > > + }; > > + > > + aud_codec_mclk_idle: aud-codec-mclk-idle { > > + samsung,pins = "gpb0-0"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; > > + }; > > + > > + aud_i2s0_bus: aud-i2s0-bus { > > + samsung,pins = "gpb0-1", "gpb0-2", "gpb0-3", "gpb0-4"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; > > + }; > > + > > + aud_i2s0_idle: aud-i2s0-idle { > > + samsung,pins = "gpb0-1", "gpb0-2", "gpb0-3", "gpb0-4"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; > > + }; > > + > > + aud_i2s1_bus: aud-i2s1-bus { > > + samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; > > + }; > > + > > + aud_i2s1_idle: aud-i2s1-idle { > > + samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; > > + }; > > + > > + aud_fm_bus: aud-fm-bus { > > + samsung,pins = "gpb1-4"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; > > + }; > > + > > + aud_fm_idle: aud-fm-idle { > > + samsung,pins = "gpb1-4"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; > > + }; > > +}; > > + > > +&pinctrl_hsi { > > + gpf2: gpf2 { > > + gpio-controller; > > + #gpio-cells = <2>; > > + > > + interrupt-controller; > > + #interrupt-cells = <2>; > > + }; > > + > > + sd2_clk: sd2-clk { > > + samsung,pins = "gpf2-0"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > > + samsung,pin-drv = <2>; > > + }; > > + > > + sd2_clk_fast_slew_rate_1x: sd2-clk-fast-slew-rate-1x { > > + samsung,pins = "gpf2-0"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > > + samsung,pin-drv = <0>; > > + }; > > + > > + sd2_clk_fast_slew_rate_1_5x: sd2-clk-fast-slew-rate-1-5x { > > + samsung,pins = "gpf2-0"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > > + samsung,pin-drv = <1>; > > + }; > > + > > + sd2_clk_fast_slew_rate_2x: sd2-clk-fast-slew-rate-2x { > > + samsung,pins = "gpf2-0"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > > + samsung,pin-drv = <2>; > > + }; > > + > > + sd2_clk_fast_slew_rate_2_5x: sd2-clk-fast-slew-rate-2-5x { > > + samsung,pins = "gpf2-0"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > > + samsung,pin-drv = <3>; > > + }; > > + > > + sd2_clk_fast_slew_rate_3x: sd2-clk-fast-slew-rate-3x { > > + samsung,pins = "gpf2-0"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > > + samsung,pin-drv = <4>; > > + }; > > + > > + sd2_clk_fast_slew_rate_4x: sd2-clk-fast-slew-rate-4x { > > + samsung,pins = "gpf2-0"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > > + samsung,pin-drv = <5>; > > + }; > > + > > + sd2_cmd: sd2-cmd { > > + samsung,pins = "gpf2-1"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > > + samsung,pin-drv = <2>; > > + }; > > + > > + sd2_bus1: sd2-bus-width1 { > > + samsung,pins = "gpf2-2"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > > + samsung,pin-drv = <2>; > > + }; > > + > > + sd2_bus4: sd2-bus-width4 { > > + samsung,pins = "gpf2-3", "gpf2-4", "gpf2-5"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > > + samsung,pin-drv = <2>; > > + }; > > + > > + sd2_pins_as_pdn: sd2-pins-as-pdn { > > + samsung,pins = "gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3", > > + "gpf2-4", "gpf2-5"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; > > + }; > > +}; > > + > > +&pinctrl_core { > > + gpf0: gpf0 { > > + gpio-controller; > > + #gpio-cells = <2>; > > + > > + interrupt-controller; > > + #interrupt-cells = <2>; > > + }; > > + > > + gpf1: gpf1 { > > + gpio-controller; > > + #gpio-cells = <2>; > > + > > + interrupt-controller; > > + #interrupt-cells = <2>; > > + }; > > + > > + sd0_clk: sd0-clk { > > + samsung,pins = "gpf0-0"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > > + samsung,pin-drv = <3>; > > + }; > > + > > + sd0_clk_fast_slew_rate_1x: sd0-clk-fast-slew-rate-1x { > > + samsung,pins = "gpf0-0"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > > + samsung,pin-drv = <1>; > > + }; > > + > > + sd0_clk_fast_slew_rate_2x: sd0-clk-fast-slew-rate-2x { > > + samsung,pins = "gpf0-0"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > > + samsung,pin-drv = <2>; > > + }; > > + > > + sd0_clk_fast_slew_rate_3x: sd0-clk-fast-slew-rate-3x { > > + samsung,pins = "gpf0-0"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > > + samsung,pin-drv = <2>; > > + }; > > + > > + sd0_clk_fast_slew_rate_4x: sd0-clk-fast-slew-rate-4x { > > + samsung,pins = "gpf0-0"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > > + samsung,pin-drv = <3>; > > + }; > > + > > + sd0_cmd: sd0-cmd { > > + samsung,pins = "gpf0-1"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > > + samsung,pin-drv = <3>; > > + }; > > + > > + sd0_rdqs: sd0-rdqs { > > + samsung,pins = "gpf0-2"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; > > + samsung,pin-drv = <3>; > > + }; > > + > > + sd0_nreset: sd0-nreset { > > + samsung,pins = "gpf0-3"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > > + samsung,pin-drv = <3>; > > + }; > > + > > + sd0_bus1: sd0-bus-width1 { > > + samsung,pins = "gpf1-0"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > > + samsung,pin-drv = <3>; > > + }; > > + > > + sd0_bus4: sd0-bus-width4 { > > + samsung,pins = "gpf1-1", "gpf1-2", "gpf1-3"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > > + samsung,pin-drv = <3>; > > + }; > > + > > + sd0_bus8: sd0-bus-width8 { > > + samsung,pins = "gpf1-4", "gpf1-5", "gpf1-6", "gpf1-7"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > > + samsung,pin-drv = <3>; > > + }; > > +}; > > + > > +&pinctrl_peri { > > + gpg0: gpg0 { > > + gpio-controller; > > + #gpio-cells = <2>; > > + > > + interrupt-controller; > > + #interrupt-cells = <2>; > > + }; > > + > > + gpp0: gpp0 { > > + gpio-controller; > > + #gpio-cells = <2>; > > + > > + interrupt-controller; > > + #interrupt-cells = <2>; > > + }; > > + gpp1: gpp1 { > > + gpio-controller; > > + #gpio-cells = <2>; > > + > > + interrupt-controller; > > + #interrupt-cells = <2>; > > + }; > > + > > + gpp2: gpp2 { > > + gpio-controller; > > + #gpio-cells = <2>; > > + > > + interrupt-controller; > > + #interrupt-cells = <2>; > > + }; > > + > > + gpg1: gpg1 { > > + gpio-controller; > > + #gpio-cells = <2>; > > + > > + interrupt-controller; > > + #interrupt-cells = <2>; > > + }; > > + > > + gpg2: gpg2 { > > + gpio-controller; > > + #gpio-cells = <2>; > > + > > + interrupt-controller; > > + #interrupt-cells = <2>; > > + }; > > + > > + gpg3: gpg3 { > > + gpio-controller; > > + #gpio-cells = <2>; > > + > > + interrupt-controller; > > + #interrupt-cells = <2>; > > + }; > > + > > + gpc0: gpc0 { > > + gpio-controller; > > + #gpio-cells = <2>; > > + > > + interrupt-controller; > > + #interrupt-cells = <2>; > > + }; > > + > > + gpc1: gpc1 { > > + gpio-controller; > > + #gpio-cells = <2>; > > + > > + interrupt-controller; > > + #interrupt-cells = <2>; > > + }; > > + > > + /* USI: HSI2C0 */ > > + hsi2c0_bus: hsi2c0-bus { > > + samsung,pins = "gpc1-0", "gpc1-1"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > > + samsung,pin-drv = <0>; > > + }; > > + > > + /* USI: HSI2C1 */ > > + hsi2c1_bus: hsi2c1-bus { > > + samsung,pins = "gpc1-2", "gpc1-3"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > > + samsung,pin-drv = <0>; > > + }; > > + > > + /* USI: HSI2C2 */ > > + hsi2c2_bus: hsi2c2-bus { > > + samsung,pins = "gpc1-4", "gpc1-5"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > > + samsung,pin-drv = <0>; > > + }; > > + > > + /* USI: SPI */ > > + spi0_bus: spi0-bus { > > + samsung,pins = "gpp2-0", "gpp2-2", "gpp2-3"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > > + samsung,pin-drv = <0>; > > + }; > > + > > + spi0_cs: spi0-cs { > > + samsung,pins = "gpp2-1"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > > + samsung,pin-drv = <0>; > > + }; > > + > > + spi0_cs_func: spi0-cs-func { > > + samsung,pins = "gpp2-1"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > > + samsung,pin-drv = <0>; > > + }; > > + > > + i2c0_bus: i2c0-bus { > > + samsung,pins = "gpp0-0", "gpp0-1"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > > + samsung,pin-drv = <0>; > > + }; > > + > > + i2c1_bus: i2c1-bus { > > + samsung,pins = "gpp0-2", "gpp0-3"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > > + samsung,pin-drv = <0>; > > + }; > > + > > + i2c2_bus: i2c2-bus { > > + samsung,pins = "gpp0-4", "gpp0-5"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > > + samsung,pin-drv = <0>; > > + }; > > + > > + i2c3_bus: i2c3-bus { > > + samsung,pins = "gpp1-0", "gpp1-1"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > > + samsung,pin-drv = <0>; > > + }; > > + > > + i2c4_bus: i2c4-bus { > > + samsung,pins = "gpp1-2", "gpp1-3"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > > + samsung,pin-drv = <0>; > > + }; > > + > > + sensor_mclk0_in: sensor-mclk0-in { > > + samsung,pins = "gpc0-0"; > > All these gpc0 go before hsi2c0_bus node (to have them ordered by > datasheet pin name). > Done. > > + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > > + samsung,pin-drv = <2>; > > + }; > > + > > Rest looks good but anyway will wait for the board DTS. :) > Sure. I'll probably send next patch series only when the board gets announced, and will include board's dts of course. > Best regards, > Krzysztof
On 12/08/2021 19:42, Sam Protsenko wrote: > On Thu, 12 Aug 2021 at 11:17, Krzysztof Kozlowski > <krzysztof.kozlowski@canonical.com> wrote: >> >> On 11/08/2021 13:48, Sam Protsenko wrote: >>> Samsung Exynos850 is ARMv8-based mobile-oriented SoC. >>> >>> This patch adds minimal SoC support by including next Device Tree nodes: >>> >>> 1. Octa cores (Cortex-A55), supporting PSCI v1.0 >>> 2. ARM architecture timer (armv8-timer) >>> 3. Interrupt controller (GIC-400) >>> 4. Pinctrl nodes for GPIO >>> 5. Serial node >>> >>> Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> >>> --- >>> Changes in v3: >>> - Used generic fixed clock for serial >>> >>> Changes in v2: >>> * Commit message: >>> - Documented added dts features instead of CPU features >>> >>> * exynos850-usi.dtsi: >>> - Removed, moved everything to exynos850.dtsi >>> >>> * exynos850.dtsi: >>> - Root node: >>> - Added comment about engineering name (Exynos3830) >>> - Renamed pinctrl nodes, adding domain names >>> - Used hard coded IRQ numbers instead of named constants everywhere >>> - Added soc node, moved next nodes there: gic, clock, pinctrls and >>> serial >>> - Used address-cells=1 for soc node and removed unneeded 0x0 from >>> reg properties >>> - Moved exynos850-pinctrl.dtsi include line to the end of >>> exynos850.dtsi >>> - Coding style fixes >>> - cpus: >>> - Used address-cells=1 for cpus node >>> - Renamed cpu@0001 to cpu@1, and so on >>> - Left only "arm,cortex-a55" for cpus compatible >>> - Renamed reg = <0x0001> to <0x1> for cpus >>> - armv8 timer: >>> - Add comment about missing HV timer IRQ to armv8 timer node >>> - Removed not existing properties from armv8 timer node >>> - Fixed cpu number in CPU_MASK() >>> - Removed obsolete clock-frequency property >>> - GIC: >>> - Fixed GIC type to be GIC-400 >>> - Fixed size of GIC's 2nd region to be 0x2000 >>> - serial node: >>> - Hard coded clock number for serial_0 for now; will replace with >>> named const once proper clock driver is implemented >>> - Removed gate_uart_clk0 clock from serial_0, as that clock is not >>> supported in serial driver anyway (yet) >>> - clock node: >>> - Fixed clock controller node name (@0x12.. -> @12..) >>> >>> * exynos850-pinctrl.dtsi: >>> - Referenced pinctrl nodes instead of defining those again in root node >>> - Fixed interrupt-cells (3 -> 2) >>> - Fixed USI related comments for pin config nodes >>> - Removed decon_f_te_* and fm_lna_en nodes (won't be used) >>> - Reordered pin config nodes by pin numbers >>> - Improved all comments >>> - Used existing named constants for pin-function and pin-pud >>> - Fixed node names (used hyphens instead of underscore) >>> - Fixed warnings found in W=1 build >>> >>> .../boot/dts/exynos/exynos850-pinctrl.dtsi | 748 ++++++++++++++++++ >>> arch/arm64/boot/dts/exynos/exynos850.dtsi | 261 ++++++ >>> 2 files changed, 1009 insertions(+) >>> create mode 100644 arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi >>> create mode 100644 arch/arm64/boot/dts/exynos/exynos850.dtsi >>> >>> diff --git a/arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi >>> new file mode 100644 >>> index 000000000000..ba5d5f33e2f6 >>> --- /dev/null >>> +++ b/arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi >>> @@ -0,0 +1,748 @@ >>> +// SPDX-License-Identifier: GPL-2.0 >>> +/* >>> + * Samsung's Exynos850 SoC pin-mux and pin-config device tree source >>> + * >>> + * Copyright (C) 2017 Samsung Electronics Co., Ltd. >>> + * Copyright (C) 2021 Linaro Ltd. >>> + * >>> + * Samsung's Exynos850 SoC pin-mux and pin-config options are listed as device >>> + * tree nodes in this file. >>> + */ >>> + >>> +#include <dt-bindings/interrupt-controller/arm-gic.h> >>> +#include <dt-bindings/pinctrl/samsung.h> >>> + >>> +&pinctrl_alive { >>> + gpa0: gpa0 { >>> + gpio-controller; >>> + #gpio-cells = <2>; >>> + >>> + interrupt-controller; >>> + #interrupt-cells = <2>; >>> + interrupt-parent = <&gic>; >>> + interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, >>> + <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, >>> + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, >>> + <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, >>> + <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, >>> + <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, >>> + <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, >>> + <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; >>> + }; >>> + >>> + gpa1: gpa1 { >>> + gpio-controller; >>> + #gpio-cells = <2>; >>> + >>> + interrupt-controller; >>> + #interrupt-cells = <2>; >>> + interrupt-parent = <&gic>; >>> + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, >>> + <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, >>> + <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, >>> + <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, >>> + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, >>> + <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, >>> + <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, >>> + <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; >>> + }; >>> + >>> + gpa2: gpa2 { >>> + gpio-controller; >>> + #gpio-cells = <2>; >>> + >>> + interrupt-controller; >>> + #interrupt-cells = <2>; >>> + interrupt-parent = <&gic>; >>> + interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, >>> + <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, >>> + <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, >>> + <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>, >>> + <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>, >>> + <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>, >>> + <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>, >>> + <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; >>> + }; >>> + >>> + gpa3: gpa3 { >>> + gpio-controller; >>> + #gpio-cells = <2>; >>> + >>> + interrupt-controller; >>> + #interrupt-cells = <2>; >>> + interrupt-parent = <&gic>; >>> + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>, >>> + <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>, >>> + <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>, >>> + <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>, >>> + <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, >>> + <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>, >>> + <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>, >>> + <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; >>> + }; >>> + >>> + gpa4: gpa4 { >>> + gpio-controller; >>> + #gpio-cells = <2>; >>> + >>> + interrupt-controller; >>> + #interrupt-cells = <2>; >>> + interrupt-parent = <&gic>; >>> + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, >>> + <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, >>> + <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, >>> + <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; >>> + }; >>> + >>> + gpq0: gpq0 { >>> + gpio-controller; >>> + #gpio-cells = <2>; >>> + >>> + interrupt-controller; >>> + #interrupt-cells = <2>; >>> + }; >>> + >>> + /* I2C5 (also called CAM_PMIC_I2C in TRM) */ >>> + i2c5_bus: i2c5-bus { >>> + samsung,pins = "gpa3-5", "gpa3-6"; >>> + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; >>> + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; >>> + samsung,pin-drv = <0>; >>> + }; >>> + >>> + /* I2C6 (also called MOTOR_I2C in TRM) */ >>> + i2c6_bus: i2c6-bus { >>> + samsung,pins = "gpa3-7", "gpa4-0"; >>> + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; >>> + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; >>> + samsung,pin-drv = <0>; >>> + }; >>> + >>> + /* USI: UART */ >>> + uart0_bus: uart0-bus { >>> + samsung,pins = "gpq0-0", "gpq0-1"; >>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; >>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; >>> + }; >>> +}; >>> + >>> +&pinctrl_cmgp { >>> + gpm0: gpm0 { >>> + gpio-controller; >>> + #gpio-cells = <2>; >>> + >>> + interrupt-controller; >>> + #interrupt-cells = <2>; >>> + interrupt-parent = <&gic>; >>> + interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; >>> + }; >>> + >>> + gpm1: gpm1 { >>> + gpio-controller; >>> + #gpio-cells = <2>; >>> + >>> + interrupt-controller; >>> + #interrupt-cells = <2>; >>> + interrupt-parent = <&gic>; >>> + interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; >>> + }; >>> + >>> + gpm2: gpm2 { >>> + gpio-controller; >>> + #gpio-cells = <2>; >>> + >>> + interrupt-controller; >>> + #interrupt-cells = <2>; >>> + interrupt-parent = <&gic>; >>> + interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; >>> + }; >>> + >>> + gpm3: gpm3 { >>> + gpio-controller; >>> + #gpio-cells = <2>; >>> + >>> + interrupt-controller; >>> + #interrupt-cells = <2>; >>> + interrupt-parent = <&gic>; >>> + interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; >>> + }; >>> + >>> + gpm4: gpm4 { >>> + gpio-controller; >>> + #gpio-cells = <2>; >>> + >>> + interrupt-controller; >>> + #interrupt-cells = <2>; >>> + interrupt-parent = <&gic>; >>> + interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; >>> + }; >>> + >>> + gpm5: gpm5 { >>> + gpio-controller; >>> + #gpio-cells = <2>; >>> + >>> + interrupt-controller; >>> + #interrupt-cells = <2>; >>> + interrupt-parent = <&gic>; >>> + interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; >>> + }; >>> + >>> + /* USI_CMGP0: HSI2C function */ >>> + hsi2c3_bus: hsi2c3-bus { >>> + samsung,pins = "gpm0-0", "gpm1-0"; >>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; >>> + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; >>> + samsung,pin-drv = <0>; >> >> There are also macros for DRV. >> > > Unfortunately, existing DRV macros won't work for Exynos850. DRV > constants have different meaning for different GPIO domains in > Exynos850, so I thought introducing several groups of DRV constants > might be confusing. But please let me know if you still want me do > that. > Oh, damn, raw values are ok then. Best regards, Krzysztof
On Wed, Aug 11, 2021 at 02:48:27PM +0300, Sam Protsenko wrote: > Samsung Exynos850 is ARMv8-based mobile-oriented SoC. > > This patch adds minimal SoC support by including next Device Tree nodes: > > 1. Octa cores (Cortex-A55), supporting PSCI v1.0 > 2. ARM architecture timer (armv8-timer) > 3. Interrupt controller (GIC-400) > 4. Pinctrl nodes for GPIO > 5. Serial node > > Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> > --- > Changes in v3: > - Used generic fixed clock for serial > > Changes in v2: > * Commit message: > - Documented added dts features instead of CPU features > > * exynos850-usi.dtsi: > - Removed, moved everything to exynos850.dtsi > > * exynos850.dtsi: > - Root node: > - Added comment about engineering name (Exynos3830) > - Renamed pinctrl nodes, adding domain names > - Used hard coded IRQ numbers instead of named constants everywhere > - Added soc node, moved next nodes there: gic, clock, pinctrls and > serial > - Used address-cells=1 for soc node and removed unneeded 0x0 from > reg properties > - Moved exynos850-pinctrl.dtsi include line to the end of > exynos850.dtsi > - Coding style fixes > - cpus: > - Used address-cells=1 for cpus node > - Renamed cpu@0001 to cpu@1, and so on > - Left only "arm,cortex-a55" for cpus compatible > - Renamed reg = <0x0001> to <0x1> for cpus > - armv8 timer: > - Add comment about missing HV timer IRQ to armv8 timer node > - Removed not existing properties from armv8 timer node > - Fixed cpu number in CPU_MASK() > - Removed obsolete clock-frequency property > - GIC: > - Fixed GIC type to be GIC-400 > - Fixed size of GIC's 2nd region to be 0x2000 > - serial node: > - Hard coded clock number for serial_0 for now; will replace with > named const once proper clock driver is implemented > - Removed gate_uart_clk0 clock from serial_0, as that clock is not > supported in serial driver anyway (yet) > - clock node: > - Fixed clock controller node name (@0x12.. -> @12..) > > * exynos850-pinctrl.dtsi: > - Referenced pinctrl nodes instead of defining those again in root node > - Fixed interrupt-cells (3 -> 2) > - Fixed USI related comments for pin config nodes > - Removed decon_f_te_* and fm_lna_en nodes (won't be used) > - Reordered pin config nodes by pin numbers > - Improved all comments > - Used existing named constants for pin-function and pin-pud > - Fixed node names (used hyphens instead of underscore) > - Fixed warnings found in W=1 build > > .../boot/dts/exynos/exynos850-pinctrl.dtsi | 748 ++++++++++++++++++ > arch/arm64/boot/dts/exynos/exynos850.dtsi | 261 ++++++ > 2 files changed, 1009 insertions(+) > create mode 100644 arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi > create mode 100644 arch/arm64/boot/dts/exynos/exynos850.dtsi > > diff --git a/arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi > new file mode 100644 > index 000000000000..ba5d5f33e2f6 > --- /dev/null > +++ b/arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi > @@ -0,0 +1,748 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Samsung's Exynos850 SoC pin-mux and pin-config device tree source > + * > + * Copyright (C) 2017 Samsung Electronics Co., Ltd. > + * Copyright (C) 2021 Linaro Ltd. > + * > + * Samsung's Exynos850 SoC pin-mux and pin-config options are listed as device > + * tree nodes in this file. > + */ > + > +#include <dt-bindings/interrupt-controller/arm-gic.h> > +#include <dt-bindings/pinctrl/samsung.h> > + > +&pinctrl_alive { > + gpa0: gpa0 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + interrupt-parent = <&gic>; > + interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; > + }; > + > + gpa1: gpa1 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + interrupt-parent = <&gic>; > + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; > + }; > + > + gpa2: gpa2 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + interrupt-parent = <&gic>; > + interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; > + }; > + > + gpa3: gpa3 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + interrupt-parent = <&gic>; > + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; > + }; > + > + gpa4: gpa4 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + interrupt-parent = <&gic>; > + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; > + }; > + > + gpq0: gpq0 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + /* I2C5 (also called CAM_PMIC_I2C in TRM) */ > + i2c5_bus: i2c5-bus { Please name all the pinctrl nodes with some pattern you can match on once there is a schema. '-pins$' is my suggestion. > + samsung,pins = "gpa3-5", "gpa3-6"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > + samsung,pin-drv = <0>; > + }; > + > + /* I2C6 (also called MOTOR_I2C in TRM) */ > + i2c6_bus: i2c6-bus { > + samsung,pins = "gpa3-7", "gpa4-0"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > + samsung,pin-drv = <0>; > + };
On Tue, 17 Aug 2021 at 21:42, Rob Herring <robh@kernel.org> wrote: > > On Wed, Aug 11, 2021 at 02:48:27PM +0300, Sam Protsenko wrote: > > Samsung Exynos850 is ARMv8-based mobile-oriented SoC. > > > > This patch adds minimal SoC support by including next Device Tree nodes: > > > > 1. Octa cores (Cortex-A55), supporting PSCI v1.0 > > 2. ARM architecture timer (armv8-timer) > > 3. Interrupt controller (GIC-400) > > 4. Pinctrl nodes for GPIO > > 5. Serial node > > > > Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> > > --- > > Changes in v3: > > - Used generic fixed clock for serial > > > > Changes in v2: > > * Commit message: > > - Documented added dts features instead of CPU features > > > > * exynos850-usi.dtsi: > > - Removed, moved everything to exynos850.dtsi > > > > * exynos850.dtsi: > > - Root node: > > - Added comment about engineering name (Exynos3830) > > - Renamed pinctrl nodes, adding domain names > > - Used hard coded IRQ numbers instead of named constants everywhere > > - Added soc node, moved next nodes there: gic, clock, pinctrls and > > serial > > - Used address-cells=1 for soc node and removed unneeded 0x0 from > > reg properties > > - Moved exynos850-pinctrl.dtsi include line to the end of > > exynos850.dtsi > > - Coding style fixes > > - cpus: > > - Used address-cells=1 for cpus node > > - Renamed cpu@0001 to cpu@1, and so on > > - Left only "arm,cortex-a55" for cpus compatible > > - Renamed reg = <0x0001> to <0x1> for cpus > > - armv8 timer: > > - Add comment about missing HV timer IRQ to armv8 timer node > > - Removed not existing properties from armv8 timer node > > - Fixed cpu number in CPU_MASK() > > - Removed obsolete clock-frequency property > > - GIC: > > - Fixed GIC type to be GIC-400 > > - Fixed size of GIC's 2nd region to be 0x2000 > > - serial node: > > - Hard coded clock number for serial_0 for now; will replace with > > named const once proper clock driver is implemented > > - Removed gate_uart_clk0 clock from serial_0, as that clock is not > > supported in serial driver anyway (yet) > > - clock node: > > - Fixed clock controller node name (@0x12.. -> @12..) > > > > * exynos850-pinctrl.dtsi: > > - Referenced pinctrl nodes instead of defining those again in root node > > - Fixed interrupt-cells (3 -> 2) > > - Fixed USI related comments for pin config nodes > > - Removed decon_f_te_* and fm_lna_en nodes (won't be used) > > - Reordered pin config nodes by pin numbers > > - Improved all comments > > - Used existing named constants for pin-function and pin-pud > > - Fixed node names (used hyphens instead of underscore) > > - Fixed warnings found in W=1 build > > > > .../boot/dts/exynos/exynos850-pinctrl.dtsi | 748 ++++++++++++++++++ > > arch/arm64/boot/dts/exynos/exynos850.dtsi | 261 ++++++ > > 2 files changed, 1009 insertions(+) > > create mode 100644 arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi > > create mode 100644 arch/arm64/boot/dts/exynos/exynos850.dtsi > > > > diff --git a/arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi > > new file mode 100644 > > index 000000000000..ba5d5f33e2f6 > > --- /dev/null > > +++ b/arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi > > @@ -0,0 +1,748 @@ > > +// SPDX-License-Identifier: GPL-2.0 > > +/* > > + * Samsung's Exynos850 SoC pin-mux and pin-config device tree source > > + * > > + * Copyright (C) 2017 Samsung Electronics Co., Ltd. > > + * Copyright (C) 2021 Linaro Ltd. > > + * > > + * Samsung's Exynos850 SoC pin-mux and pin-config options are listed as device > > + * tree nodes in this file. > > + */ > > + > > +#include <dt-bindings/interrupt-controller/arm-gic.h> > > +#include <dt-bindings/pinctrl/samsung.h> > > + > > +&pinctrl_alive { > > + gpa0: gpa0 { > > + gpio-controller; > > + #gpio-cells = <2>; > > + > > + interrupt-controller; > > + #interrupt-cells = <2>; > > + interrupt-parent = <&gic>; > > + interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; > > + }; > > + > > + gpa1: gpa1 { > > + gpio-controller; > > + #gpio-cells = <2>; > > + > > + interrupt-controller; > > + #interrupt-cells = <2>; > > + interrupt-parent = <&gic>; > > + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; > > + }; > > + > > + gpa2: gpa2 { > > + gpio-controller; > > + #gpio-cells = <2>; > > + > > + interrupt-controller; > > + #interrupt-cells = <2>; > > + interrupt-parent = <&gic>; > > + interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; > > + }; > > + > > + gpa3: gpa3 { > > + gpio-controller; > > + #gpio-cells = <2>; > > + > > + interrupt-controller; > > + #interrupt-cells = <2>; > > + interrupt-parent = <&gic>; > > + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; > > + }; > > + > > + gpa4: gpa4 { > > + gpio-controller; > > + #gpio-cells = <2>; > > + > > + interrupt-controller; > > + #interrupt-cells = <2>; > > + interrupt-parent = <&gic>; > > + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; > > + }; > > + > > + gpq0: gpq0 { > > + gpio-controller; > > + #gpio-cells = <2>; > > + > > + interrupt-controller; > > + #interrupt-cells = <2>; > > + }; > > + > > + /* I2C5 (also called CAM_PMIC_I2C in TRM) */ > > + i2c5_bus: i2c5-bus { > > Please name all the pinctrl nodes with some pattern you can match on > once there is a schema. '-pins$' is my suggestion. > Done. This looks much better, the change will be present in new patch series including board dts. Can I ask for more info about schema you mentioned: is there some doc or examples I can check? And is it something generic, or I have to implement it for Exynos850 dts? Thanks! > > + samsung,pins = "gpa3-5", "gpa3-6"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > > + samsung,pin-drv = <0>; > > + }; > > + > > + /* I2C6 (also called MOTOR_I2C in TRM) */ > > + i2c6_bus: i2c6-bus { > > + samsung,pins = "gpa3-7", "gpa4-0"; > > + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; > > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > > + samsung,pin-drv = <0>; > > + };
diff --git a/arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi new file mode 100644 index 000000000000..ba5d5f33e2f6 --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi @@ -0,0 +1,748 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Samsung's Exynos850 SoC pin-mux and pin-config device tree source + * + * Copyright (C) 2017 Samsung Electronics Co., Ltd. + * Copyright (C) 2021 Linaro Ltd. + * + * Samsung's Exynos850 SoC pin-mux and pin-config options are listed as device + * tree nodes in this file. + */ + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/pinctrl/samsung.h> + +&pinctrl_alive { + gpa0: gpa0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&gic>; + interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; + }; + + gpa1: gpa1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&gic>; + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; + }; + + gpa2: gpa2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&gic>; + interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; + }; + + gpa3: gpa3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&gic>; + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; + }; + + gpa4: gpa4 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&gic>; + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; + }; + + gpq0: gpq0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + /* I2C5 (also called CAM_PMIC_I2C in TRM) */ + i2c5_bus: i2c5-bus { + samsung,pins = "gpa3-5", "gpa3-6"; + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <0>; + }; + + /* I2C6 (also called MOTOR_I2C in TRM) */ + i2c6_bus: i2c6-bus { + samsung,pins = "gpa3-7", "gpa4-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <0>; + }; + + /* USI: UART */ + uart0_bus: uart0-bus { + samsung,pins = "gpq0-0", "gpq0-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; +}; + +&pinctrl_cmgp { + gpm0: gpm0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&gic>; + interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; + }; + + gpm1: gpm1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&gic>; + interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; + }; + + gpm2: gpm2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&gic>; + interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; + }; + + gpm3: gpm3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&gic>; + interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; + }; + + gpm4: gpm4 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&gic>; + interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; + }; + + gpm5: gpm5 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&gic>; + interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; + }; + + /* USI_CMGP0: HSI2C function */ + hsi2c3_bus: hsi2c3-bus { + samsung,pins = "gpm0-0", "gpm1-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <0>; + }; + + /* USI_CMGP0: UART function (4 pins, Auto Flow Control) */ + uart1_bus_single: uart1-bus { + samsung,pins = "gpm0-0", "gpm1-0", "gpm2-0", "gpm3-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + /* USI_CMGP0: UART function (2 pins, Non-Auto Flow Control) */ + uart1_bus_dual: uart1-bus-dual { + samsung,pins = "gpm0-0", "gpm1-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + /* USI_CMGP0: SPI function */ + spi1_bus: spi1-bus { + samsung,pins = "gpm0-0", "gpm1-0", "gpm2-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <0>; + }; + + spi1_cs: spi1-cs { + samsung,pins = "gpm3-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <0>; + }; + + spi1_cs_func: spi1-cs-func { + samsung,pins = "gpm3-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <0>; + }; + + /* USI_CMGP1: HSI2C function */ + hsi2c4_bus: hsi2c4-bus { + samsung,pins = "gpm4-0", "gpm5-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <0>; + }; + + /* USI_CMGP1: UART function (4 pins, Auto Flow Control) */ + uart2_bus_single: uart2-bus { + samsung,pins = "gpm4-0", "gpm5-0", "gpm6-0", "gpm7-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + /* USI_CMGP1: UART function (2 pins, Non-Auto Flow Control) */ + uart2_bus_dual: uart2-bus-dual { + samsung,pins = "gpm4-0", "gpm5-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + /* USI_CMGP1: SPI function */ + spi2_bus: spi2-bus { + samsung,pins = "gpm4-0", "gpm5-0", "gpm6-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <0>; + }; + + spi2_cs: spi2-cs { + samsung,pins = "gpm7-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <0>; + }; + + spi2_cs_func: spi2-cs-func { + samsung,pins = "gpm7-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <0>; + }; +}; + +&pinctrl_aud { + gpb0: gpb0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb1: gpb1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + aud_codec_mclk: aud-codec-mclk { + samsung,pins = "gpb0-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; + }; + + aud_codec_mclk_idle: aud-codec-mclk-idle { + samsung,pins = "gpb0-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; + }; + + aud_i2s0_bus: aud-i2s0-bus { + samsung,pins = "gpb0-1", "gpb0-2", "gpb0-3", "gpb0-4"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; + }; + + aud_i2s0_idle: aud-i2s0-idle { + samsung,pins = "gpb0-1", "gpb0-2", "gpb0-3", "gpb0-4"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; + }; + + aud_i2s1_bus: aud-i2s1-bus { + samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; + }; + + aud_i2s1_idle: aud-i2s1-idle { + samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; + }; + + aud_fm_bus: aud-fm-bus { + samsung,pins = "gpb1-4"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; + }; + + aud_fm_idle: aud-fm-idle { + samsung,pins = "gpb1-4"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; + }; +}; + +&pinctrl_hsi { + gpf2: gpf2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + sd2_clk: sd2-clk { + samsung,pins = "gpf2-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <2>; + }; + + sd2_clk_fast_slew_rate_1x: sd2-clk-fast-slew-rate-1x { + samsung,pins = "gpf2-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <0>; + }; + + sd2_clk_fast_slew_rate_1_5x: sd2-clk-fast-slew-rate-1-5x { + samsung,pins = "gpf2-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <1>; + }; + + sd2_clk_fast_slew_rate_2x: sd2-clk-fast-slew-rate-2x { + samsung,pins = "gpf2-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <2>; + }; + + sd2_clk_fast_slew_rate_2_5x: sd2-clk-fast-slew-rate-2-5x { + samsung,pins = "gpf2-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <3>; + }; + + sd2_clk_fast_slew_rate_3x: sd2-clk-fast-slew-rate-3x { + samsung,pins = "gpf2-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <4>; + }; + + sd2_clk_fast_slew_rate_4x: sd2-clk-fast-slew-rate-4x { + samsung,pins = "gpf2-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <5>; + }; + + sd2_cmd: sd2-cmd { + samsung,pins = "gpf2-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <2>; + }; + + sd2_bus1: sd2-bus-width1 { + samsung,pins = "gpf2-2"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <2>; + }; + + sd2_bus4: sd2-bus-width4 { + samsung,pins = "gpf2-3", "gpf2-4", "gpf2-5"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <2>; + }; + + sd2_pins_as_pdn: sd2-pins-as-pdn { + samsung,pins = "gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3", + "gpf2-4", "gpf2-5"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; + }; +}; + +&pinctrl_core { + gpf0: gpf0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf1: gpf1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + sd0_clk: sd0-clk { + samsung,pins = "gpf0-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <3>; + }; + + sd0_clk_fast_slew_rate_1x: sd0-clk-fast-slew-rate-1x { + samsung,pins = "gpf0-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <1>; + }; + + sd0_clk_fast_slew_rate_2x: sd0-clk-fast-slew-rate-2x { + samsung,pins = "gpf0-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <2>; + }; + + sd0_clk_fast_slew_rate_3x: sd0-clk-fast-slew-rate-3x { + samsung,pins = "gpf0-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <2>; + }; + + sd0_clk_fast_slew_rate_4x: sd0-clk-fast-slew-rate-4x { + samsung,pins = "gpf0-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <3>; + }; + + sd0_cmd: sd0-cmd { + samsung,pins = "gpf0-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <3>; + }; + + sd0_rdqs: sd0-rdqs { + samsung,pins = "gpf0-2"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; + samsung,pin-drv = <3>; + }; + + sd0_nreset: sd0-nreset { + samsung,pins = "gpf0-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <3>; + }; + + sd0_bus1: sd0-bus-width1 { + samsung,pins = "gpf1-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <3>; + }; + + sd0_bus4: sd0-bus-width4 { + samsung,pins = "gpf1-1", "gpf1-2", "gpf1-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <3>; + }; + + sd0_bus8: sd0-bus-width8 { + samsung,pins = "gpf1-4", "gpf1-5", "gpf1-6", "gpf1-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <3>; + }; +}; + +&pinctrl_peri { + gpg0: gpg0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpp0: gpp0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + gpp1: gpp1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpp2: gpp2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg1: gpg1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg2: gpg2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg3: gpg3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpc0: gpc0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpc1: gpc1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + /* USI: HSI2C0 */ + hsi2c0_bus: hsi2c0-bus { + samsung,pins = "gpc1-0", "gpc1-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <0>; + }; + + /* USI: HSI2C1 */ + hsi2c1_bus: hsi2c1-bus { + samsung,pins = "gpc1-2", "gpc1-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <0>; + }; + + /* USI: HSI2C2 */ + hsi2c2_bus: hsi2c2-bus { + samsung,pins = "gpc1-4", "gpc1-5"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <0>; + }; + + /* USI: SPI */ + spi0_bus: spi0-bus { + samsung,pins = "gpp2-0", "gpp2-2", "gpp2-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <0>; + }; + + spi0_cs: spi0-cs { + samsung,pins = "gpp2-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <0>; + }; + + spi0_cs_func: spi0-cs-func { + samsung,pins = "gpp2-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <0>; + }; + + i2c0_bus: i2c0-bus { + samsung,pins = "gpp0-0", "gpp0-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <0>; + }; + + i2c1_bus: i2c1-bus { + samsung,pins = "gpp0-2", "gpp0-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <0>; + }; + + i2c2_bus: i2c2-bus { + samsung,pins = "gpp0-4", "gpp0-5"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <0>; + }; + + i2c3_bus: i2c3-bus { + samsung,pins = "gpp1-0", "gpp1-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <0>; + }; + + i2c4_bus: i2c4-bus { + samsung,pins = "gpp1-2", "gpp1-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <0>; + }; + + sensor_mclk0_in: sensor-mclk0-in { + samsung,pins = "gpc0-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <2>; + }; + + sensor_mclk0_out: sensor-mclk0-out { + samsung,pins = "gpc0-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; + samsung,pin-drv = <2>; + }; + + sensor_mclk0_fn: sensor-mclk0-fn { + samsung,pins = "gpc0-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <2>; + }; + + sensor_mclk1_in: sensor-mclk1-in { + samsung,pins = "gpc0-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <2>; + }; + + sensor_mclk1_out: sensor-mclk1-out { + samsung,pins = "gpc0-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; + samsung,pin-drv = <2>; + }; + + sensor_mclk1_fn: sensor-mclk1-fn { + samsung,pins = "gpc0-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <2>; + }; + + sensor_mclk2_in: sensor-mclk2-in { + samsung,pins = "gpc0-2"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <2>; + }; + + sensor_mclk2_out: sensor-mclk2-out { + samsung,pins = "gpc0-2"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; + samsung,pin-drv = <2>; + }; + + sensor_mclk2_fn: sensor-mclk2-fn { + samsung,pins = "gpc0-2"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <2>; + }; + + xclkout: xclkout { + samsung,pins = "gpq0-2"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; +}; diff --git a/arch/arm64/boot/dts/exynos/exynos850.dtsi b/arch/arm64/boot/dts/exynos/exynos850.dtsi new file mode 100644 index 000000000000..2360f142159f --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynos850.dtsi @@ -0,0 +1,261 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Samsung Exynos850 SoC device tree source + * + * Copyright (C) 2018 Samsung Electronics Co., Ltd. + * Copyright (C) 2021 Linaro Ltd. + * + * Samsung Exynos850 SoC device nodes are listed in this file. + * Exynos based board files can include this file and provide + * values for board specific bindings. + */ + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + /* Also known under engineering name Exynos3830 */ + compatible = "samsung,exynos850"; + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <1>; + + aliases { + pinctrl0 = &pinctrl_alive; + pinctrl1 = &pinctrl_cmgp; + pinctrl2 = &pinctrl_aud; + pinctrl3 = &pinctrl_hsi; + pinctrl4 = &pinctrl_core; + pinctrl5 = &pinctrl_peri; + serial0 = &serial_0; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu-map { + cluster0 { + core0 { + cpu = <&cpu0>; + }; + core1 { + cpu = <&cpu1>; + }; + core2 { + cpu = <&cpu2>; + }; + core3 { + cpu = <&cpu3>; + }; + }; + + cluster1 { + core0 { + cpu = <&cpu4>; + }; + core1 { + cpu = <&cpu5>; + }; + core2 { + cpu = <&cpu6>; + }; + core3 { + cpu = <&cpu7>; + }; + }; + }; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x0>; + enable-method = "psci"; + }; + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x1>; + enable-method = "psci"; + }; + cpu2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x2>; + enable-method = "psci"; + }; + cpu3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x3>; + enable-method = "psci"; + }; + cpu4: cpu@4 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x100>; + enable-method = "psci"; + }; + cpu5: cpu@5 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x101>; + enable-method = "psci"; + }; + cpu6: cpu@6 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x102>; + enable-method = "psci"; + }; + cpu7: cpu@7 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x103>; + enable-method = "psci"; + }; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + + timer { + compatible = "arm,armv8-timer"; + /* Hypervisor Virtual Timer interrupt is not wired to GIC */ + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | + IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | + IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | + IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | + IRQ_TYPE_LEVEL_LOW)>; + }; + + soc: soc@0 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x0 0x20000000>; + + gic: interrupt-controller@12a01000 { + compatible = "arm,gic-400"; + #interrupt-cells = <3>; + #address-cells = <0>; + reg = <0x12a01000 0x1000>, + <0x12a02000 0x2000>, + <0x12a04000 0x2000>, + <0x12a06000 0x2000>; + interrupt-controller; + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | + IRQ_TYPE_LEVEL_HIGH)>; + }; + + /* + * Keep the stub clock for serial driver, until proper clock + * driver is implemented. + */ + uart_clock: uart-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + clock-output-names = "uart"; + }; + + pinctrl_alive: pinctrl@11850000 { + compatible = "samsung,exynos850-pinctrl"; + reg = <0x11850000 0x1000>; + interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; + + wakeup-interrupt-controller { + compatible = "samsung,exynos7-wakeup-eint"; + }; + }; + + pinctrl_cmgp: pinctrl@11c30000 { + compatible = "samsung,exynos850-pinctrl"; + reg = <0x11c30000 0x1000>; + interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; + + wakeup-interrupt-controller { + compatible = "samsung,exynos7-wakeup-eint"; + }; + }; + + pinctrl_aud: pinctrl@14a60000 { + compatible = "samsung,exynos850-pinctrl"; + reg = <0x14a60000 0x1000>; + }; + + pinctrl_hsi: pinctrl@13430000 { + compatible = "samsung,exynos850-pinctrl"; + reg = <0x13430000 0x1000>; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>; + }; + + pinctrl_core: pinctrl@12070000 { + compatible = "samsung,exynos850-pinctrl"; + reg = <0x12070000 0x1000>; + interrupts = <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>; + }; + + pinctrl_peri: pinctrl@139b0000 { + compatible = "samsung,exynos850-pinctrl"; + reg = <0x139b0000 0x1000>; + interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; + }; + + /* USI: UART */ + serial_0: uart@13820000 { + compatible = "samsung,exynos850-uart"; + reg = <0x13820000 0x100>; + interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&uart0_bus>; + clocks = <&uart_clock>; + clock-names = "uart"; + status = "disabled"; + }; + }; +}; + +#include "exynos850-pinctrl.dtsi"
Samsung Exynos850 is ARMv8-based mobile-oriented SoC. This patch adds minimal SoC support by including next Device Tree nodes: 1. Octa cores (Cortex-A55), supporting PSCI v1.0 2. ARM architecture timer (armv8-timer) 3. Interrupt controller (GIC-400) 4. Pinctrl nodes for GPIO 5. Serial node Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> --- Changes in v3: - Used generic fixed clock for serial Changes in v2: * Commit message: - Documented added dts features instead of CPU features * exynos850-usi.dtsi: - Removed, moved everything to exynos850.dtsi * exynos850.dtsi: - Root node: - Added comment about engineering name (Exynos3830) - Renamed pinctrl nodes, adding domain names - Used hard coded IRQ numbers instead of named constants everywhere - Added soc node, moved next nodes there: gic, clock, pinctrls and serial - Used address-cells=1 for soc node and removed unneeded 0x0 from reg properties - Moved exynos850-pinctrl.dtsi include line to the end of exynos850.dtsi - Coding style fixes - cpus: - Used address-cells=1 for cpus node - Renamed cpu@0001 to cpu@1, and so on - Left only "arm,cortex-a55" for cpus compatible - Renamed reg = <0x0001> to <0x1> for cpus - armv8 timer: - Add comment about missing HV timer IRQ to armv8 timer node - Removed not existing properties from armv8 timer node - Fixed cpu number in CPU_MASK() - Removed obsolete clock-frequency property - GIC: - Fixed GIC type to be GIC-400 - Fixed size of GIC's 2nd region to be 0x2000 - serial node: - Hard coded clock number for serial_0 for now; will replace with named const once proper clock driver is implemented - Removed gate_uart_clk0 clock from serial_0, as that clock is not supported in serial driver anyway (yet) - clock node: - Fixed clock controller node name (@0x12.. -> @12..) * exynos850-pinctrl.dtsi: - Referenced pinctrl nodes instead of defining those again in root node - Fixed interrupt-cells (3 -> 2) - Fixed USI related comments for pin config nodes - Removed decon_f_te_* and fm_lna_en nodes (won't be used) - Reordered pin config nodes by pin numbers - Improved all comments - Used existing named constants for pin-function and pin-pud - Fixed node names (used hyphens instead of underscore) - Fixed warnings found in W=1 build .../boot/dts/exynos/exynos850-pinctrl.dtsi | 748 ++++++++++++++++++ arch/arm64/boot/dts/exynos/exynos850.dtsi | 261 ++++++ 2 files changed, 1009 insertions(+) create mode 100644 arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi create mode 100644 arch/arm64/boot/dts/exynos/exynos850.dtsi