Message ID | 20210726105719.15793-4-chun-jie.chen@mediatek.com |
---|---|
State | Accepted |
Commit | 4af2f62d6fc65e08ca604fab7d7e3beabd927d0d |
Headers | show |
Series | Mediatek MT8192 clock support | expand |
Quoting Chun-Jie Chen (2021-07-26 03:57:01) > This patch adds the audsys document binding for MT8192 SoC. > > Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> > Acked-by: Rob Herring <robh@kernel.org> > --- Applied to clk-next
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt index b32d374193c7..699776be1dd3 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt @@ -13,6 +13,7 @@ Required Properties: - "mediatek,mt7623-audsys", "mediatek,mt2701-audsys", "syscon" - "mediatek,mt8167-audiosys", "syscon" - "mediatek,mt8183-audiosys", "syscon" + - "mediatek,mt8192-audsys", "syscon" - "mediatek,mt8516-audsys", "syscon" - #clock-cells: Must be 1