Message ID | 20210726105719.15793-1-chun-jie.chen@mediatek.com |
---|---|
Headers | show |
Series | Mediatek MT8192 clock support | expand |
On Mon, Jul 26, 2021 at 6:59 PM Chun-Jie Chen <chun-jie.chen@mediatek.com> wrote: > > Not all clock providers need to be marked compatible with "syscon" > for system configuration usage, so use device_node_to_regmap() to > skip "syscon" check. > > Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Reviewed-by: Ikjoon Jang <ikjn@chromium.org> (snip)
On Mon, Jul 26, 2021 at 7:00 PM Chun-Jie Chen <chun-jie.chen@mediatek.com> wrote: > > Most of subsystem clock providers only need to register clock gates > in their probe() function. > To reduce the duplicated code by add a generic function. > > Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> > Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Reviewed-by: Ikjoon Jang <ikjn@chromium.org> (snip)
On Mon, Jul 26, 2021 at 7:03 PM Chun-Jie Chen <chun-jie.chen@mediatek.com> wrote: > > Add MT8192 basic clock providers, include topckgen, apmixedsys, > infracfg and pericfg. > > Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> > Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Reviewed-by: Ikjoon Jang <ikjn@chromium.org> (snip)
On Mon, Jul 26, 2021 at 7:08 PM Chun-Jie Chen <chun-jie.chen@mediatek.com> wrote: > > Add MT8192 camsys and camsys raw clock providers > > Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> > Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Reviewed-by: Ikjoon Jang <ikjn@chromium.org> (snip)
On Mon, Jul 26, 2021 at 7:08 PM Chun-Jie Chen <chun-jie.chen@mediatek.com> wrote: > > Add MT8192 imp i2c wrapper clock provider > > Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> > Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Reviewed-by: Ikjoon Jang <ikjn@chromium.org> (snip)
On Mon, Jul 26, 2021 at 7:09 PM Chun-Jie Chen <chun-jie.chen@mediatek.com> wrote: > > Add MT8192 mfgcfg clock provider > > Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> > Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Reviewed-by: Ikjoon Jang <ikjn@chromium.org> (snip)
On Mon, Jul 26, 2021 at 7:12 PM Chun-Jie Chen <chun-jie.chen@mediatek.com> wrote: > > Add MT8192 scp adsp clock provider > > Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> > Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Reviewed-by: Ikjoon Jang <ikjn@chromium.org> (snip)
On Mon, Jul 26, 2021 at 7:11 PM Chun-Jie Chen <chun-jie.chen@mediatek.com> wrote: > > Add MT8192 vdecsys and vdecsys soc clock providers > > Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> > Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Reviewed-by: Ikjoon Jang <ikjn@chromium.org> (snip)
Quoting Chun-Jie Chen (2021-07-26 03:56:59) > This patch adds the new binding documentation for system clock > and functional clock on Mediatek MT8192. > > Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> > Reviewed-by: Rob Herring <robh@kernel.org> > --- Applied to clk-next
Quoting Chun-Jie Chen (2021-07-26 03:57:01) > This patch adds the audsys document binding for MT8192 SoC. > > Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> > Acked-by: Rob Herring <robh@kernel.org> > --- Applied to clk-next
Quoting Chun-Jie Chen (2021-07-26 03:57:03) > Not all clock providers need to be marked compatible with "syscon" > for system configuration usage, so use device_node_to_regmap() to > skip "syscon" check. > > Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> > --- Applied to clk-next
Quoting Chun-Jie Chen (2021-07-26 03:57:06) > Most of subsystem clock providers only need to register clock gates > in their probe() function. > To reduce the duplicated code by add a generic function. > > Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> > Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> > --- Applied to clk-next
Quoting Chun-Jie Chen (2021-07-26 03:57:07) > Add MT8192 basic clock providers, include topckgen, apmixedsys, > infracfg and pericfg. > > Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> > Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> > --- Applied to clk-next
Quoting Chun-Jie Chen (2021-07-26 03:57:09) > Add MT8192 camsys and camsys raw clock providers > > Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> > Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> > --- Applied to clk-next
Quoting Chun-Jie Chen (2021-07-26 03:57:11) > Add MT8192 imp i2c wrapper clock provider > > Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> > Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> > --- Applied to clk-next
Quoting Chun-Jie Chen (2021-07-26 03:57:14) > Add MT8192 mfgcfg clock provider > > Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> > Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> > --- Applied to clk-next
Quoting Chun-Jie Chen (2021-07-26 03:57:15) > Add MT8192 mmsys clock provider > > Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> > Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> > Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> > --- Applied to clk-next
Quoting Chun-Jie Chen (2021-07-26 03:57:17) > Add MT8192 scp adsp clock provider > > Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> > Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> > --- Applied to clk-next
Quoting Chun-Jie Chen (2021-07-26 03:57:18) > Add MT8192 vdecsys and vdecsys soc clock providers > > Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> > Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> > --- Applied to clk-next