| Message ID | 20210714180635.1648966-2-richard.henderson@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | target/arm: Add sve-default-vector-length cpu property | expand |
On Wed, 14 Jul 2021 at 19:06, Richard Henderson <richard.henderson@linaro.org> wrote: > > Rename from sve_zcr_get_valid_len and make accessible > from outside of helper.c. > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > target/arm/cpu.h | 2 ++ > target/arm/helper.c | 8 +++++--- > 2 files changed, 7 insertions(+), 3 deletions(-) > > diff --git a/target/arm/cpu.h b/target/arm/cpu.h > index be9a4dceae..52e99344c5 100644 > --- a/target/arm/cpu.h > +++ b/target/arm/cpu.h > @@ -1060,6 +1060,8 @@ int arm_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs, > int arm_cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cs, > int cpuid, void *opaque); > > +uint32_t aarch64_sve_zcr_get_valid_len(ARMCPU *cpu, uint32_t start_len); We only need this in cpu.c, I think, so I would favour putting it in internals.h. A brief comment defining its purpose would also be good. > + > #ifdef TARGET_AARCH64 > int aarch64_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); > int aarch64_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); > diff --git a/target/arm/helper.c b/target/arm/helper.c > index 910ace4274..a49067c115 100644 > --- a/target/arm/helper.c > +++ b/target/arm/helper.c > @@ -6454,11 +6454,13 @@ int sve_exception_el(CPUARMState *env, int el) > return 0; > } > > -static uint32_t sve_zcr_get_valid_len(ARMCPU *cpu, uint32_t start_len) > +uint32_t aarch64_sve_zcr_get_valid_len(ARMCPU *cpu, uint32_t start_len) > { > uint32_t end_len; > > - end_len = start_len &= 0xf; > + start_len = MIN(start_len, ARM_MAX_VQ - 1); > + end_len = start_len; > + This seems to also be making a functional change? That should be a separate patch. > if (!test_bit(start_len, cpu->sve_vq_map)) { > end_len = find_last_bit(cpu->sve_vq_map, start_len); > assert(end_len < start_len); > @@ -6484,7 +6486,7 @@ uint32_t sve_zcr_len_for_el(CPUARMState *env, int el) > zcr_len = MIN(zcr_len, 0xf & (uint32_t)env->vfp.zcr_el[3]); > } > > - return sve_zcr_get_valid_len(cpu, zcr_len); > + return aarch64_sve_zcr_get_valid_len(cpu, zcr_len); > } thanks -- PMM
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index be9a4dceae..52e99344c5 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1060,6 +1060,8 @@ int arm_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs, int arm_cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cs, int cpuid, void *opaque); +uint32_t aarch64_sve_zcr_get_valid_len(ARMCPU *cpu, uint32_t start_len); + #ifdef TARGET_AARCH64 int aarch64_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); int aarch64_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); diff --git a/target/arm/helper.c b/target/arm/helper.c index 910ace4274..a49067c115 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -6454,11 +6454,13 @@ int sve_exception_el(CPUARMState *env, int el) return 0; } -static uint32_t sve_zcr_get_valid_len(ARMCPU *cpu, uint32_t start_len) +uint32_t aarch64_sve_zcr_get_valid_len(ARMCPU *cpu, uint32_t start_len) { uint32_t end_len; - end_len = start_len &= 0xf; + start_len = MIN(start_len, ARM_MAX_VQ - 1); + end_len = start_len; + if (!test_bit(start_len, cpu->sve_vq_map)) { end_len = find_last_bit(cpu->sve_vq_map, start_len); assert(end_len < start_len); @@ -6484,7 +6486,7 @@ uint32_t sve_zcr_len_for_el(CPUARMState *env, int el) zcr_len = MIN(zcr_len, 0xf & (uint32_t)env->vfp.zcr_el[3]); } - return sve_zcr_get_valid_len(cpu, zcr_len); + return aarch64_sve_zcr_get_valid_len(cpu, zcr_len); } static void zcr_write(CPUARMState *env, const ARMCPRegInfo *ri,
Rename from sve_zcr_get_valid_len and make accessible from outside of helper.c. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- target/arm/cpu.h | 2 ++ target/arm/helper.c | 8 +++++--- 2 files changed, 7 insertions(+), 3 deletions(-) -- 2.25.1