| Message ID | 20210622020517.13100-1-cl@rock-chips.com |
|---|---|
| Headers | show |
| Series | arm64: dts: rockchip: add basic dtsi/dts files for RK3568 SoC | expand |
Hi Chris, Heiko, On 6/22/21 4:05 AM, cl@rock-chips.com wrote: > From: Liang Chen <cl@rock-chips.com> > > RK3568 is a high-performance and low power quad-core application processor > designed for personal mobile internet device and AIoT equipment. This patch > add basic core dtsi file for it. > > We use scmi_clk for cortex-a55 instead of standard ARMCLK, so that > kernel/uboot/rtos can change cpu clk with the same code in ATF, and we will > enalbe a special high-performance PLL when high frequency is required. The > smci_clk code is in ATF, and clkid for cpu is 0, as below: > > cpu0: cpu@0 { > device_type = "cpu"; > compatible = "arm,cortex-a55"; > reg = <0x0 0x0>; > clocks = <&scmi_clk 0>; > }; > > Signed-off-by: Liang Chen <cl@rock-chips.com> > --- > .../boot/dts/rockchip/rk3568-pinctrl.dtsi | 3111 +++++++++++++++++ > arch/arm64/boot/dts/rockchip/rk3568.dtsi | 777 ++++ > 2 files changed, 3888 insertions(+) > create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-pinctrl.dtsi > create mode 100644 arch/arm64/boot/dts/rockchip/rk3568.dtsi > > diff --git a/arch/arm64/boot/dts/rockchip/rk3568-pinctrl.dtsi b/arch/arm64/boot/dts/rockchip/rk3568-pinctrl.dtsi > new file mode 100644 > index 000000000000..a588ca95ace2 > --- /dev/null > +++ b/arch/arm64/boot/dts/rockchip/rk3568-pinctrl.dtsi > @@ -0,0 +1,3111 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Copyright (c) 2021 Rockchip Electronics Co., Ltd. > + */ > + > +#include <dt-bindings/pinctrl/rockchip.h> > +#include "rockchip-pinconf.dtsi" Question for Heiko: This file is put in the arm64 directory. Is it useful for ARM as well? Should the ARM directory have it's own or use a long include? ARM: #include "../../../arm64/boot/dts/rockchip/rockchip-pinconf.dtsi" arm64: #include "rockchip-pinconf.dtsi" Is it complete or does it need more items? (Who's going to change that?) arch/arm/boot/dts/rk3066a.dtsi:373.23-375.6: ERROR (phandle_references): /pinctrl/emmc/emmc-clk: Reference to non-existent node or label "pcfg_pull_default" arch/arm/boot/dts/rv1108.dtsi:645.25-654.6: ERROR (phandle_references): /pinctrl/emmc/emmc-bus8: Reference to non-existent node or label "pcfg_pull_up_drv_8ma" arch/arm64/boot/dts/rockchip/px30.dtsi:1470.23-1473.6: ERROR (phandle_references): /pinctrl/spi0/spi0-clk: Reference to non-existent node or label "pcfg_pull_up_4ma" arch/arm64/boot/dts/rockchip/px30.dtsi:1490.29-1493.6: ERROR (phandle_references): /pinctrl/spi0/spi0-clk-hs: Reference to non-existent node or label "pcfg_pull_up_8ma" arch/arm64/boot/dts/rockchip/px30.dtsi:1589.39-1592.6: ERROR (phandle_references): /pinctrl/pdm/pdm-clk0m0-sleep: Reference to non-existent node or label "pcfg_input_high" arch/arm64/boot/dts/rockchip/px30.dtsi:1903.49-1906.6: ERROR (phandle_references): /pinctrl/lcdc/lcdc-rgb-m0-hsync-pin: Reference to non-existent node or label "pcfg_pull_none_12ma" etc.. > + > +/* > + * This file is auto generated by pin2dts tool, please keep these code > + * by adding changes at end of this file. > + */ > +&pinctrl { [..]
On Mon, 05 Jul 2021, Uwe Kleine-König wrote: > On Wed, Jun 23, 2021 at 10:13:03AM +0800, cl@rock-chips.com wrote: > > From: Liang Chen <cl@rock-chips.com> > > > > add "rockchip,rk3568-pwm", "rockchip,rk3328-pwm" for pwm nodes on > > a rk3568 platform to pwm-rockchip.yaml. > > Looks good to me > > Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> > > Who is supposed to apply this patch? Does this need blessing by Rob? There is no standard. Rob will usually have some kind of arrangement with the associated maintainer(s). If this is a big functional change, I would suggest letting Rob and his army of bots give it the once over before it is applied in any case.
Am Montag, 5. Juli 2021, 09:44:05 CEST schrieb Uwe Kleine-König: > Hello Lee, > > On Mon, Jul 05, 2021 at 08:34:18AM +0100, Lee Jones wrote: > > On Mon, 05 Jul 2021, Uwe Kleine-König wrote: > > > On Wed, Jun 23, 2021 at 10:13:03AM +0800, cl@rock-chips.com wrote: > > > > From: Liang Chen <cl@rock-chips.com> > > > > > > > > add "rockchip,rk3568-pwm", "rockchip,rk3328-pwm" for pwm nodes on > > > > a rk3568 platform to pwm-rockchip.yaml. > > > > > > [...] > > > > > > Who is supposed to apply this patch? Does this need blessing by Rob? > > > > There is no standard. [...] > > I'm aware of that. That's why I asked to prevent that everybody thinks > some other maintainer will care for it. I suppose Thierry would be the one responsible? I.e. bindings normally go through the subsystem tree and $ scripts/get_maintainer.pl drivers/pwm returns: Thierry Reding <thierry.reding@gmail.com> (maintainer:PWM SUBSYSTEM) "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de> (reviewer:PWM SUBSYSTEM) Lee Jones <lee.jones@linaro.org> (maintainer:PWM SUBSYSTEM) linux-pwm@vger.kernel.org (open list:PWM SUBSYSTEM) linux-kernel@vger.kernel.org (open list) See my reply to the original pwm binding patch from 2021-06-21. Heiko
On Wed, 23 Jun 2021 10:13:03 +0800, cl@rock-chips.com wrote: > From: Liang Chen <cl@rock-chips.com> > > add "rockchip,rk3568-pwm", "rockchip,rk3328-pwm" for pwm nodes on > a rk3568 platform to pwm-rockchip.yaml. > > Signed-off-by: Liang Chen <cl@rock-chips.com> > --- > Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml | 1 + > 1 file changed, 1 insertion(+) > Acked-by: Rob Herring <robh@kernel.org>
From: Liang Chen <cl@rock-chips.com> v1: 1. add some dt-bindings for RK3568 devices. 2. add core dtsi for RK3568 SoC. 3. add basic dts for RK3568 EVB v2: 1. sort device nodes by some rules. v3: 1. make ARCH=arm64 dtbs_check, then fix some errors and add some documents. v4: 1. make ARCH=arm64 dt_binding_check, then fix grf.yaml. 2. correct gic node. v5: 1. remove some patchs already applied. Liang Chen (4): dt-bindings: pwm: rockchip: add description for rk3568 arm64: dts: rockchip: add generic pinconfig settings used by most Rockchip socs arm64: dts: rockchip: add core dtsi for RK3568 SoC arm64: dts: rockchip: add basic dts for RK3568 EVB .../devicetree/bindings/arm/rockchip.yaml | 5 + .../devicetree/bindings/pwm/pwm-rockchip.yaml | 1 + arch/arm64/boot/dts/rockchip/Makefile | 1 + .../boot/dts/rockchip/rk3568-evb1-v10.dts | 79 + .../boot/dts/rockchip/rk3568-pinctrl.dtsi | 3111 +++++++++++++++++ arch/arm64/boot/dts/rockchip/rk3568.dtsi | 777 ++++ .../boot/dts/rockchip/rockchip-pinconf.dtsi | 344 ++ 7 files changed, 4318 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-pinctrl.dtsi create mode 100644 arch/arm64/boot/dts/rockchip/rk3568.dtsi create mode 100644 arch/arm64/boot/dts/rockchip/rockchip-pinconf.dtsi