| Message ID | 20210625074213.654274-1-martin@geanix.com |
|---|---|
| Headers | show |
| Series | fpga/mfd/hwmon: Initial support for Silicom N5010 PAC | expand |
On Fri, Jun 25, 2021 at 09:42:09AM +0200, Martin Hundebøll wrote: > From: Martin Hundebøll <mhu@silicom.dk> > > This adds the approved PCI Express Device IDs for the Silicom PAC N5010 > and N5011 cards (aka. Silicom Lightning Creek cards). > > The N5010 features an FPGA that manages/interfaces four QSFP ports, and > allows on-board custom packet processing/filtering/routing, based on > logic loaded with user-provided FPGA bitstreams. > > The N5011 cards adds a PCIe switch that exposes, in addition to the FPGA > itself, two Intel E810 (aka Columbiaville) ethernet controllers. With > this, packets can be forwarded from the FPGA to the host for further > processing. > > Signed-off-by: Martin Hundebøll <mhu@silicom.dk> > Acked-by: Wu Hao <hao.wu@intel.com> > --- > > Changes since v1: > * Commit message is updated with card description > * Added Hao's Acked-by > > drivers/fpga/dfl-pci.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/drivers/fpga/dfl-pci.c b/drivers/fpga/dfl-pci.c > index b44523ea8c91..4d68719e608f 100644 > --- a/drivers/fpga/dfl-pci.c > +++ b/drivers/fpga/dfl-pci.c > @@ -74,6 +74,9 @@ static void cci_pci_free_irq(struct pci_dev *pcidev) > #define PCIE_DEVICE_ID_PF_DSC_1_X 0x09C4 > #define PCIE_DEVICE_ID_INTEL_PAC_N3000 0x0B30 > #define PCIE_DEVICE_ID_INTEL_PAC_D5005 0x0B2B > +#define PCIE_DEVICE_ID_SILICOM_PAC_N5010 0x1000 > +#define PCIE_DEVICE_ID_SILICOM_PAC_N5011 0x1001 > + > /* VF Device */ > #define PCIE_DEVICE_ID_VF_INT_5_X 0xBCBF > #define PCIE_DEVICE_ID_VF_INT_6_X 0xBCC1 > @@ -90,6 +93,8 @@ static struct pci_device_id cci_pcie_id_tbl[] = { > {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_PAC_N3000),}, > {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_PAC_D5005),}, > {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_PAC_D5005_VF),}, > + {PCI_DEVICE(PCI_VENDOR_ID_SILICOM_DENMARK, PCIE_DEVICE_ID_SILICOM_PAC_N5010),}, > + {PCI_DEVICE(PCI_VENDOR_ID_SILICOM_DENMARK, PCIE_DEVICE_ID_SILICOM_PAC_N5011),}, > {0,} > }; > MODULE_DEVICE_TABLE(pci, cci_pcie_id_tbl); > -- > 2.31.0 > Applied to for-next. Thanks
It is good to me. On Fri, Jun 25, 2021 at 09:42:11AM +0200, Martin Hundebøll wrote: > From: Martin Hundebøll <mhu@silicom.dk> > > The Max10 BMC on the Silicom n5010 PAC is slightly different than the > existing BMC's, so use a dedicated feature revision detect it. > > Signed-off-by: Martin Hundebøll <mhu@silicom.dk> > --- > > Changes since v1: > * use feature revision from struct dfl_device instead of reading it > from io-mem > > drivers/spi/spi-altera-dfl.c | 15 +++++++++++++-- > 1 file changed, 13 insertions(+), 2 deletions(-) > > diff --git a/drivers/spi/spi-altera-dfl.c b/drivers/spi/spi-altera-dfl.c > index 3e32e4fe5895..f6cf7c8d9dac 100644 > --- a/drivers/spi/spi-altera-dfl.c > +++ b/drivers/spi/spi-altera-dfl.c > @@ -111,6 +111,13 @@ static struct spi_board_info m10_bmc_info = { > .chip_select = 0, > }; > > +static struct spi_board_info m10_n5010_bmc_info = { > + .modalias = "m10-n5010", > + .max_speed_hz = 12500000, > + .bus_num = 0, > + .chip_select = 0, > +}; > + > static void config_spi_master(void __iomem *base, struct spi_master *master) > { > u64 v; > @@ -130,6 +137,7 @@ static void config_spi_master(void __iomem *base, struct spi_master *master) > > static int dfl_spi_altera_probe(struct dfl_device *dfl_dev) > { > + struct spi_board_info *board_info = &m10_bmc_info; > struct device *dev = &dfl_dev->dev; > struct spi_master *master; > struct altera_spi *hw; > @@ -172,9 +180,12 @@ static int dfl_spi_altera_probe(struct dfl_device *dfl_dev) > goto exit; > } > > - if (!spi_new_device(master, &m10_bmc_info)) { > + if (dfl_dev->revision == FME_FEATURE_REV_MAX10_SPI_N5010) > + board_info = &m10_n5010_bmc_info; > + > + if (!spi_new_device(master, board_info)) { > dev_err(dev, "%s failed to create SPI device: %s\n", > - __func__, m10_bmc_info.modalias); > + __func__, board_info->modalias); > } > > return 0; > -- > 2.31.0
It is good to me. On Fri, Jun 25, 2021 at 09:42:13AM +0200, Martin Hundebøll wrote: > From: Martin Hundebøll <mhu@silicom.dk> > > Add the list of sensors supported by the Silicom n5010 PAC, and enable > the drivers as a subtype of the intel-m10-bmc multi-function driver. > > Signed-off-by: Martin Hundebøll <mhu@silicom.dk> > --- > > Changes since v1: > * Patch split out to separate hwmon changes > > drivers/hwmon/intel-m10-bmc-hwmon.c | 116 ++++++++++++++++++++++++++++ > 1 file changed, 116 insertions(+) > > diff --git a/drivers/hwmon/intel-m10-bmc-hwmon.c b/drivers/hwmon/intel-m10-bmc-hwmon.c > index bd7ed2ed3a1e..7a08e4c44a4b 100644 > --- a/drivers/hwmon/intel-m10-bmc-hwmon.c > +++ b/drivers/hwmon/intel-m10-bmc-hwmon.c > @@ -228,6 +228,118 @@ static const struct m10bmc_hwmon_board_data d5005bmc_hwmon_bdata = { > .hinfo = d5005bmc_hinfo, > }; > > +static const struct m10bmc_sdata n5010bmc_temp_tbl[] = { > + { 0x100, 0x0, 0x104, 0x0, 0x0, 1000, "Board Local Temperature" }, > + { 0x108, 0x0, 0x10c, 0x0, 0x0, 1000, "FPGA 1 Temperature" }, > + { 0x110, 0x0, 0x114, 0x0, 0x0, 1000, "FPGA 2 Temperature" }, > + { 0x118, 0x0, 0x0, 0x0, 0x0, 1000, "Card Top Temperature" }, > + { 0x11c, 0x0, 0x0, 0x0, 0x0, 1000, "Card Bottom Temperature" }, > + { 0x128, 0x0, 0x0, 0x0, 0x0, 1000, "FPGA 1.2V Temperature" }, > + { 0x134, 0x0, 0x0, 0x0, 0x0, 1000, "FPGA 5V Temperature" }, > + { 0x140, 0x0, 0x0, 0x0, 0x0, 1000, "FPGA 0.9V Temperature" }, > + { 0x14c, 0x0, 0x0, 0x0, 0x0, 1000, "FPGA 0.85V Temperature" }, > + { 0x158, 0x0, 0x0, 0x0, 0x0, 1000, "AUX 12V Temperature" }, > + { 0x164, 0x0, 0x0, 0x0, 0x0, 1000, "Backplane 12V Temperature" }, > + { 0x1a8, 0x0, 0x0, 0x0, 0x0, 1000, "QSFP28-1 Temperature" }, > + { 0x1ac, 0x0, 0x0, 0x0, 0x0, 1000, "QSFP28-2 Temperature" }, > + { 0x1b0, 0x0, 0x0, 0x0, 0x0, 1000, "QSFP28-3 Temperature" }, > + { 0x1b4, 0x0, 0x0, 0x0, 0x0, 1000, "QSFP28-4 Temperature" }, > + { 0x1b8, 0x0, 0x0, 0x0, 0x0, 1000, "CVL1 Internal Temperature" }, > + { 0x1bc, 0x0, 0x0, 0x0, 0x0, 1000, "CVL2 Internal Temperature" }, > +}; > + > +static const struct m10bmc_sdata n5010bmc_in_tbl[] = { > + { 0x120, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 1.2V Voltage" }, > + { 0x12c, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 5V Voltage" }, > + { 0x138, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 0.9V Voltage" }, > + { 0x144, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 0.85V Voltage" }, > + { 0x150, 0x0, 0x0, 0x0, 0x0, 1, "AUX 12V Voltage" }, > + { 0x15c, 0x0, 0x0, 0x0, 0x0, 1, "Backplane 12V Voltage" }, > + { 0x16c, 0x0, 0x0, 0x0, 0x0, 1, "DDR4 1.2V Voltage" }, > + { 0x17c, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 1.8V Voltage" }, > + { 0x184, 0x0, 0x0, 0x0, 0x0, 1, "QDR 1.3V Voltage" }, > + { 0x18c, 0x0, 0x0, 0x0, 0x0, 1, "CVL1 0.8V Voltage" }, > + { 0x194, 0x0, 0x0, 0x0, 0x0, 1, "CVL1 1.05V Voltage" }, > + { 0x19c, 0x0, 0x0, 0x0, 0x0, 1, "CVL2 1.05V Voltage" }, > + { 0x1a4, 0x0, 0x0, 0x0, 0x0, 1, "CVL2 0.8V Voltage" }, > +}; > + > +static const struct m10bmc_sdata n5010bmc_curr_tbl[] = { > + { 0x124, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 1.2V Current" }, > + { 0x130, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 5V Current" }, > + { 0x13c, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 0.9V Current" }, > + { 0x148, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 0.85V Current" }, > + { 0x154, 0x0, 0x0, 0x0, 0x0, 1, "AUX 12V Current" }, > + { 0x160, 0x0, 0x0, 0x0, 0x0, 1, "Backplane 12V Current" }, > + { 0x168, 0x0, 0x0, 0x0, 0x0, 1, "DDR4 1.2V Current" }, > + { 0x178, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 1.8V Current" }, > + { 0x180, 0x0, 0x0, 0x0, 0x0, 1, "QDR 1.3V Current" }, > + { 0x188, 0x0, 0x0, 0x0, 0x0, 1, "CVL1 0.8V Current" }, > + { 0x190, 0x0, 0x0, 0x0, 0x0, 1, "CVL1 1.05V Current" }, > + { 0x198, 0x0, 0x0, 0x0, 0x0, 1, "CVL2 1.05V Current" }, > + { 0x1a0, 0x0, 0x0, 0x0, 0x0, 1, "CVL2 0.8V Current" }, > +}; > + > +static const struct hwmon_channel_info *n5010bmc_hinfo[] = { > + HWMON_CHANNEL_INFO(temp, > + HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_LABEL, > + HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_LABEL, > + HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_LABEL, > + HWMON_T_INPUT | HWMON_T_LABEL, > + HWMON_T_INPUT | HWMON_T_LABEL, > + HWMON_T_INPUT | HWMON_T_LABEL, > + HWMON_T_INPUT | HWMON_T_LABEL, > + HWMON_T_INPUT | HWMON_T_LABEL, > + HWMON_T_INPUT | HWMON_T_LABEL, > + HWMON_T_INPUT | HWMON_T_LABEL, > + HWMON_T_INPUT | HWMON_T_LABEL, > + HWMON_T_INPUT | HWMON_T_LABEL, > + HWMON_T_INPUT | HWMON_T_LABEL, > + HWMON_T_INPUT | HWMON_T_LABEL, > + HWMON_T_INPUT | HWMON_T_LABEL, > + HWMON_T_INPUT | HWMON_T_LABEL, > + HWMON_T_INPUT | HWMON_T_LABEL), > + HWMON_CHANNEL_INFO(in, > + HWMON_I_INPUT | HWMON_I_LABEL, > + HWMON_I_INPUT | HWMON_I_LABEL, > + HWMON_I_INPUT | HWMON_I_LABEL, > + HWMON_I_INPUT | HWMON_I_LABEL, > + HWMON_I_INPUT | HWMON_I_LABEL, > + HWMON_I_INPUT | HWMON_I_LABEL, > + HWMON_I_INPUT | HWMON_I_LABEL, > + HWMON_I_INPUT | HWMON_I_LABEL, > + HWMON_I_INPUT | HWMON_I_LABEL, > + HWMON_I_INPUT | HWMON_I_LABEL, > + HWMON_I_INPUT | HWMON_I_LABEL, > + HWMON_I_INPUT | HWMON_I_LABEL, > + HWMON_I_INPUT | HWMON_I_LABEL), > + HWMON_CHANNEL_INFO(curr, > + HWMON_C_INPUT | HWMON_C_LABEL, > + HWMON_C_INPUT | HWMON_C_LABEL, > + HWMON_C_INPUT | HWMON_C_LABEL, > + HWMON_C_INPUT | HWMON_C_LABEL, > + HWMON_C_INPUT | HWMON_C_LABEL, > + HWMON_C_INPUT | HWMON_C_LABEL, > + HWMON_C_INPUT | HWMON_C_LABEL, > + HWMON_C_INPUT | HWMON_C_LABEL, > + HWMON_C_INPUT | HWMON_C_LABEL, > + HWMON_C_INPUT | HWMON_C_LABEL, > + HWMON_C_INPUT | HWMON_C_LABEL, > + HWMON_C_INPUT | HWMON_C_LABEL, > + HWMON_C_INPUT | HWMON_C_LABEL), > + NULL > +}; > + > +static const struct m10bmc_hwmon_board_data n5010bmc_hwmon_bdata = { > + .tables = { > + [hwmon_temp] = n5010bmc_temp_tbl, > + [hwmon_in] = n5010bmc_in_tbl, > + [hwmon_curr] = n5010bmc_curr_tbl, > + }, > + > + .hinfo = n5010bmc_hinfo, > +}; > + > static umode_t > m10bmc_hwmon_is_visible(const void *data, enum hwmon_sensor_types type, > u32 attr, int channel) > @@ -438,6 +550,10 @@ static const struct platform_device_id intel_m10bmc_hwmon_ids[] = { > .name = "d5005bmc-hwmon", > .driver_data = (unsigned long)&d5005bmc_hwmon_bdata, > }, > + { > + .name = "n5010bmc-hwmon", > + .driver_data = (unsigned long)&n5010bmc_hwmon_bdata, > + }, > { } > }; > > -- > 2.31.0
On 6/27/21 11:00 PM, Xu Yilun wrote: > It is good to me. > As already pointed out, please don't top-post, and provide a formal Reviewed-by: or Acked-by: tag. Thanks, Guenter > On Fri, Jun 25, 2021 at 09:42:13AM +0200, Martin Hundebøll wrote: >> From: Martin Hundebøll <mhu@silicom.dk> >> >> Add the list of sensors supported by the Silicom n5010 PAC, and enable >> the drivers as a subtype of the intel-m10-bmc multi-function driver. >> >> Signed-off-by: Martin Hundebøll <mhu@silicom.dk> >> --- >> >> Changes since v1: >> * Patch split out to separate hwmon changes >> >> drivers/hwmon/intel-m10-bmc-hwmon.c | 116 ++++++++++++++++++++++++++++ >> 1 file changed, 116 insertions(+) >> >> diff --git a/drivers/hwmon/intel-m10-bmc-hwmon.c b/drivers/hwmon/intel-m10-bmc-hwmon.c >> index bd7ed2ed3a1e..7a08e4c44a4b 100644 >> --- a/drivers/hwmon/intel-m10-bmc-hwmon.c >> +++ b/drivers/hwmon/intel-m10-bmc-hwmon.c >> @@ -228,6 +228,118 @@ static const struct m10bmc_hwmon_board_data d5005bmc_hwmon_bdata = { >> .hinfo = d5005bmc_hinfo, >> }; >> >> +static const struct m10bmc_sdata n5010bmc_temp_tbl[] = { >> + { 0x100, 0x0, 0x104, 0x0, 0x0, 1000, "Board Local Temperature" }, >> + { 0x108, 0x0, 0x10c, 0x0, 0x0, 1000, "FPGA 1 Temperature" }, >> + { 0x110, 0x0, 0x114, 0x0, 0x0, 1000, "FPGA 2 Temperature" }, >> + { 0x118, 0x0, 0x0, 0x0, 0x0, 1000, "Card Top Temperature" }, >> + { 0x11c, 0x0, 0x0, 0x0, 0x0, 1000, "Card Bottom Temperature" }, >> + { 0x128, 0x0, 0x0, 0x0, 0x0, 1000, "FPGA 1.2V Temperature" }, >> + { 0x134, 0x0, 0x0, 0x0, 0x0, 1000, "FPGA 5V Temperature" }, >> + { 0x140, 0x0, 0x0, 0x0, 0x0, 1000, "FPGA 0.9V Temperature" }, >> + { 0x14c, 0x0, 0x0, 0x0, 0x0, 1000, "FPGA 0.85V Temperature" }, >> + { 0x158, 0x0, 0x0, 0x0, 0x0, 1000, "AUX 12V Temperature" }, >> + { 0x164, 0x0, 0x0, 0x0, 0x0, 1000, "Backplane 12V Temperature" }, >> + { 0x1a8, 0x0, 0x0, 0x0, 0x0, 1000, "QSFP28-1 Temperature" }, >> + { 0x1ac, 0x0, 0x0, 0x0, 0x0, 1000, "QSFP28-2 Temperature" }, >> + { 0x1b0, 0x0, 0x0, 0x0, 0x0, 1000, "QSFP28-3 Temperature" }, >> + { 0x1b4, 0x0, 0x0, 0x0, 0x0, 1000, "QSFP28-4 Temperature" }, >> + { 0x1b8, 0x0, 0x0, 0x0, 0x0, 1000, "CVL1 Internal Temperature" }, >> + { 0x1bc, 0x0, 0x0, 0x0, 0x0, 1000, "CVL2 Internal Temperature" }, >> +}; >> + >> +static const struct m10bmc_sdata n5010bmc_in_tbl[] = { >> + { 0x120, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 1.2V Voltage" }, >> + { 0x12c, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 5V Voltage" }, >> + { 0x138, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 0.9V Voltage" }, >> + { 0x144, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 0.85V Voltage" }, >> + { 0x150, 0x0, 0x0, 0x0, 0x0, 1, "AUX 12V Voltage" }, >> + { 0x15c, 0x0, 0x0, 0x0, 0x0, 1, "Backplane 12V Voltage" }, >> + { 0x16c, 0x0, 0x0, 0x0, 0x0, 1, "DDR4 1.2V Voltage" }, >> + { 0x17c, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 1.8V Voltage" }, >> + { 0x184, 0x0, 0x0, 0x0, 0x0, 1, "QDR 1.3V Voltage" }, >> + { 0x18c, 0x0, 0x0, 0x0, 0x0, 1, "CVL1 0.8V Voltage" }, >> + { 0x194, 0x0, 0x0, 0x0, 0x0, 1, "CVL1 1.05V Voltage" }, >> + { 0x19c, 0x0, 0x0, 0x0, 0x0, 1, "CVL2 1.05V Voltage" }, >> + { 0x1a4, 0x0, 0x0, 0x0, 0x0, 1, "CVL2 0.8V Voltage" }, >> +}; >> + >> +static const struct m10bmc_sdata n5010bmc_curr_tbl[] = { >> + { 0x124, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 1.2V Current" }, >> + { 0x130, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 5V Current" }, >> + { 0x13c, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 0.9V Current" }, >> + { 0x148, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 0.85V Current" }, >> + { 0x154, 0x0, 0x0, 0x0, 0x0, 1, "AUX 12V Current" }, >> + { 0x160, 0x0, 0x0, 0x0, 0x0, 1, "Backplane 12V Current" }, >> + { 0x168, 0x0, 0x0, 0x0, 0x0, 1, "DDR4 1.2V Current" }, >> + { 0x178, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 1.8V Current" }, >> + { 0x180, 0x0, 0x0, 0x0, 0x0, 1, "QDR 1.3V Current" }, >> + { 0x188, 0x0, 0x0, 0x0, 0x0, 1, "CVL1 0.8V Current" }, >> + { 0x190, 0x0, 0x0, 0x0, 0x0, 1, "CVL1 1.05V Current" }, >> + { 0x198, 0x0, 0x0, 0x0, 0x0, 1, "CVL2 1.05V Current" }, >> + { 0x1a0, 0x0, 0x0, 0x0, 0x0, 1, "CVL2 0.8V Current" }, >> +}; >> + >> +static const struct hwmon_channel_info *n5010bmc_hinfo[] = { >> + HWMON_CHANNEL_INFO(temp, >> + HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_LABEL, >> + HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_LABEL, >> + HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_LABEL, >> + HWMON_T_INPUT | HWMON_T_LABEL, >> + HWMON_T_INPUT | HWMON_T_LABEL, >> + HWMON_T_INPUT | HWMON_T_LABEL, >> + HWMON_T_INPUT | HWMON_T_LABEL, >> + HWMON_T_INPUT | HWMON_T_LABEL, >> + HWMON_T_INPUT | HWMON_T_LABEL, >> + HWMON_T_INPUT | HWMON_T_LABEL, >> + HWMON_T_INPUT | HWMON_T_LABEL, >> + HWMON_T_INPUT | HWMON_T_LABEL, >> + HWMON_T_INPUT | HWMON_T_LABEL, >> + HWMON_T_INPUT | HWMON_T_LABEL, >> + HWMON_T_INPUT | HWMON_T_LABEL, >> + HWMON_T_INPUT | HWMON_T_LABEL, >> + HWMON_T_INPUT | HWMON_T_LABEL), >> + HWMON_CHANNEL_INFO(in, >> + HWMON_I_INPUT | HWMON_I_LABEL, >> + HWMON_I_INPUT | HWMON_I_LABEL, >> + HWMON_I_INPUT | HWMON_I_LABEL, >> + HWMON_I_INPUT | HWMON_I_LABEL, >> + HWMON_I_INPUT | HWMON_I_LABEL, >> + HWMON_I_INPUT | HWMON_I_LABEL, >> + HWMON_I_INPUT | HWMON_I_LABEL, >> + HWMON_I_INPUT | HWMON_I_LABEL, >> + HWMON_I_INPUT | HWMON_I_LABEL, >> + HWMON_I_INPUT | HWMON_I_LABEL, >> + HWMON_I_INPUT | HWMON_I_LABEL, >> + HWMON_I_INPUT | HWMON_I_LABEL, >> + HWMON_I_INPUT | HWMON_I_LABEL), >> + HWMON_CHANNEL_INFO(curr, >> + HWMON_C_INPUT | HWMON_C_LABEL, >> + HWMON_C_INPUT | HWMON_C_LABEL, >> + HWMON_C_INPUT | HWMON_C_LABEL, >> + HWMON_C_INPUT | HWMON_C_LABEL, >> + HWMON_C_INPUT | HWMON_C_LABEL, >> + HWMON_C_INPUT | HWMON_C_LABEL, >> + HWMON_C_INPUT | HWMON_C_LABEL, >> + HWMON_C_INPUT | HWMON_C_LABEL, >> + HWMON_C_INPUT | HWMON_C_LABEL, >> + HWMON_C_INPUT | HWMON_C_LABEL, >> + HWMON_C_INPUT | HWMON_C_LABEL, >> + HWMON_C_INPUT | HWMON_C_LABEL, >> + HWMON_C_INPUT | HWMON_C_LABEL), >> + NULL >> +}; >> + >> +static const struct m10bmc_hwmon_board_data n5010bmc_hwmon_bdata = { >> + .tables = { >> + [hwmon_temp] = n5010bmc_temp_tbl, >> + [hwmon_in] = n5010bmc_in_tbl, >> + [hwmon_curr] = n5010bmc_curr_tbl, >> + }, >> + >> + .hinfo = n5010bmc_hinfo, >> +}; >> + >> static umode_t >> m10bmc_hwmon_is_visible(const void *data, enum hwmon_sensor_types type, >> u32 attr, int channel) >> @@ -438,6 +550,10 @@ static const struct platform_device_id intel_m10bmc_hwmon_ids[] = { >> .name = "d5005bmc-hwmon", >> .driver_data = (unsigned long)&d5005bmc_hwmon_bdata, >> }, >> + { >> + .name = "n5010bmc-hwmon", >> + .driver_data = (unsigned long)&n5010bmc_hwmon_bdata, >> + }, >> { } >> }; >> >> -- >> 2.31.0
On Fri, Jun 25, 2021 at 09:42:13AM +0200, Martin Hundebøll wrote: > From: Martin Hundebøll <mhu@silicom.dk> > > Add the list of sensors supported by the Silicom n5010 PAC, and enable > the drivers as a subtype of the intel-m10-bmc multi-function driver. > > Signed-off-by: Martin Hundebøll <mhu@silicom.dk> For my reference: Reviewed-by: Guenter Roeck <linux@roeck-us.net> Not sure if I can apply this patch as-is to hwmon, or if it needs to wait for the other patches in the series. Any thoughts / comments ? Guenter > --- > > Changes since v1: > * Patch split out to separate hwmon changes > > drivers/hwmon/intel-m10-bmc-hwmon.c | 116 ++++++++++++++++++++++++++++ > 1 file changed, 116 insertions(+) > > diff --git a/drivers/hwmon/intel-m10-bmc-hwmon.c b/drivers/hwmon/intel-m10-bmc-hwmon.c > index bd7ed2ed3a1e..7a08e4c44a4b 100644 > --- a/drivers/hwmon/intel-m10-bmc-hwmon.c > +++ b/drivers/hwmon/intel-m10-bmc-hwmon.c > @@ -228,6 +228,118 @@ static const struct m10bmc_hwmon_board_data d5005bmc_hwmon_bdata = { > .hinfo = d5005bmc_hinfo, > }; > > +static const struct m10bmc_sdata n5010bmc_temp_tbl[] = { > + { 0x100, 0x0, 0x104, 0x0, 0x0, 1000, "Board Local Temperature" }, > + { 0x108, 0x0, 0x10c, 0x0, 0x0, 1000, "FPGA 1 Temperature" }, > + { 0x110, 0x0, 0x114, 0x0, 0x0, 1000, "FPGA 2 Temperature" }, > + { 0x118, 0x0, 0x0, 0x0, 0x0, 1000, "Card Top Temperature" }, > + { 0x11c, 0x0, 0x0, 0x0, 0x0, 1000, "Card Bottom Temperature" }, > + { 0x128, 0x0, 0x0, 0x0, 0x0, 1000, "FPGA 1.2V Temperature" }, > + { 0x134, 0x0, 0x0, 0x0, 0x0, 1000, "FPGA 5V Temperature" }, > + { 0x140, 0x0, 0x0, 0x0, 0x0, 1000, "FPGA 0.9V Temperature" }, > + { 0x14c, 0x0, 0x0, 0x0, 0x0, 1000, "FPGA 0.85V Temperature" }, > + { 0x158, 0x0, 0x0, 0x0, 0x0, 1000, "AUX 12V Temperature" }, > + { 0x164, 0x0, 0x0, 0x0, 0x0, 1000, "Backplane 12V Temperature" }, > + { 0x1a8, 0x0, 0x0, 0x0, 0x0, 1000, "QSFP28-1 Temperature" }, > + { 0x1ac, 0x0, 0x0, 0x0, 0x0, 1000, "QSFP28-2 Temperature" }, > + { 0x1b0, 0x0, 0x0, 0x0, 0x0, 1000, "QSFP28-3 Temperature" }, > + { 0x1b4, 0x0, 0x0, 0x0, 0x0, 1000, "QSFP28-4 Temperature" }, > + { 0x1b8, 0x0, 0x0, 0x0, 0x0, 1000, "CVL1 Internal Temperature" }, > + { 0x1bc, 0x0, 0x0, 0x0, 0x0, 1000, "CVL2 Internal Temperature" }, > +}; > + > +static const struct m10bmc_sdata n5010bmc_in_tbl[] = { > + { 0x120, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 1.2V Voltage" }, > + { 0x12c, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 5V Voltage" }, > + { 0x138, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 0.9V Voltage" }, > + { 0x144, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 0.85V Voltage" }, > + { 0x150, 0x0, 0x0, 0x0, 0x0, 1, "AUX 12V Voltage" }, > + { 0x15c, 0x0, 0x0, 0x0, 0x0, 1, "Backplane 12V Voltage" }, > + { 0x16c, 0x0, 0x0, 0x0, 0x0, 1, "DDR4 1.2V Voltage" }, > + { 0x17c, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 1.8V Voltage" }, > + { 0x184, 0x0, 0x0, 0x0, 0x0, 1, "QDR 1.3V Voltage" }, > + { 0x18c, 0x0, 0x0, 0x0, 0x0, 1, "CVL1 0.8V Voltage" }, > + { 0x194, 0x0, 0x0, 0x0, 0x0, 1, "CVL1 1.05V Voltage" }, > + { 0x19c, 0x0, 0x0, 0x0, 0x0, 1, "CVL2 1.05V Voltage" }, > + { 0x1a4, 0x0, 0x0, 0x0, 0x0, 1, "CVL2 0.8V Voltage" }, > +}; > + > +static const struct m10bmc_sdata n5010bmc_curr_tbl[] = { > + { 0x124, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 1.2V Current" }, > + { 0x130, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 5V Current" }, > + { 0x13c, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 0.9V Current" }, > + { 0x148, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 0.85V Current" }, > + { 0x154, 0x0, 0x0, 0x0, 0x0, 1, "AUX 12V Current" }, > + { 0x160, 0x0, 0x0, 0x0, 0x0, 1, "Backplane 12V Current" }, > + { 0x168, 0x0, 0x0, 0x0, 0x0, 1, "DDR4 1.2V Current" }, > + { 0x178, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 1.8V Current" }, > + { 0x180, 0x0, 0x0, 0x0, 0x0, 1, "QDR 1.3V Current" }, > + { 0x188, 0x0, 0x0, 0x0, 0x0, 1, "CVL1 0.8V Current" }, > + { 0x190, 0x0, 0x0, 0x0, 0x0, 1, "CVL1 1.05V Current" }, > + { 0x198, 0x0, 0x0, 0x0, 0x0, 1, "CVL2 1.05V Current" }, > + { 0x1a0, 0x0, 0x0, 0x0, 0x0, 1, "CVL2 0.8V Current" }, > +}; > + > +static const struct hwmon_channel_info *n5010bmc_hinfo[] = { > + HWMON_CHANNEL_INFO(temp, > + HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_LABEL, > + HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_LABEL, > + HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_LABEL, > + HWMON_T_INPUT | HWMON_T_LABEL, > + HWMON_T_INPUT | HWMON_T_LABEL, > + HWMON_T_INPUT | HWMON_T_LABEL, > + HWMON_T_INPUT | HWMON_T_LABEL, > + HWMON_T_INPUT | HWMON_T_LABEL, > + HWMON_T_INPUT | HWMON_T_LABEL, > + HWMON_T_INPUT | HWMON_T_LABEL, > + HWMON_T_INPUT | HWMON_T_LABEL, > + HWMON_T_INPUT | HWMON_T_LABEL, > + HWMON_T_INPUT | HWMON_T_LABEL, > + HWMON_T_INPUT | HWMON_T_LABEL, > + HWMON_T_INPUT | HWMON_T_LABEL, > + HWMON_T_INPUT | HWMON_T_LABEL, > + HWMON_T_INPUT | HWMON_T_LABEL), > + HWMON_CHANNEL_INFO(in, > + HWMON_I_INPUT | HWMON_I_LABEL, > + HWMON_I_INPUT | HWMON_I_LABEL, > + HWMON_I_INPUT | HWMON_I_LABEL, > + HWMON_I_INPUT | HWMON_I_LABEL, > + HWMON_I_INPUT | HWMON_I_LABEL, > + HWMON_I_INPUT | HWMON_I_LABEL, > + HWMON_I_INPUT | HWMON_I_LABEL, > + HWMON_I_INPUT | HWMON_I_LABEL, > + HWMON_I_INPUT | HWMON_I_LABEL, > + HWMON_I_INPUT | HWMON_I_LABEL, > + HWMON_I_INPUT | HWMON_I_LABEL, > + HWMON_I_INPUT | HWMON_I_LABEL, > + HWMON_I_INPUT | HWMON_I_LABEL), > + HWMON_CHANNEL_INFO(curr, > + HWMON_C_INPUT | HWMON_C_LABEL, > + HWMON_C_INPUT | HWMON_C_LABEL, > + HWMON_C_INPUT | HWMON_C_LABEL, > + HWMON_C_INPUT | HWMON_C_LABEL, > + HWMON_C_INPUT | HWMON_C_LABEL, > + HWMON_C_INPUT | HWMON_C_LABEL, > + HWMON_C_INPUT | HWMON_C_LABEL, > + HWMON_C_INPUT | HWMON_C_LABEL, > + HWMON_C_INPUT | HWMON_C_LABEL, > + HWMON_C_INPUT | HWMON_C_LABEL, > + HWMON_C_INPUT | HWMON_C_LABEL, > + HWMON_C_INPUT | HWMON_C_LABEL, > + HWMON_C_INPUT | HWMON_C_LABEL), > + NULL > +}; > + > +static const struct m10bmc_hwmon_board_data n5010bmc_hwmon_bdata = { > + .tables = { > + [hwmon_temp] = n5010bmc_temp_tbl, > + [hwmon_in] = n5010bmc_in_tbl, > + [hwmon_curr] = n5010bmc_curr_tbl, > + }, > + > + .hinfo = n5010bmc_hinfo, > +}; > + > static umode_t > m10bmc_hwmon_is_visible(const void *data, enum hwmon_sensor_types type, > u32 attr, int channel) > @@ -438,6 +550,10 @@ static const struct platform_device_id intel_m10bmc_hwmon_ids[] = { > .name = "d5005bmc-hwmon", > .driver_data = (unsigned long)&d5005bmc_hwmon_bdata, > }, > + { > + .name = "n5010bmc-hwmon", > + .driver_data = (unsigned long)&n5010bmc_hwmon_bdata, > + }, > { } > }; > > -- > 2.31.0 >
Hi Guenter, On Mon, Jun 28, 2021 at 09:35:56AM -0700, Guenter Roeck wrote: > On Fri, Jun 25, 2021 at 09:42:13AM +0200, Martin Hundebøll wrote: > > From: Martin Hundebøll <mhu@silicom.dk> > > > > Add the list of sensors supported by the Silicom n5010 PAC, and enable > > the drivers as a subtype of the intel-m10-bmc multi-function driver. > > > > Signed-off-by: Martin Hundebøll <mhu@silicom.dk> > > For my reference: > > Reviewed-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Moritz Fischer <mdf@kernel.org> > > Not sure if I can apply this patch as-is to hwmon, or if it needs > to wait for the other patches in the series. Any thoughts / comments ? I don't see how it would break anything in itself since it just adds extra compatible and data. I'd probably wait with applying until discussions around the mfd and dfl parts are resolved since otherwise there's no user. > Guenter Thanks, Moritz
On Fri, Jun 25, 2021 at 09:42:11AM +0200, Martin Hundebøll wrote: > From: Martin Hundebøll <mhu@silicom.dk> > > The Max10 BMC on the Silicom n5010 PAC is slightly different than the > existing BMC's, so use a dedicated feature revision detect it. > > Signed-off-by: Martin Hundebøll <mhu@silicom.dk> > --- > > Changes since v1: > * use feature revision from struct dfl_device instead of reading it > from io-mem > > drivers/spi/spi-altera-dfl.c | 15 +++++++++++++-- > 1 file changed, 13 insertions(+), 2 deletions(-) > > diff --git a/drivers/spi/spi-altera-dfl.c b/drivers/spi/spi-altera-dfl.c > index 3e32e4fe5895..f6cf7c8d9dac 100644 > --- a/drivers/spi/spi-altera-dfl.c > +++ b/drivers/spi/spi-altera-dfl.c > @@ -111,6 +111,13 @@ static struct spi_board_info m10_bmc_info = { > .chip_select = 0, > }; > > +static struct spi_board_info m10_n5010_bmc_info = { > + .modalias = "m10-n5010", > + .max_speed_hz = 12500000, > + .bus_num = 0, > + .chip_select = 0, > +}; Is there no way to query the mc for version info? > + > static void config_spi_master(void __iomem *base, struct spi_master *master) > { > u64 v; > @@ -130,6 +137,7 @@ static void config_spi_master(void __iomem *base, struct spi_master *master) > > static int dfl_spi_altera_probe(struct dfl_device *dfl_dev) > { > + struct spi_board_info *board_info = &m10_bmc_info; > struct device *dev = &dfl_dev->dev; > struct spi_master *master; > struct altera_spi *hw; > @@ -172,9 +180,12 @@ static int dfl_spi_altera_probe(struct dfl_device *dfl_dev) > goto exit; > } > > - if (!spi_new_device(master, &m10_bmc_info)) { > + if (dfl_dev->revision == FME_FEATURE_REV_MAX10_SPI_N5010) > + board_info = &m10_n5010_bmc_info; Since this depends on the previous patch: Mark do you want to take both patches once they're reviewed? From what I can tell the BMC and HWMON don't directly depend on it, so taking them through SPI tree might be easiest. Alternatively I can provide a tag for the DFL change for you to pull. > + > + if (!spi_new_device(master, board_info)) { > dev_err(dev, "%s failed to create SPI device: %s\n", > - __func__, m10_bmc_info.modalias); > + __func__, board_info->modalias); > } > > return 0; > -- > 2.31.0 > - Moritz
On Mon, Jun 28, 2021 at 10:28:28AM -0700, Moritz Fischer wrote: > Hi Guenter, > > On Mon, Jun 28, 2021 at 09:35:56AM -0700, Guenter Roeck wrote: > > On Fri, Jun 25, 2021 at 09:42:13AM +0200, Martin Hundebøll wrote: > > > From: Martin Hundebøll <mhu@silicom.dk> > > > > > > Add the list of sensors supported by the Silicom n5010 PAC, and enable > > > the drivers as a subtype of the intel-m10-bmc multi-function driver. > > > > > > Signed-off-by: Martin Hundebøll <mhu@silicom.dk> > > > > For my reference: > > > > Reviewed-by: Guenter Roeck <linux@roeck-us.net> > Reviewed-by: Moritz Fischer <mdf@kernel.org> Reviewed-by: Xu Yilun <yilun.xu@intel.com> Thanks, Yilun > > > > > Not sure if I can apply this patch as-is to hwmon, or if it needs > > to wait for the other patches in the series. Any thoughts / comments ? > > I don't see how it would break anything in itself since it just adds > extra compatible and data. > > I'd probably wait with applying until discussions around the mfd and dfl > parts are resolved since otherwise there's no user. > > > Guenter > > Thanks, > Moritz
On Mon, Jun 28, 2021 at 10:39:23AM -0700, Moritz Fischer wrote: > Since this depends on the previous patch: Mark do you want to take both > patches once they're reviewed? From what I can tell the BMC and HWMON > don't directly depend on it, so taking them through SPI tree might be > easiest. > Alternatively I can provide a tag for the DFL change for you to pull. Sure, I can do whichever - I guess me applying both is probably simplest?
On 28/06/2021 19.39, Moritz Fischer wrote: > On Fri, Jun 25, 2021 at 09:42:11AM +0200, Martin Hundebøll wrote: >> From: Martin Hundebøll<mhu@silicom.dk> >> >> The Max10 BMC on the Silicom n5010 PAC is slightly different than the >> existing BMC's, so use a dedicated feature revision detect it. >> >> Signed-off-by: Martin Hundebøll<mhu@silicom.dk> >> --- >> >> Changes since v1: >> * use feature revision from struct dfl_device instead of reading it >> from io-mem >> >> drivers/spi/spi-altera-dfl.c | 15 +++++++++++++-- >> 1 file changed, 13 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/spi/spi-altera-dfl.c b/drivers/spi/spi-altera-dfl.c >> index 3e32e4fe5895..f6cf7c8d9dac 100644 >> --- a/drivers/spi/spi-altera-dfl.c >> +++ b/drivers/spi/spi-altera-dfl.c >> @@ -111,6 +111,13 @@ static struct spi_board_info m10_bmc_info = { >> .chip_select = 0, >> }; >> >> +static struct spi_board_info m10_n5010_bmc_info = { >> + .modalias = "m10-n5010", >> + .max_speed_hz = 12500000, >> + .bus_num = 0, >> + .chip_select = 0, >> +}; > Is there no way to query the mc for version info? Do you mean reading the BMC variant (i.e. n5010 / d5005 / n3000) from a register? Not in a uniform way across the different boards that I'm aware of. But isn't this what the DFL feature revision is meant for? // Martin
> On 28/06/2021 19.39, Moritz Fischer wrote: > > On Fri, Jun 25, 2021 at 09:42:11AM +0200, Martin Hundebøll wrote: > >> From: Martin Hundebøll<mhu@silicom.dk> > >> > >> The Max10 BMC on the Silicom n5010 PAC is slightly different than the > >> existing BMC's, so use a dedicated feature revision detect it. > >> > >> Signed-off-by: Martin Hundebøll<mhu@silicom.dk> > >> --- > >> > >> Changes since v1: > >> * use feature revision from struct dfl_device instead of reading it > >> from io-mem > >> > >> drivers/spi/spi-altera-dfl.c | 15 +++++++++++++-- > >> 1 file changed, 13 insertions(+), 2 deletions(-) > >> > >> diff --git a/drivers/spi/spi-altera-dfl.c b/drivers/spi/spi-altera-dfl.c > >> index 3e32e4fe5895..f6cf7c8d9dac 100644 > >> --- a/drivers/spi/spi-altera-dfl.c > >> +++ b/drivers/spi/spi-altera-dfl.c > >> @@ -111,6 +111,13 @@ static struct spi_board_info m10_bmc_info = { > >> .chip_select = 0, > >> }; > >> > >> +static struct spi_board_info m10_n5010_bmc_info = { > >> + .modalias = "m10-n5010", > >> + .max_speed_hz = 12500000, > >> + .bus_num = 0, > >> + .chip_select = 0, > >> +}; > > Is there no way to query the mc for version info? > > Do you mean reading the BMC variant (i.e. n5010 / d5005 / n3000) from a > register? > > Not in a uniform way across the different boards that I'm aware of. But > isn't this what the DFL feature revision is meant for? If this is used to distinguish different boards, then revision (4bits?) may not be enough. New version DFH may be able to resolve this limitation, but it is always encouraged to have its own method to tell if possible, not depending on DFH, it makes this IP easy to be reused in non DFL case. Thanks Hao > > // Martin
On Tue, 29 Jun 2021, Wu, Hao wrote: >> On 28/06/2021 19.39, Moritz Fischer wrote: >>> On Fri, Jun 25, 2021 at 09:42:11AM +0200, Martin Hundebøll wrote: >>>> From: Martin Hundebøll<mhu@silicom.dk> >>>> >>>> The Max10 BMC on the Silicom n5010 PAC is slightly different than the >>>> existing BMC's, so use a dedicated feature revision detect it. >>>> >>>> Signed-off-by: Martin Hundebøll<mhu@silicom.dk> >>>> --- >>>> >>>> Changes since v1: >>>> * use feature revision from struct dfl_device instead of reading it >>>> from io-mem >>>> >>>> drivers/spi/spi-altera-dfl.c | 15 +++++++++++++-- >>>> 1 file changed, 13 insertions(+), 2 deletions(-) >>>> >>>> diff --git a/drivers/spi/spi-altera-dfl.c b/drivers/spi/spi-altera-dfl.c >>>> index 3e32e4fe5895..f6cf7c8d9dac 100644 >>>> --- a/drivers/spi/spi-altera-dfl.c >>>> +++ b/drivers/spi/spi-altera-dfl.c >>>> @@ -111,6 +111,13 @@ static struct spi_board_info m10_bmc_info = { >>>> .chip_select = 0, >>>> }; >>>> >>>> +static struct spi_board_info m10_n5010_bmc_info = { >>>> + .modalias = "m10-n5010", >>>> + .max_speed_hz = 12500000, >>>> + .bus_num = 0, >>>> + .chip_select = 0, >>>> +}; >>> Is there no way to query the mc for version info? >> >> Do you mean reading the BMC variant (i.e. n5010 / d5005 / n3000) from a >> register? >> >> Not in a uniform way across the different boards that I'm aware of. But >> isn't this what the DFL feature revision is meant for? > > If this is used to distinguish different boards, then revision (4bits?) may not On the one hand, the revision is being used to distinguish the board. More precisely, the feature ID id determining the actual hardware involved, altera-spi connected to a particular indirect register mailbox. This is a different feature id used by the n3000 which has a different indirect register mailbox with a NIOS hanshake. So in this case the revision is being used to specify remote end of the SPI connection, d5005 BMC vs. n5010 BMC. I think in this case 4 bits is enough. We've only had two instances of this hardware in 5 years. Certainly any future instances of this hardware should have a register describing the remote end of the SPI connection. This hardware change would then require a new feature id. > be enough. New version DFH may be able to resolve this limitation, but it > is always encouraged to have its own method to tell if possible, not depending > on DFH, it makes this IP easy to be reused in non DFL case. > > Thanks > Hao > >> >> // Martin >
From: Martin Hundebøll <mhu@silicom.dk> This is an initial set of patches for the Silciom N5010 programmable accelerated card adding support for reading out sensors. Based on v5.13-rc7 Changes since v1: * Commit message in patch 1 is updated with card description * Added Hao's Acked-by to patch 1 * Patch 2 is replaced with a new patch to carry feature revision info in struct dfl_device * Patch 3 is updated to use feature revision from struct dfl_device * Patch 4 from v0 is split into separate patches for hwmon and mfd Martin Hundebøll (5): fpga: dfl: pci: add device IDs for Silicom N501x PAC cards fpga: dfl: expose feature revision from struct dfl_device spi: spi-altera-dfl: support n5010 feature revision mfd: intel-m10-bmc: add n5010 variant hwmon: intel-m10-bmc-hwmon: add n5010 sensors drivers/fpga/dfl-pci.c | 5 ++ drivers/fpga/dfl.c | 27 ++++--- drivers/fpga/dfl.h | 1 + drivers/hwmon/intel-m10-bmc-hwmon.c | 116 ++++++++++++++++++++++++++++ drivers/mfd/intel-m10-bmc.c | 12 ++- drivers/spi/spi-altera-dfl.c | 15 +++- include/linux/dfl.h | 1 + 7 files changed, 164 insertions(+), 13 deletions(-)