diff mbox series

[2/3] dt-bindings: soc: qcom: aoss: Convert to YAML

Message ID 20210625234018.1324681-3-bjorn.andersson@linaro.org
State Superseded
Headers show
Series dt-bindings: soc: qcom: aoss: Support sc8180x and convert to YAML | expand

Commit Message

Bjorn Andersson June 25, 2021, 11:40 p.m. UTC
Convert to YAML in order to allow validation.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

---

I'm aware that this conflicts with Sibi's removal of '#power-domain-cells', but
that's a trivial change regardless of which of the two patches gets in first.

 .../bindings/soc/qcom/qcom,aoss-qmp.txt       |  90 --------------
 .../bindings/soc/qcom/qcom,aoss-qmp.yaml      | 115 ++++++++++++++++++
 2 files changed, 115 insertions(+), 90 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt
 create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml

-- 
2.29.2

Comments

Manivannan Sadhasivam June 28, 2021, 2:49 p.m. UTC | #1
On Fri, Jun 25, 2021 at 04:40:17PM -0700, Bjorn Andersson wrote:
> Convert to YAML in order to allow validation.

> 

> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

> ---

> 

> I'm aware that this conflicts with Sibi's removal of '#power-domain-cells', but

> that's a trivial change regardless of which of the two patches gets in first.

> 

>  .../bindings/soc/qcom/qcom,aoss-qmp.txt       |  90 --------------

>  .../bindings/soc/qcom/qcom,aoss-qmp.yaml      | 115 ++++++++++++++++++

>  2 files changed, 115 insertions(+), 90 deletions(-)

>  delete mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt

>  create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml

> 


[...]

> +required:

> +  - compatible

> +  - reg

> +  - interrupts

> +  - mboxes

> +  - "#clock-cells"


The old binding lists this property as optional but you're marking it
as required. And by looking at the driver it seems to be optional only.

> +  - "#power-domain-cells"


This one was marked optional as well but the driver registers the pd's
unconditionally, so I guess it is fine.

Thanks,
Mani

> +

> +additionalProperties: false

> +

> +patternProperties:

> +  "^(cx|mx|ebi)$":

> +    type: object

> +    description:

> +      The AOSS side channel also provides the controls for three cooling devices,

> +      these are expressed as subnodes of the QMP node. The name of the node is

> +      used to identify the resource and must therefor be "cx", "mx" or "ebi".

> +

> +    properties:

> +      "#cooling-cells":

> +        const: 2

> +

> +    required:

> +      - "#cooling-cells"

> +

> +    additionalProperties: false

> +

> +examples:

> +  - |

> +    #include <dt-bindings/interrupt-controller/arm-gic.h>

> +

> +    aoss_qmp: qmp@c300000 {

> +      compatible = "qcom,sdm845-aoss-qmp", "qcom,aoss-qmp";

> +      reg = <0x0c300000 0x100000>;

> +      interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;

> +      mboxes = <&apss_shared 0>;

> +

> +      #clock-cells = <0>;

> +      #power-domain-cells = <1>;

> +

> +      cx_cdev: cx {

> +        #cooling-cells = <2>;

> +      };

> +

> +      mx_cdev: mx {

> +        #cooling-cells = <2>;

> +      };

> +    };

> +...

> -- 

> 2.29.2

>
Bjorn Andersson June 28, 2021, 4:09 p.m. UTC | #2
On Mon 28 Jun 09:49 CDT 2021, Manivannan Sadhasivam wrote:

> On Fri, Jun 25, 2021 at 04:40:17PM -0700, Bjorn Andersson wrote:
> > Convert to YAML in order to allow validation.
> > 
> > Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> > ---
> > 
> > I'm aware that this conflicts with Sibi's removal of '#power-domain-cells', but
> > that's a trivial change regardless of which of the two patches gets in first.
> > 
> >  .../bindings/soc/qcom/qcom,aoss-qmp.txt       |  90 --------------
> >  .../bindings/soc/qcom/qcom,aoss-qmp.yaml      | 115 ++++++++++++++++++
> >  2 files changed, 115 insertions(+), 90 deletions(-)
> >  delete mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt
> >  create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml
> > 
> 
> [...]
> 
> > +required:
> > +  - compatible
> > +  - reg
> > +  - interrupts
> > +  - mboxes
> > +  - "#clock-cells"
> 
> The old binding lists this property as optional but you're marking it
> as required. And by looking at the driver it seems to be optional only.
> 

You're right, missed that detail. Will respin accordingly.

> > +  - "#power-domain-cells"
> 
> This one was marked optional as well but the driver registers the pd's
> unconditionally, so I guess it is fine.
> 

I think this should be a required property, but the conversion should
convert the binding, so I'll update accordingly.

Also, Sibi has a series that drops the power-domains, due to some
unforeseen complications related to suspend, so there's no need to
follow up with a change to the binding in this regard.

Thanks,
Bjorn

> Thanks,
> Mani
> 
> > +
> > +additionalProperties: false
> > +
> > +patternProperties:
> > +  "^(cx|mx|ebi)$":
> > +    type: object
> > +    description:
> > +      The AOSS side channel also provides the controls for three cooling devices,
> > +      these are expressed as subnodes of the QMP node. The name of the node is
> > +      used to identify the resource and must therefor be "cx", "mx" or "ebi".
> > +
> > +    properties:
> > +      "#cooling-cells":
> > +        const: 2
> > +
> > +    required:
> > +      - "#cooling-cells"
> > +
> > +    additionalProperties: false
> > +
> > +examples:
> > +  - |
> > +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> > +
> > +    aoss_qmp: qmp@c300000 {
> > +      compatible = "qcom,sdm845-aoss-qmp", "qcom,aoss-qmp";
> > +      reg = <0x0c300000 0x100000>;
> > +      interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
> > +      mboxes = <&apss_shared 0>;
> > +
> > +      #clock-cells = <0>;
> > +      #power-domain-cells = <1>;
> > +
> > +      cx_cdev: cx {
> > +        #cooling-cells = <2>;
> > +      };
> > +
> > +      mx_cdev: mx {
> > +        #cooling-cells = <2>;
> > +      };
> > +    };
> > +...
> > -- 
> > 2.29.2
> >
Rob Herring July 1, 2021, 2:02 p.m. UTC | #3
On Fri, 25 Jun 2021 16:40:17 -0700, Bjorn Andersson wrote:
> Convert to YAML in order to allow validation.

> 

> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

> ---

> 

> I'm aware that this conflicts with Sibi's removal of '#power-domain-cells', but

> that's a trivial change regardless of which of the two patches gets in first.

> 

>  .../bindings/soc/qcom/qcom,aoss-qmp.txt       |  90 --------------

>  .../bindings/soc/qcom/qcom,aoss-qmp.yaml      | 115 ++++++++++++++++++

>  2 files changed, 115 insertions(+), 90 deletions(-)

>  delete mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt

>  create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml

> 


My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):

yamllint warnings/errors:
./Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml:29:9: [warning] wrong indentation: expected 10 but found 8 (indentation)

dtschema/dtc warnings/errors:
\ndoc reference errors (make refcheckdocs):

See https://patchwork.ozlabs.org/patch/1497468

This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit.
Rob Herring July 1, 2021, 7:03 p.m. UTC | #4
On Fri, Jun 25, 2021 at 04:40:17PM -0700, Bjorn Andersson wrote:
> Convert to YAML in order to allow validation.

> 

> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

> ---

> 

> I'm aware that this conflicts with Sibi's removal of '#power-domain-cells', but

> that's a trivial change regardless of which of the two patches gets in first.

> 

>  .../bindings/soc/qcom/qcom,aoss-qmp.txt       |  90 --------------

>  .../bindings/soc/qcom/qcom,aoss-qmp.yaml      | 115 ++++++++++++++++++

>  2 files changed, 115 insertions(+), 90 deletions(-)

>  delete mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt

>  create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml

> 

> diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt

> deleted file mode 100644

> index 3747032311a4..000000000000

> --- a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt

> +++ /dev/null

> @@ -1,90 +0,0 @@

> -Qualcomm Always-On Subsystem side channel binding

> -

> -This binding describes the hardware component responsible for side channel

> -requests to the always-on subsystem (AOSS), used for certain power management

> -requests that is not handled by the standard RPMh interface. Each client in the

> -SoC has it's own block of message RAM and IRQ for communication with the AOSS.

> -The protocol used to communicate in the message RAM is known as Qualcomm

> -Messaging Protocol (QMP)

> -

> -The AOSS side channel exposes control over a set of resources, used to control

> -a set of debug related clocks and to affect the low power state of resources

> -related to the secondary subsystems. These resources are exposed as a set of

> -power-domains.

> -

> -- compatible:

> -	Usage: required

> -	Value type: <string>

> -	Definition: must be one of:

> -		    "qcom,sc7180-aoss-qmp"

> -		    "qcom,sc7280-aoss-qmp"

> -		    "qcom,sc8180x-aoss-qmp"

> -		    "qcom,sdm845-aoss-qmp"

> -		    "qcom,sm8150-aoss-qmp"

> -		    "qcom,sm8250-aoss-qmp"

> -		    "qcom,sm8350-aoss-qmp"

> -		    and:

> -		    "qcom,aoss-qmp"

> -

> -- reg:

> -	Usage: required

> -	Value type: <prop-encoded-array>

> -	Definition: the base address and size of the message RAM for this

> -		    client's communication with the AOSS

> -

> -- interrupts:

> -	Usage: required

> -	Value type: <prop-encoded-array>

> -	Definition: should specify the AOSS message IRQ for this client

> -

> -- mboxes:

> -	Usage: required

> -	Value type: <prop-encoded-array>

> -	Definition: reference to the mailbox representing the outgoing doorbell

> -		    in APCS for this client, as described in mailbox/mailbox.txt

> -

> -- #clock-cells:

> -	Usage: optional

> -	Value type: <u32>

> -	Definition: must be 0

> -		    The single clock represents the QDSS clock.

> -

> -- #power-domain-cells:

> -	Usage: optional

> -	Value type: <u32>

> -	Definition: must be 1

> -		    The provided power-domains are:

> -		    CDSP state (0), LPASS state (1), modem state (2), SLPI

> -		    state (3), SPSS state (4) and Venus state (5).

> -

> -= SUBNODES

> -The AOSS side channel also provides the controls for three cooling devices,

> -these are expressed as subnodes of the QMP node. The name of the node is used

> -to identify the resource and must therefor be "cx", "mx" or "ebi".

> -

> -- #cooling-cells:

> -	Usage: optional

> -	Value type: <u32>

> -	Definition: must be 2

> -

> -= EXAMPLE

> -

> -The following example represents the AOSS side-channel message RAM and the

> -mechanism exposing the power-domains, as found in SDM845.

> -

> -  aoss_qmp: qmp@c300000 {

> -	  compatible = "qcom,sdm845-aoss-qmp", "qcom,aoss-qmp";

> -	  reg = <0x0c300000 0x100000>;

> -	  interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;

> -	  mboxes = <&apss_shared 0>;

> -

> -	  #power-domain-cells = <1>;

> -

> -	  cx_cdev: cx {

> -		#cooling-cells = <2>;

> -	  };

> -

> -	  mx_cdev: mx {

> -		#cooling-cells = <2>;

> -	  };

> -  };

> diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml

> new file mode 100644

> index 000000000000..1b9de8e49356

> --- /dev/null

> +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml

> @@ -0,0 +1,115 @@

> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

> +%YAML 1.2

> +---

> +$id: http://devicetree.org/schemas/soc/qcom/qcom,aoss-qmp.yaml#

> +$schema: http://devicetree.org/meta-schemas/core.yaml#

> +

> +title: Qualcomm Always-On Subsystem side channel binding

> +

> +maintainers:

> +  - Bjorn Andersson <bjorn.andersson@linaro.org>

> +

> +description:

> +  This binding describes the hardware component responsible for side channel

> +  requests to the always-on subsystem (AOSS), used for certain power management

> +  requests that is not handled by the standard RPMh interface. Each client in the

> +  SoC has it's own block of message RAM and IRQ for communication with the AOSS.

> +  The protocol used to communicate in the message RAM is known as Qualcomm

> +  Messaging Protocol (QMP)

> +

> +  The AOSS side channel exposes control over a set of resources, used to control

> +  a set of debug related clocks and to affect the low power state of resources

> +  related to the secondary subsystems. These resources are exposed as a set of

> +  power-domains.

> +

> +properties:

> +  compatible:

> +    items:

> +      - enum:

> +        - "qcom,sc7180-aoss-qmp"

> +        - "qcom,sc7280-aoss-qmp"

> +        - "qcom,sc8180x-aoss-qmp"

> +        - "qcom,sdm845-aoss-qmp"

> +        - "qcom,sm8150-aoss-qmp"

> +        - "qcom,sm8250-aoss-qmp"

> +        - "qcom,sm8350-aoss-qmp"

> +      - const: "qcom,aoss-qmp"


Don't need quotes. With that and the indentation fixed:

Reviewed-by: Rob Herring <robh@kernel.org>
Bjorn Andersson July 9, 2021, 5:27 p.m. UTC | #5
On Thu 01 Jul 12:03 PDT 2021, Rob Herring wrote:

> On Fri, Jun 25, 2021 at 04:40:17PM -0700, Bjorn Andersson wrote:

> > Convert to YAML in order to allow validation.

> > 

> > Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

> > ---

> > 

> > I'm aware that this conflicts with Sibi's removal of '#power-domain-cells', but

> > that's a trivial change regardless of which of the two patches gets in first.

> > 

> >  .../bindings/soc/qcom/qcom,aoss-qmp.txt       |  90 --------------

> >  .../bindings/soc/qcom/qcom,aoss-qmp.yaml      | 115 ++++++++++++++++++

> >  2 files changed, 115 insertions(+), 90 deletions(-)

> >  delete mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt

> >  create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml

> > 

> > diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt

> > deleted file mode 100644

> > index 3747032311a4..000000000000

> > --- a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt

> > +++ /dev/null

> > @@ -1,90 +0,0 @@

> > -Qualcomm Always-On Subsystem side channel binding

> > -

> > -This binding describes the hardware component responsible for side channel

> > -requests to the always-on subsystem (AOSS), used for certain power management

> > -requests that is not handled by the standard RPMh interface. Each client in the

> > -SoC has it's own block of message RAM and IRQ for communication with the AOSS.

> > -The protocol used to communicate in the message RAM is known as Qualcomm

> > -Messaging Protocol (QMP)

> > -

> > -The AOSS side channel exposes control over a set of resources, used to control

> > -a set of debug related clocks and to affect the low power state of resources

> > -related to the secondary subsystems. These resources are exposed as a set of

> > -power-domains.

> > -

> > -- compatible:

> > -	Usage: required

> > -	Value type: <string>

> > -	Definition: must be one of:

> > -		    "qcom,sc7180-aoss-qmp"

> > -		    "qcom,sc7280-aoss-qmp"

> > -		    "qcom,sc8180x-aoss-qmp"

> > -		    "qcom,sdm845-aoss-qmp"

> > -		    "qcom,sm8150-aoss-qmp"

> > -		    "qcom,sm8250-aoss-qmp"

> > -		    "qcom,sm8350-aoss-qmp"

> > -		    and:

> > -		    "qcom,aoss-qmp"

> > -

> > -- reg:

> > -	Usage: required

> > -	Value type: <prop-encoded-array>

> > -	Definition: the base address and size of the message RAM for this

> > -		    client's communication with the AOSS

> > -

> > -- interrupts:

> > -	Usage: required

> > -	Value type: <prop-encoded-array>

> > -	Definition: should specify the AOSS message IRQ for this client

> > -

> > -- mboxes:

> > -	Usage: required

> > -	Value type: <prop-encoded-array>

> > -	Definition: reference to the mailbox representing the outgoing doorbell

> > -		    in APCS for this client, as described in mailbox/mailbox.txt

> > -

> > -- #clock-cells:

> > -	Usage: optional

> > -	Value type: <u32>

> > -	Definition: must be 0

> > -		    The single clock represents the QDSS clock.

> > -

> > -- #power-domain-cells:

> > -	Usage: optional

> > -	Value type: <u32>

> > -	Definition: must be 1

> > -		    The provided power-domains are:

> > -		    CDSP state (0), LPASS state (1), modem state (2), SLPI

> > -		    state (3), SPSS state (4) and Venus state (5).

> > -

> > -= SUBNODES

> > -The AOSS side channel also provides the controls for three cooling devices,

> > -these are expressed as subnodes of the QMP node. The name of the node is used

> > -to identify the resource and must therefor be "cx", "mx" or "ebi".

> > -

> > -- #cooling-cells:

> > -	Usage: optional

> > -	Value type: <u32>

> > -	Definition: must be 2

> > -

> > -= EXAMPLE

> > -

> > -The following example represents the AOSS side-channel message RAM and the

> > -mechanism exposing the power-domains, as found in SDM845.

> > -

> > -  aoss_qmp: qmp@c300000 {

> > -	  compatible = "qcom,sdm845-aoss-qmp", "qcom,aoss-qmp";

> > -	  reg = <0x0c300000 0x100000>;

> > -	  interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;

> > -	  mboxes = <&apss_shared 0>;

> > -

> > -	  #power-domain-cells = <1>;

> > -

> > -	  cx_cdev: cx {

> > -		#cooling-cells = <2>;

> > -	  };

> > -

> > -	  mx_cdev: mx {

> > -		#cooling-cells = <2>;

> > -	  };

> > -  };

> > diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml

> > new file mode 100644

> > index 000000000000..1b9de8e49356

> > --- /dev/null

> > +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml

> > @@ -0,0 +1,115 @@

> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

> > +%YAML 1.2

> > +---

> > +$id: http://devicetree.org/schemas/soc/qcom/qcom,aoss-qmp.yaml#

> > +$schema: http://devicetree.org/meta-schemas/core.yaml#

> > +

> > +title: Qualcomm Always-On Subsystem side channel binding

> > +

> > +maintainers:

> > +  - Bjorn Andersson <bjorn.andersson@linaro.org>

> > +

> > +description:

> > +  This binding describes the hardware component responsible for side channel

> > +  requests to the always-on subsystem (AOSS), used for certain power management

> > +  requests that is not handled by the standard RPMh interface. Each client in the

> > +  SoC has it's own block of message RAM and IRQ for communication with the AOSS.

> > +  The protocol used to communicate in the message RAM is known as Qualcomm

> > +  Messaging Protocol (QMP)

> > +

> > +  The AOSS side channel exposes control over a set of resources, used to control

> > +  a set of debug related clocks and to affect the low power state of resources

> > +  related to the secondary subsystems. These resources are exposed as a set of

> > +  power-domains.

> > +

> > +properties:

> > +  compatible:

> > +    items:

> > +      - enum:

> > +        - "qcom,sc7180-aoss-qmp"

> > +        - "qcom,sc7280-aoss-qmp"

> > +        - "qcom,sc8180x-aoss-qmp"

> > +        - "qcom,sdm845-aoss-qmp"

> > +        - "qcom,sm8150-aoss-qmp"

> > +        - "qcom,sm8250-aoss-qmp"

> > +        - "qcom,sm8350-aoss-qmp"

> > +      - const: "qcom,aoss-qmp"

> 

> Don't need quotes. With that and the indentation fixed:

> 


I've installed yamllint and fixed this for v2.

But can you please help me understand why the members of the enum should
have double indentation here? Is it just that the indentation counts
from the 'e' and not the '-'?

> Reviewed-by: Rob Herring <robh@kernel.org>


Thanks,
Bjorn
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt
deleted file mode 100644
index 3747032311a4..000000000000
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt
+++ /dev/null
@@ -1,90 +0,0 @@ 
-Qualcomm Always-On Subsystem side channel binding
-
-This binding describes the hardware component responsible for side channel
-requests to the always-on subsystem (AOSS), used for certain power management
-requests that is not handled by the standard RPMh interface. Each client in the
-SoC has it's own block of message RAM and IRQ for communication with the AOSS.
-The protocol used to communicate in the message RAM is known as Qualcomm
-Messaging Protocol (QMP)
-
-The AOSS side channel exposes control over a set of resources, used to control
-a set of debug related clocks and to affect the low power state of resources
-related to the secondary subsystems. These resources are exposed as a set of
-power-domains.
-
-- compatible:
-	Usage: required
-	Value type: <string>
-	Definition: must be one of:
-		    "qcom,sc7180-aoss-qmp"
-		    "qcom,sc7280-aoss-qmp"
-		    "qcom,sc8180x-aoss-qmp"
-		    "qcom,sdm845-aoss-qmp"
-		    "qcom,sm8150-aoss-qmp"
-		    "qcom,sm8250-aoss-qmp"
-		    "qcom,sm8350-aoss-qmp"
-		    and:
-		    "qcom,aoss-qmp"
-
-- reg:
-	Usage: required
-	Value type: <prop-encoded-array>
-	Definition: the base address and size of the message RAM for this
-		    client's communication with the AOSS
-
-- interrupts:
-	Usage: required
-	Value type: <prop-encoded-array>
-	Definition: should specify the AOSS message IRQ for this client
-
-- mboxes:
-	Usage: required
-	Value type: <prop-encoded-array>
-	Definition: reference to the mailbox representing the outgoing doorbell
-		    in APCS for this client, as described in mailbox/mailbox.txt
-
-- #clock-cells:
-	Usage: optional
-	Value type: <u32>
-	Definition: must be 0
-		    The single clock represents the QDSS clock.
-
-- #power-domain-cells:
-	Usage: optional
-	Value type: <u32>
-	Definition: must be 1
-		    The provided power-domains are:
-		    CDSP state (0), LPASS state (1), modem state (2), SLPI
-		    state (3), SPSS state (4) and Venus state (5).
-
-= SUBNODES
-The AOSS side channel also provides the controls for three cooling devices,
-these are expressed as subnodes of the QMP node. The name of the node is used
-to identify the resource and must therefor be "cx", "mx" or "ebi".
-
-- #cooling-cells:
-	Usage: optional
-	Value type: <u32>
-	Definition: must be 2
-
-= EXAMPLE
-
-The following example represents the AOSS side-channel message RAM and the
-mechanism exposing the power-domains, as found in SDM845.
-
-  aoss_qmp: qmp@c300000 {
-	  compatible = "qcom,sdm845-aoss-qmp", "qcom,aoss-qmp";
-	  reg = <0x0c300000 0x100000>;
-	  interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
-	  mboxes = <&apss_shared 0>;
-
-	  #power-domain-cells = <1>;
-
-	  cx_cdev: cx {
-		#cooling-cells = <2>;
-	  };
-
-	  mx_cdev: mx {
-		#cooling-cells = <2>;
-	  };
-  };
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml
new file mode 100644
index 000000000000..1b9de8e49356
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml
@@ -0,0 +1,115 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/qcom/qcom,aoss-qmp.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Always-On Subsystem side channel binding
+
+maintainers:
+  - Bjorn Andersson <bjorn.andersson@linaro.org>
+
+description:
+  This binding describes the hardware component responsible for side channel
+  requests to the always-on subsystem (AOSS), used for certain power management
+  requests that is not handled by the standard RPMh interface. Each client in the
+  SoC has it's own block of message RAM and IRQ for communication with the AOSS.
+  The protocol used to communicate in the message RAM is known as Qualcomm
+  Messaging Protocol (QMP)
+
+  The AOSS side channel exposes control over a set of resources, used to control
+  a set of debug related clocks and to affect the low power state of resources
+  related to the secondary subsystems. These resources are exposed as a set of
+  power-domains.
+
+properties:
+  compatible:
+    items:
+      - enum:
+        - "qcom,sc7180-aoss-qmp"
+        - "qcom,sc7280-aoss-qmp"
+        - "qcom,sc8180x-aoss-qmp"
+        - "qcom,sdm845-aoss-qmp"
+        - "qcom,sm8150-aoss-qmp"
+        - "qcom,sm8250-aoss-qmp"
+        - "qcom,sm8350-aoss-qmp"
+      - const: "qcom,aoss-qmp"
+
+  reg:
+    maxItems: 1
+    description:
+      The base address and size of the message RAM for this client's
+      communication with the AOSS
+
+  interrupts:
+    maxItems: 1
+    description:
+      Should specify the AOSS message IRQ for this client
+
+  mboxes:
+    maxItems: 1
+    description:
+      Reference to the mailbox representing the outgoing doorbell in APCS for
+      this client, as described in mailbox/mailbox.txt
+
+  "#clock-cells":
+    const: 0
+    description:
+      The single clock represents the QDSS clock.
+
+  "#power-domain-cells":
+    const: 1
+    description: |
+        The provided power-domains are:
+        CDSP state (0), LPASS state (1), modem state (2), SLPI
+        state (3), SPSS state (4) and Venus state (5).
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - mboxes
+  - "#clock-cells"
+  - "#power-domain-cells"
+
+additionalProperties: false
+
+patternProperties:
+  "^(cx|mx|ebi)$":
+    type: object
+    description:
+      The AOSS side channel also provides the controls for three cooling devices,
+      these are expressed as subnodes of the QMP node. The name of the node is
+      used to identify the resource and must therefor be "cx", "mx" or "ebi".
+
+    properties:
+      "#cooling-cells":
+        const: 2
+
+    required:
+      - "#cooling-cells"
+
+    additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+    aoss_qmp: qmp@c300000 {
+      compatible = "qcom,sdm845-aoss-qmp", "qcom,aoss-qmp";
+      reg = <0x0c300000 0x100000>;
+      interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
+      mboxes = <&apss_shared 0>;
+
+      #clock-cells = <0>;
+      #power-domain-cells = <1>;
+
+      cx_cdev: cx {
+        #cooling-cells = <2>;
+      };
+
+      mx_cdev: mx {
+        #cooling-cells = <2>;
+      };
+    };
+...