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crypto: hisilicon/sec - fix the process of disabling sva prefetching

Message ID 1624675833-20107-1-git-send-email-yekai13@huawei.com
State Accepted
Commit 66192b2e3fd8ab97ed518d6c0240e26655a20b4b
Headers show
Series crypto: hisilicon/sec - fix the process of disabling sva prefetching | expand

Commit Message

yekai (A) June 26, 2021, 2:50 a.m. UTC
The open interface of the sva prefetching function is distinguish the chip
version. But the close interface of the sva prefetching function doesn't
distinguish the chip version. As a result, the sva prefetching close
operation is also performed on Kunpeng920, those registers are important
on Kunpeng920, which eventually leads to abnormal hardware problems. So
need to fix it immediately.

Signed-off-by: Kai Ye <yekai13@huawei.com>
---
 drivers/crypto/hisilicon/sec2/sec_main.c | 3 +++
 1 file changed, 3 insertions(+)

Comments

Herbert Xu June 28, 2021, 3:32 a.m. UTC | #1
On Sat, Jun 26, 2021 at 10:50:33AM +0800, Kai Ye wrote:
> The open interface of the sva prefetching function is distinguish the chip

> version. But the close interface of the sva prefetching function doesn't

> distinguish the chip version. As a result, the sva prefetching close

> operation is also performed on Kunpeng920, those registers are important

> on Kunpeng920, which eventually leads to abnormal hardware problems. So

> need to fix it immediately.

> 

> Signed-off-by: Kai Ye <yekai13@huawei.com>

> ---

>  drivers/crypto/hisilicon/sec2/sec_main.c | 3 +++

>  1 file changed, 3 insertions(+)


Patch applied.  Thanks.
-- 
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
diff mbox series

Patch

diff --git a/drivers/crypto/hisilicon/sec2/sec_main.c b/drivers/crypto/hisilicon/sec2/sec_main.c
index 8ab4e67..710ea8d 100644
--- a/drivers/crypto/hisilicon/sec2/sec_main.c
+++ b/drivers/crypto/hisilicon/sec2/sec_main.c
@@ -363,6 +363,9 @@  static void sec_close_sva_prefetch(struct hisi_qm *qm)
 	u32 val;
 	int ret;
 
+	if (qm->ver < QM_HW_V3)
+		return;
+
 	val = readl_relaxed(qm->io_base + SEC_PREFETCH_CFG);
 	val |= SEC_PREFETCH_DISABLE;
 	writel(val, qm->io_base + SEC_PREFETCH_CFG);