| Message ID | 20210527041405.391567-6-richard.henderson@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | softfloat: Improve denormal handling | expand |
Ping. Cc paolo, ed. This is the last unreviewed patch in this series, and the one that sparked the work in the first place. r~ On 5/26/21 9:13 PM, Richard Henderson wrote: > The FSR and MXCSR DE flags have the semantics of the new flag. > We get to remove a big fixme in update_mxcsr_from_sse_status > vs float_flag_iflush_denormal. > > Reported-by: Michael Morrell <mmorrell@tachyum.com> > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > target/i386/tcg/fpu_helper.c | 18 ++++++------------ > 1 file changed, 6 insertions(+), 12 deletions(-) > > diff --git a/target/i386/tcg/fpu_helper.c b/target/i386/tcg/fpu_helper.c > index c9779a9fe0..edc550de55 100644 > --- a/target/i386/tcg/fpu_helper.c > +++ b/target/i386/tcg/fpu_helper.c > @@ -148,7 +148,7 @@ static void merge_exception_flags(CPUX86State *env, uint8_t old_flags) > (new_flags & float_flag_overflow ? FPUS_OE : 0) | > (new_flags & float_flag_underflow ? FPUS_UE : 0) | > (new_flags & float_flag_inexact ? FPUS_PE : 0) | > - (new_flags & float_flag_iflush_denormal ? FPUS_DE : 0))); > + (new_flags & float_flag_inorm_denormal ? FPUS_DE : 0))); > } > > static inline floatx80 helper_fdiv(CPUX86State *env, floatx80 a, floatx80 b) > @@ -1742,7 +1742,7 @@ void helper_fxtract(CPUX86State *env) > int shift = clz64(temp.l.lower); > temp.l.lower <<= shift; > expdif = 1 - EXPBIAS - shift; > - float_raise(float_flag_iflush_denormal, &env->fp_status); > + float_raise(float_flag_inorm_denormal, &env->fp_status); > } else { > expdif = EXPD(temp) - EXPBIAS; > } > @@ -2976,7 +2976,8 @@ void update_mxcsr_status(CPUX86State *env) > (mxcsr & FPUS_ZE ? float_flag_divbyzero : 0) | > (mxcsr & FPUS_OE ? float_flag_overflow : 0) | > (mxcsr & FPUS_UE ? float_flag_underflow : 0) | > - (mxcsr & FPUS_PE ? float_flag_inexact : 0), > + (mxcsr & FPUS_PE ? float_flag_inexact : 0) | > + (mxcsr & FPUS_DE ? float_flag_inorm_denormal : 0), > &env->sse_status); > > /* set denormals are zero */ > @@ -2989,20 +2990,13 @@ void update_mxcsr_status(CPUX86State *env) > void update_mxcsr_from_sse_status(CPUX86State *env) > { > uint8_t flags = get_float_exception_flags(&env->sse_status); > - /* > - * The MXCSR denormal flag has opposite semantics to > - * float_flag_iflush_denormal (the softfloat code sets that flag > - * only when flushing input denormals to zero, but SSE sets it > - * only when not flushing them to zero), so is not converted > - * here. > - */ > env->mxcsr |= ((flags & float_flag_invalid ? FPUS_IE : 0) | > (flags & float_flag_divbyzero ? FPUS_ZE : 0) | > (flags & float_flag_overflow ? FPUS_OE : 0) | > (flags & float_flag_underflow ? FPUS_UE : 0) | > (flags & float_flag_inexact ? FPUS_PE : 0) | > - (flags & float_flag_oflush_denormal ? FPUS_UE | FPUS_PE : > - 0)); > + (flags & float_flag_inorm_denormal ? FPUS_DE : 0) | > + (flags & float_flag_oflush_denormal ? FPUS_UE | FPUS_PE : 0)); > } > > void helper_update_mxcsr(CPUX86State *env) >
diff --git a/target/i386/tcg/fpu_helper.c b/target/i386/tcg/fpu_helper.c index c9779a9fe0..edc550de55 100644 --- a/target/i386/tcg/fpu_helper.c +++ b/target/i386/tcg/fpu_helper.c @@ -148,7 +148,7 @@ static void merge_exception_flags(CPUX86State *env, uint8_t old_flags) (new_flags & float_flag_overflow ? FPUS_OE : 0) | (new_flags & float_flag_underflow ? FPUS_UE : 0) | (new_flags & float_flag_inexact ? FPUS_PE : 0) | - (new_flags & float_flag_iflush_denormal ? FPUS_DE : 0))); + (new_flags & float_flag_inorm_denormal ? FPUS_DE : 0))); } static inline floatx80 helper_fdiv(CPUX86State *env, floatx80 a, floatx80 b) @@ -1742,7 +1742,7 @@ void helper_fxtract(CPUX86State *env) int shift = clz64(temp.l.lower); temp.l.lower <<= shift; expdif = 1 - EXPBIAS - shift; - float_raise(float_flag_iflush_denormal, &env->fp_status); + float_raise(float_flag_inorm_denormal, &env->fp_status); } else { expdif = EXPD(temp) - EXPBIAS; } @@ -2976,7 +2976,8 @@ void update_mxcsr_status(CPUX86State *env) (mxcsr & FPUS_ZE ? float_flag_divbyzero : 0) | (mxcsr & FPUS_OE ? float_flag_overflow : 0) | (mxcsr & FPUS_UE ? float_flag_underflow : 0) | - (mxcsr & FPUS_PE ? float_flag_inexact : 0), + (mxcsr & FPUS_PE ? float_flag_inexact : 0) | + (mxcsr & FPUS_DE ? float_flag_inorm_denormal : 0), &env->sse_status); /* set denormals are zero */ @@ -2989,20 +2990,13 @@ void update_mxcsr_status(CPUX86State *env) void update_mxcsr_from_sse_status(CPUX86State *env) { uint8_t flags = get_float_exception_flags(&env->sse_status); - /* - * The MXCSR denormal flag has opposite semantics to - * float_flag_iflush_denormal (the softfloat code sets that flag - * only when flushing input denormals to zero, but SSE sets it - * only when not flushing them to zero), so is not converted - * here. - */ env->mxcsr |= ((flags & float_flag_invalid ? FPUS_IE : 0) | (flags & float_flag_divbyzero ? FPUS_ZE : 0) | (flags & float_flag_overflow ? FPUS_OE : 0) | (flags & float_flag_underflow ? FPUS_UE : 0) | (flags & float_flag_inexact ? FPUS_PE : 0) | - (flags & float_flag_oflush_denormal ? FPUS_UE | FPUS_PE : - 0)); + (flags & float_flag_inorm_denormal ? FPUS_DE : 0) | + (flags & float_flag_oflush_denormal ? FPUS_UE | FPUS_PE : 0)); } void helper_update_mxcsr(CPUX86State *env)
The FSR and MXCSR DE flags have the semantics of the new flag. We get to remove a big fixme in update_mxcsr_from_sse_status vs float_flag_iflush_denormal. Reported-by: Michael Morrell <mmorrell@tachyum.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- target/i386/tcg/fpu_helper.c | 18 ++++++------------ 1 file changed, 6 insertions(+), 12 deletions(-) -- 2.25.1