diff mbox series

[14/28] tcg/mips: Support bswap flags in tcg_out_bswap32

Message ID 20210614083800.1166166-15-richard.henderson@linaro.org
State Superseded
Headers show
Series tcg: bswap improvements | expand

Commit Message

Richard Henderson June 14, 2021, 8:37 a.m. UTC 
Merge tcg_out_bswap32 and tcg_out_bswap32s.  Use the flags
in the internal uses for loads and stores.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 tcg/mips/tcg-target.c.inc | 39 ++++++++++++++++-----------------------
 1 file changed, 16 insertions(+), 23 deletions(-)

-- 
2.25.1

Comments

Philippe Mathieu-Daudé June 14, 2021, 9:31 a.m. UTC | #1 
On 6/14/21 10:37 AM, Richard Henderson wrote:
> Merge tcg_out_bswap32 and tcg_out_bswap32s.  Use the flags

> in the internal uses for loads and stores.

> 

> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

> ---

>  tcg/mips/tcg-target.c.inc | 39 ++++++++++++++++-----------------------

>  1 file changed, 16 insertions(+), 23 deletions(-)


> -static void tcg_out_bswap32(TCGContext *s, TCGReg ret, TCGReg arg)

> +static void tcg_out_bswap32(TCGContext *s, TCGReg ret, TCGReg arg, int flags)

>  {

>      if (use_mips32r2_instructions) {

>          tcg_out_opc_reg(s, OPC_WSBH, ret, 0, arg);

>          tcg_out_opc_sa(s, OPC_ROTR, ret, ret, 16);

> +        if (flags & TCG_BSWAP_OZ) {

> +            tcg_out_opc_bf(s, OPC_DEXT, ret, ret, 31, 0);


Maybe mention the rotr -> ext32u mips32r2 simplification?

Otherwise:
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Richard Henderson June 14, 2021, 3:49 p.m. UTC | #2 
On 6/14/21 2:31 AM, Philippe Mathieu-Daudé wrote:
> On 6/14/21 10:37 AM, Richard Henderson wrote:

>> Merge tcg_out_bswap32 and tcg_out_bswap32s.  Use the flags

>> in the internal uses for loads and stores.

>>

>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

>> ---

>>   tcg/mips/tcg-target.c.inc | 39 ++++++++++++++++-----------------------

>>   1 file changed, 16 insertions(+), 23 deletions(-)

> 

>> -static void tcg_out_bswap32(TCGContext *s, TCGReg ret, TCGReg arg)

>> +static void tcg_out_bswap32(TCGContext *s, TCGReg ret, TCGReg arg, int flags)

>>   {

>>       if (use_mips32r2_instructions) {

>>           tcg_out_opc_reg(s, OPC_WSBH, ret, 0, arg);

>>           tcg_out_opc_sa(s, OPC_ROTR, ret, ret, 16);

>> +        if (flags & TCG_BSWAP_OZ) {

>> +            tcg_out_opc_bf(s, OPC_DEXT, ret, ret, 31, 0);

> 

> Maybe mention the rotr -> ext32u mips32r2 simplification?


Oh, from dsbh + dshd + dsrl in the old bswap32u function?
Sure, I can do that.


r~
diff mbox series

Patch

diff --git a/tcg/mips/tcg-target.c.inc b/tcg/mips/tcg-target.c.inc
index 7a5634419c..e3698274eb 100644
--- a/tcg/mips/tcg-target.c.inc
+++ b/tcg/mips/tcg-target.c.inc
@@ -578,27 +578,20 @@  static void tcg_out_bswap_subr(TCGContext *s, const tcg_insn_unit *sub)
     tcg_debug_assert(ok);
 }
 
-static void tcg_out_bswap32(TCGContext *s, TCGReg ret, TCGReg arg)
+static void tcg_out_bswap32(TCGContext *s, TCGReg ret, TCGReg arg, int flags)
 {
     if (use_mips32r2_instructions) {
         tcg_out_opc_reg(s, OPC_WSBH, ret, 0, arg);
         tcg_out_opc_sa(s, OPC_ROTR, ret, ret, 16);
+        if (flags & TCG_BSWAP_OZ) {
+            tcg_out_opc_bf(s, OPC_DEXT, ret, ret, 31, 0);
+        }
     } else {
-        tcg_out_bswap_subr(s, bswap32_addr);
-        /* delay slot -- never omit the insn, like tcg_out_mov might.  */
-        tcg_out_opc_reg(s, OPC_OR, TCG_TMP0, arg, TCG_REG_ZERO);
-        tcg_out_mov(s, TCG_TYPE_I32, ret, TCG_TMP3);
-    }
-}
-
-static void tcg_out_bswap32u(TCGContext *s, TCGReg ret, TCGReg arg)
-{
-    if (use_mips32r2_instructions) {
-        tcg_out_opc_reg(s, OPC_DSBH, ret, 0, arg);
-        tcg_out_opc_reg(s, OPC_DSHD, ret, 0, ret);
-        tcg_out_dsrl(s, ret, ret, 32);
-    } else {
-        tcg_out_bswap_subr(s, bswap32u_addr);
+        if (flags & TCG_BSWAP_OZ) {
+            tcg_out_bswap_subr(s, bswap32u_addr);
+        } else {
+            tcg_out_bswap_subr(s, bswap32_addr);
+        }
         /* delay slot -- never omit the insn, like tcg_out_mov might.  */
         tcg_out_opc_reg(s, OPC_OR, TCG_TMP0, arg, TCG_REG_ZERO);
         tcg_out_mov(s, TCG_TYPE_I32, ret, TCG_TMP3);
@@ -1380,7 +1373,7 @@  static void tcg_out_qemu_ld_direct(TCGContext *s, TCGReg lo, TCGReg hi,
         if (TCG_TARGET_REG_BITS == 64 && is_64) {
             if (use_mips32r2_instructions) {
                 tcg_out_opc_imm(s, OPC_LWU, lo, base, 0);
-                tcg_out_bswap32u(s, lo, lo);
+                tcg_out_bswap32(s, lo, lo, TCG_BSWAP_IZ | TCG_BSWAP_OZ);
             } else {
                 tcg_out_bswap_subr(s, bswap32u_addr);
                 /* delay slot */
@@ -1393,7 +1386,7 @@  static void tcg_out_qemu_ld_direct(TCGContext *s, TCGReg lo, TCGReg hi,
     case MO_SL | MO_BSWAP:
         if (use_mips32r2_instructions) {
             tcg_out_opc_imm(s, OPC_LW, lo, base, 0);
-            tcg_out_bswap32(s, lo, lo);
+            tcg_out_bswap32(s, lo, lo, 0);
         } else {
             tcg_out_bswap_subr(s, bswap32_addr);
             /* delay slot */
@@ -1519,7 +1512,7 @@  static void tcg_out_qemu_st_direct(TCGContext *s, TCGReg lo, TCGReg hi,
         break;
 
     case MO_32 | MO_BSWAP:
-        tcg_out_bswap32(s, TCG_TMP3, lo);
+        tcg_out_bswap32(s, TCG_TMP3, lo, 0);
         lo = TCG_TMP3;
         /* FALLTHRU */
     case MO_32:
@@ -1538,9 +1531,9 @@  static void tcg_out_qemu_st_direct(TCGContext *s, TCGReg lo, TCGReg hi,
             tcg_out_opc_imm(s, OPC_SW, TCG_TMP0, base, 0);
             tcg_out_opc_imm(s, OPC_SW, TCG_TMP1, base, 4);
         } else {
-            tcg_out_bswap32(s, TCG_TMP3, MIPS_BE ? lo : hi);
+            tcg_out_bswap32(s, TCG_TMP3, MIPS_BE ? lo : hi, 0);
             tcg_out_opc_imm(s, OPC_SW, TCG_TMP3, base, 0);
-            tcg_out_bswap32(s, TCG_TMP3, MIPS_BE ? hi : lo);
+            tcg_out_bswap32(s, TCG_TMP3, MIPS_BE ? hi : lo, 0);
             tcg_out_opc_imm(s, OPC_SW, TCG_TMP3, base, 4);
         }
         break;
@@ -1945,10 +1938,10 @@  static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
         tcg_out_bswap16(s, a0, a1, a2);
         break;
     case INDEX_op_bswap32_i32:
-        tcg_out_bswap32(s, a0, a1);
+        tcg_out_bswap32(s, a0, a1, 0);
         break;
     case INDEX_op_bswap32_i64:
-        tcg_out_bswap32u(s, a0, a1);
+        tcg_out_bswap32(s, a0, a1, a2);
         break;
     case INDEX_op_bswap64_i64:
         tcg_out_bswap64(s, a0, a1);