Message ID | 20210527191251.6317-2-marco.chiappero@intel.com |
---|---|
State | New |
Headers | show |
Series | crypto: qat - misc fixes | expand |
On Thu, May 27, 2021 at 08:12:42PM +0100, Marco Chiappero wrote: > > diff --git a/drivers/crypto/qat/qat_common/adf_isr.c b/drivers/crypto/qat/qat_common/adf_isr.c > index e3ad5587be49..22f8ef5bfbc5 100644 > --- a/drivers/crypto/qat/qat_common/adf_isr.c > +++ b/drivers/crypto/qat/qat_common/adf_isr.c > @@ -15,6 +15,10 @@ > #include "adf_transport_access_macros.h" > #include "adf_transport_internal.h" > > +#ifdef CONFIG_PCI_IOV > +#define ADF_MAX_NUM_VFS 32 > +#endif The #ifdef is not necessary. Thanks, -- Email: Herbert Xu <herbert@gondor.apana.org.au> Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
> -----Original Message----- > From: Herbert Xu <herbert@gondor.apana.org.au> > Sent: Thursday, June 3, 2021 1:16 PM > To: Chiappero, Marco <marco.chiappero@intel.com> > Cc: linux-crypto@vger.kernel.org; qat-linux <qat-linux@intel.com>; Cabiddu, > Giovanni <giovanni.cabiddu@intel.com> > Subject: Re: [PATCH 01/10] crypto: qat - use proper type for vf_mask > > On Thu, May 27, 2021 at 08:12:42PM +0100, Marco Chiappero wrote: > > > > diff --git a/drivers/crypto/qat/qat_common/adf_isr.c > > b/drivers/crypto/qat/qat_common/adf_isr.c > > index e3ad5587be49..22f8ef5bfbc5 100644 > > --- a/drivers/crypto/qat/qat_common/adf_isr.c > > +++ b/drivers/crypto/qat/qat_common/adf_isr.c > > @@ -15,6 +15,10 @@ > > #include "adf_transport_access_macros.h" > > #include "adf_transport_internal.h" > > > > +#ifdef CONFIG_PCI_IOV > > +#define ADF_MAX_NUM_VFS 32 > > +#endif > > The #ifdef is not necessary. Right, will resubmit soon. Thank you, Marco
diff --git a/drivers/crypto/qat/qat_common/adf_isr.c b/drivers/crypto/qat/qat_common/adf_isr.c index e3ad5587be49..22f8ef5bfbc5 100644 --- a/drivers/crypto/qat/qat_common/adf_isr.c +++ b/drivers/crypto/qat/qat_common/adf_isr.c @@ -15,6 +15,10 @@ #include "adf_transport_access_macros.h" #include "adf_transport_internal.h" +#ifdef CONFIG_PCI_IOV +#define ADF_MAX_NUM_VFS 32 +#endif + static int adf_enable_msix(struct adf_accel_dev *accel_dev) { struct adf_accel_pci *pci_dev_info = &accel_dev->accel_pci_dev; @@ -72,7 +76,7 @@ static irqreturn_t adf_msix_isr_ae(int irq, void *dev_ptr) struct adf_bar *pmisc = &GET_BARS(accel_dev)[hw_data->get_misc_bar_id(hw_data)]; void __iomem *pmisc_bar_addr = pmisc->virt_addr; - u32 vf_mask; + unsigned long vf_mask; /* Get the interrupt sources triggered by VFs */ vf_mask = ((ADF_CSR_RD(pmisc_bar_addr, ADF_ERRSOU5) & @@ -93,8 +97,7 @@ static irqreturn_t adf_msix_isr_ae(int irq, void *dev_ptr) * unless the VF is malicious and is attempting to * flood the host OS with VF2PF interrupts. */ - for_each_set_bit(i, (const unsigned long *)&vf_mask, - (sizeof(vf_mask) * BITS_PER_BYTE)) { + for_each_set_bit(i, &vf_mask, ADF_MAX_NUM_VFS) { vf_info = accel_dev->pf.vf_info + i; if (!__ratelimit(&vf_info->vf2pf_ratelimit)) {