| Message ID | 20210517034913.3432-1-baolu.lu@linux.intel.com |
|---|---|
| State | New |
| Headers | show |
| Series | [REWORKED,1/1] iommu/vt-d: Preset Access/Dirty bits for IOVA over FL | expand |
Hi Greg, On 5/17/21 3:07 PM, Greg KH wrote: > On Mon, May 17, 2021 at 11:49:13AM +0800, Lu Baolu wrote: >> [ Upstream commit a8ce9ebbecdfda3322bbcece6b3b25888217f8e3 ] >> >> The Access/Dirty bits in the first level page table entry will be set >> whenever a page table entry was used for address translation or write >> permission was successfully translated. This is always true when using >> the first-level page table for kernel IOVA. Instead of wasting hardware >> cycles to update the certain bits, it's better to set them up at the >> beginning. >> >> Suggested-by: Ashok Raj <ashok.raj@intel.com> >> Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> >> Link: https://lore.kernel.org/r/20210115004202.953965-1-baolu.lu@linux.intel.com >> Signed-off-by: Joerg Roedel <jroedel@suse.de> >> Signed-off-by: Sasha Levin <sashal@kernel.org> >> --- >> drivers/iommu/intel/iommu.c | 14 ++++++++++++-- >> include/linux/intel-iommu.h | 2 ++ >> 2 files changed, 14 insertions(+), 2 deletions(-) >> >> [Note: >> - This is a reworked patch of >> https://lore.kernel.org/stable/20210512144819.664462530@linuxfoundation.org/T/#m65267f0a0091c2fcbde097cea91089775908faad. >> - It aims to fix a reported issue of >> https://bugzilla.kernel.org/show_bug.cgi?id=213077. >> - Please help to review and test.] > > What stable tree(s) is this supposed to be for? It's for 5.10.37. > > thanks, > > greg k-h > Best regards, baolu
On Mon, May 17, 2021 at 03:17:53PM +0800, Lu Baolu wrote: > Hi Greg, > > On 5/17/21 3:07 PM, Greg KH wrote: > > On Mon, May 17, 2021 at 11:49:13AM +0800, Lu Baolu wrote: > > > [ Upstream commit a8ce9ebbecdfda3322bbcece6b3b25888217f8e3 ] > > > > > > The Access/Dirty bits in the first level page table entry will be set > > > whenever a page table entry was used for address translation or write > > > permission was successfully translated. This is always true when using > > > the first-level page table for kernel IOVA. Instead of wasting hardware > > > cycles to update the certain bits, it's better to set them up at the > > > beginning. > > > > > > Suggested-by: Ashok Raj <ashok.raj@intel.com> > > > Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> > > > Link: https://lore.kernel.org/r/20210115004202.953965-1-baolu.lu@linux.intel.com > > > Signed-off-by: Joerg Roedel <jroedel@suse.de> > > > Signed-off-by: Sasha Levin <sashal@kernel.org> > > > --- > > > drivers/iommu/intel/iommu.c | 14 ++++++++++++-- > > > include/linux/intel-iommu.h | 2 ++ > > > 2 files changed, 14 insertions(+), 2 deletions(-) > > > > > > [Note: > > > - This is a reworked patch of > > > https://lore.kernel.org/stable/20210512144819.664462530@linuxfoundation.org/T/#m65267f0a0091c2fcbde097cea91089775908faad. > > > - It aims to fix a reported issue of > > > https://bugzilla.kernel.org/show_bug.cgi?id=213077. > > > - Please help to review and test.] > > > > What stable tree(s) is this supposed to be for? > > It's for 5.10.37. But the above commit is already in 5.10.y. And what about 5.11 and 5.12, were those backports incorrect? confused, greg k-h
On Mon, May 17, 2021 at 03:51:13PM +0800, Lu Baolu wrote: > Hi Greg, > > On 5/17/21 3:27 PM, Greg KH wrote: > > On Mon, May 17, 2021 at 03:17:53PM +0800, Lu Baolu wrote: > > > Hi Greg, > > > > > > On 5/17/21 3:07 PM, Greg KH wrote: > > > > On Mon, May 17, 2021 at 11:49:13AM +0800, Lu Baolu wrote: > > > > > [ Upstream commit a8ce9ebbecdfda3322bbcece6b3b25888217f8e3 ] > > > > > > > > > > The Access/Dirty bits in the first level page table entry will be set > > > > > whenever a page table entry was used for address translation or write > > > > > permission was successfully translated. This is always true when using > > > > > the first-level page table for kernel IOVA. Instead of wasting hardware > > > > > cycles to update the certain bits, it's better to set them up at the > > > > > beginning. > > > > > > > > > > Suggested-by: Ashok Raj <ashok.raj@intel.com> > > > > > Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> > > > > > Link: https://lore.kernel.org/r/20210115004202.953965-1-baolu.lu@linux.intel.com > > > > > Signed-off-by: Joerg Roedel <jroedel@suse.de> > > > > > Signed-off-by: Sasha Levin <sashal@kernel.org> > > > > > --- > > > > > drivers/iommu/intel/iommu.c | 14 ++++++++++++-- > > > > > include/linux/intel-iommu.h | 2 ++ > > > > > 2 files changed, 14 insertions(+), 2 deletions(-) > > > > > > > > > > [Note: > > > > > - This is a reworked patch of > > > > > https://lore.kernel.org/stable/20210512144819.664462530@linuxfoundation.org/T/#m65267f0a0091c2fcbde097cea91089775908faad. > > > > > - It aims to fix a reported issue of > > > > > https://bugzilla.kernel.org/show_bug.cgi?id=213077. > > > > > - Please help to review and test.] > > > > > > > > What stable tree(s) is this supposed to be for? > > > > > > It's for 5.10.37. > > > > But the above commit is already in 5.10.y. And what about 5.11 and > > 5.12, were those backports incorrect? > > Above commit is now only in v5.10.37. Other 5.10.y are not impacted. > > 5.11 and 5.12 both have correct backports. Thanks for this, I've reverted the offending commit and added this one in it's place. greg k-h
diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 3295e5e162a4..33ffbcb53dec 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -1028,8 +1028,11 @@ static struct dma_pte *pfn_to_dma_pte(struct dmar_domain *domain, domain_flush_cache(domain, tmp_page, VTD_PAGE_SIZE); pteval = ((uint64_t)virt_to_dma_pfn(tmp_page) << VTD_PAGE_SHIFT) | DMA_PTE_READ | DMA_PTE_WRITE; - if (domain_use_first_level(domain)) + if (domain_use_first_level(domain)) { pteval |= DMA_FL_PTE_XD | DMA_FL_PTE_US; + if (domain->domain.type == IOMMU_DOMAIN_DMA) + pteval |= DMA_FL_PTE_ACCESS; + } if (cmpxchg64(&pte->val, 0ULL, pteval)) /* Someone else set it while we were thinking; use theirs. */ free_pgtable_page(tmp_page); @@ -2354,9 +2357,16 @@ static int __domain_mapping(struct dmar_domain *domain, unsigned long iov_pfn, return -EINVAL; attr = prot & (DMA_PTE_READ | DMA_PTE_WRITE | DMA_PTE_SNP); - if (domain_use_first_level(domain)) + if (domain_use_first_level(domain)) { attr |= DMA_FL_PTE_PRESENT | DMA_FL_PTE_XD | DMA_FL_PTE_US; + if (domain->domain.type == IOMMU_DOMAIN_DMA) { + attr |= DMA_FL_PTE_ACCESS; + if (prot & DMA_PTE_WRITE) + attr |= DMA_FL_PTE_DIRTY; + } + } + if (!sg) { sg_res = nr_pages; pteval = ((phys_addr_t)phys_pfn << VTD_PAGE_SHIFT) | attr; diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h index 94522685a0d9..ccaa057faf8c 100644 --- a/include/linux/intel-iommu.h +++ b/include/linux/intel-iommu.h @@ -42,6 +42,8 @@ #define DMA_FL_PTE_PRESENT BIT_ULL(0) #define DMA_FL_PTE_US BIT_ULL(2) +#define DMA_FL_PTE_ACCESS BIT_ULL(5) +#define DMA_FL_PTE_DIRTY BIT_ULL(6) #define DMA_FL_PTE_XD BIT_ULL(63) #define ADDR_WIDTH_5LEVEL (57)