Message ID | 1620111510-31455-1-git-send-email-sibis@codeaurora.org |
---|---|
Headers | show |
Series | DDR/L3 Scaling support on SC7280 SoCs | expand |
Hey Doug, Thanks for the review! On 2021-05-05 01:32, Doug Anderson wrote: > Hi, > > On Mon, May 3, 2021 at 11:59 PM Sibi Sankar <sibis@codeaurora.org> > wrote: >> >> + cpu0_opp_table: cpu0_opp_table { >> + compatible = "operating-points-v2"; >> + opp-shared; >> + >> + cpu0_opp1: opp-300000000 { > > It seems like it might be nicer to give the node labels a less > arbitrary name. How about? > > cpu0_opp_300mhz: opp-300000000 > > That has advantes: > > * If, for some reason, you have to mess with some operating point in > another dts it'll be less fragile. > > * It'll make diffing easier between SoCs. > > * If you end up putting a new operating point in the middle you don't > need to rename everything below. sure makes sense, will fix it in v3. > > Other than that, I can't say that I'm a huge expert on the > interconnect stuff and whether those make sense, but I'm still OK > with: > > Reviewed-by: Douglas Anderson <dianders@chromium.org>