| Message ID | 20210327134652.155431-3-grandpaul@gmail.com |
|---|---|
| State | New |
| Headers | show |
| Series | power: regulator: add driver for ANATOP regulator | expand |
On 3/27/21 10:46 PM, Ying-Chun Liu wrote: > From: "Ying-Chun Liu (PaulLiu)" <paul.liu@linaro.org> > > Document the bindings for fsl,anatop-regulator > > Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org> > Reviewed-by: Sean Anderson <sean.anderson@seco.com> > Cc: Fabio Estevam <fabio.estevam@nxp.com> > Cc: Jaehoon Chung <jh80.chung@samsung.com>> Cc: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Best Regards, Jaehoon Chung > --- > .../regulator/fsl,anatop-regulator.txt | 45 +++++++++++++++++++ > 1 file changed, 45 insertions(+) > create mode 100644 doc/device-tree-bindings/regulator/fsl,anatop-regulator.txt > > diff --git a/doc/device-tree-bindings/regulator/fsl,anatop-regulator.txt b/doc/device-tree-bindings/regulator/fsl,anatop-regulator.txt > new file mode 100644 > index 0000000000..2a60e4941b > --- /dev/null > +++ b/doc/device-tree-bindings/regulator/fsl,anatop-regulator.txt > @@ -0,0 +1,45 @@ > +ANATOP REGULATOR > + > +Anatop is an integrated regulator inside i.MX6 SoC. > + > +Required properties: > +- compatible: Must be "fsl,anatop-regulator". > +- regulator-name: Name of the regulator > +- anatop-reg-offset: u32 value representing the anatop MFD register offset. > +- anatop-vol-bit-shift: u32 value representing the bit shift for the register. > +- anatop-vol-bit-width: u32 value representing the number of bits used in the > + register. > +- anatop-min-bit-val: u32 value representing the minimum value of this > + register. > +- anatop-min-voltage: u32 value representing the minimum voltage of this > + regulator. > +- anatop-max-voltage: u32 value representing the maximum voltage of this > + regulator. > + > +Optional properties: > +- anatop-delay-reg-offset: u32 value representing the anatop MFD step time > + register offset. > +- anatop-delay-bit-shift: u32 value representing the bit shift for the step > + time register. > +- anatop-delay-bit-width: u32 value representing the number of bits used in > + the step time register. > +- anatop-enable-bit: u32 value representing regulator enable bit offset. > +- vin-supply: input supply phandle. > + > +Example: > + regulator-vddpu { > + compatible = "fsl,anatop-regulator"; > + regulator-name = "vddpu"; > + regulator-min-microvolt = <725000>; > + regulator-max-microvolt = <1300000>; > + regulator-always-on; > + anatop-reg-offset = <0x140>; > + anatop-vol-bit-shift = <9>; > + anatop-vol-bit-width = <5>; > + anatop-delay-reg-offset = <0x170>; > + anatop-delay-bit-shift = <24>; > + anatop-delay-bit-width = <2>; > + anatop-min-bit-val = <1>; > + anatop-min-voltage = <725000>; > + anatop-max-voltage = <1300000>; > + }; >
On Sat, Mar 27, 2021 at 09:46:52PM +0800, Ying-Chun Liu wrote: > From: "Ying-Chun Liu (PaulLiu)" <paul.liu@linaro.org> > > Document the bindings for fsl,anatop-regulator > > Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org> > Reviewed-by: Sean Anderson <sean.anderson@seco.com> > Cc: Fabio Estevam <fabio.estevam@nxp.com> > Cc: Jaehoon Chung <jh80.chung@samsung.com> > Cc: Peng Fan <peng.fan@nxp.com> > Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Applied to u-boot/master, thanks! -- Tom
diff --git a/doc/device-tree-bindings/regulator/fsl,anatop-regulator.txt b/doc/device-tree-bindings/regulator/fsl,anatop-regulator.txt new file mode 100644 index 0000000000..2a60e4941b --- /dev/null +++ b/doc/device-tree-bindings/regulator/fsl,anatop-regulator.txt @@ -0,0 +1,45 @@ +ANATOP REGULATOR + +Anatop is an integrated regulator inside i.MX6 SoC. + +Required properties: +- compatible: Must be "fsl,anatop-regulator". +- regulator-name: Name of the regulator +- anatop-reg-offset: u32 value representing the anatop MFD register offset. +- anatop-vol-bit-shift: u32 value representing the bit shift for the register. +- anatop-vol-bit-width: u32 value representing the number of bits used in the + register. +- anatop-min-bit-val: u32 value representing the minimum value of this + register. +- anatop-min-voltage: u32 value representing the minimum voltage of this + regulator. +- anatop-max-voltage: u32 value representing the maximum voltage of this + regulator. + +Optional properties: +- anatop-delay-reg-offset: u32 value representing the anatop MFD step time + register offset. +- anatop-delay-bit-shift: u32 value representing the bit shift for the step + time register. +- anatop-delay-bit-width: u32 value representing the number of bits used in + the step time register. +- anatop-enable-bit: u32 value representing regulator enable bit offset. +- vin-supply: input supply phandle. + +Example: + regulator-vddpu { + compatible = "fsl,anatop-regulator"; + regulator-name = "vddpu"; + regulator-min-microvolt = <725000>; + regulator-max-microvolt = <1300000>; + regulator-always-on; + anatop-reg-offset = <0x140>; + anatop-vol-bit-shift = <9>; + anatop-vol-bit-width = <5>; + anatop-delay-reg-offset = <0x170>; + anatop-delay-bit-shift = <24>; + anatop-delay-bit-width = <2>; + anatop-min-bit-val = <1>; + anatop-min-voltage = <725000>; + anatop-max-voltage = <1300000>; + };