Message ID | 161848823868.29796.2378720492280917598.tip-bot2@tip-bot2 |
---|---|
State | Superseded |
Headers | show |
Series | [thermal:,thermal/next] thermal/drivers/tsens: Convert msm8960 to reg_field | expand |
> > Hi thermal-bot, > > Thank you for the patch! Yet something to improve: > > [auto build test ERROR on linus/master] > [also build test ERROR on v5.12-rc7] > [cannot apply to thermal/next next-20210415] > [If your patch is applied to the wrong git tree, kindly drop us a note. > And when submitting patch, we suggest to use '--base' as documented in > https://git-scm.com/docs/git-format-patch] > > url: https://github.com/0day-ci/linux/commits/thermal-bot-for-Ansuel-Smith/thermal-drivers-tsens-Convert-msm8960-to-reg_field/20210415-200542 > base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 7f75285ca572eaabc028cf78c6ab5473d0d160be > config: arm-randconfig-r015-20210415 (attached as .config) > compiler: arm-linux-gnueabi-gcc (GCC) 9.3.0 > reproduce (this is a W=1 build): > wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross > chmod +x ~/bin/make.cross > # https://github.com/0day-ci/linux/commit/efea0f0570b6b581bdb2fad978a35fd1a521385b > git remote add linux-review https://github.com/0day-ci/linux > git fetch --no-tags linux-review thermal-bot-for-Ansuel-Smith/thermal-drivers-tsens-Convert-msm8960-to-reg_field/20210415-200542 > git checkout efea0f0570b6b581bdb2fad978a35fd1a521385b > # save the attached .config to linux build tree > COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross W=1 ARCH=arm > > If you fix the issue, kindly add following tag as appropriate > Reported-by: kernel test robot <lkp@intel.com> > > All errors (new ones prefixed by >>): > > drivers/thermal/qcom/tsens-8960.c: In function 'init_8960': > >> drivers/thermal/qcom/tsens-8960.c:193:29: error: 'S0_STATUS_ADDR' undeclared (first use in this function); did you mean 'INT_STATUS_ADDR'? > 193 | priv->sensor[i].status = S0_STATUS_ADDR + 40; > | ^~~~~~~~~~~~~~ > | INT_STATUS_ADDR > drivers/thermal/qcom/tsens-8960.c:193:29: note: each undeclared identifier is reported only once for each function it appears in > drivers/thermal/qcom/tsens-8960.c: At top level: > >> drivers/thermal/qcom/tsens-8960.c:284:15: error: 'VER_0' undeclared here (not in a function); did you mean 'VER_0_1'? > 284 | .ver_major = VER_0, > | ^~~~~ > | VER_0_1 > > > vim +193 drivers/thermal/qcom/tsens-8960.c > > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 175 > 69b628ac71f07d6 Amit Kucheria 2019-03-20 176 static int init_8960(struct tsens_priv *priv) > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 177 { > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 178 int ret, i; > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 179 u32 reg_cntl; > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 180 > 69b628ac71f07d6 Amit Kucheria 2019-03-20 181 priv->tm_map = dev_get_regmap(priv->dev, NULL); > 69b628ac71f07d6 Amit Kucheria 2019-03-20 182 if (!priv->tm_map) > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 183 return -ENODEV; > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 184 > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 185 /* > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 186 * The status registers for each sensor are discontiguous > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 187 * because some SoCs have 5 sensors while others have more > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 188 * but the control registers stay in the same place, i.e > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 189 * directly after the first 5 status registers. > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 190 */ > 69b628ac71f07d6 Amit Kucheria 2019-03-20 191 for (i = 0; i < priv->num_sensors; i++) { > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 192 if (i >= 5) > 69b628ac71f07d6 Amit Kucheria 2019-03-20 @193 priv->sensor[i].status = S0_STATUS_ADDR + 40; > 69b628ac71f07d6 Amit Kucheria 2019-03-20 194 priv->sensor[i].status += i * 4; > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 195 } > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 196 > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 197 reg_cntl = SW_RST; > 69b628ac71f07d6 Amit Kucheria 2019-03-20 198 ret = regmap_update_bits(priv->tm_map, CNTL_ADDR, SW_RST, reg_cntl); > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 199 if (ret) > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 200 return ret; > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 201 > 69b628ac71f07d6 Amit Kucheria 2019-03-20 202 if (priv->num_sensors > 1) { > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 203 reg_cntl |= SLP_CLK_ENA | (MEASURE_PERIOD << 18); > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 204 reg_cntl &= ~SW_RST; > 69b628ac71f07d6 Amit Kucheria 2019-03-20 205 ret = regmap_update_bits(priv->tm_map, CONFIG_ADDR, > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 206 CONFIG_MASK, CONFIG); > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 207 } else { > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 208 reg_cntl |= SLP_CLK_ENA_8660 | (MEASURE_PERIOD << 16); > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 209 reg_cntl &= ~CONFIG_MASK_8660; > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 210 reg_cntl |= CONFIG_8660 << CONFIG_SHIFT_8660; > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 211 } > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 212 > 69b628ac71f07d6 Amit Kucheria 2019-03-20 213 reg_cntl |= GENMASK(priv->num_sensors - 1, 0) << SENSOR0_SHIFT; > 69b628ac71f07d6 Amit Kucheria 2019-03-20 214 ret = regmap_write(priv->tm_map, CNTL_ADDR, reg_cntl); > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 215 if (ret) > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 216 return ret; > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 217 > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 218 reg_cntl |= EN; > 69b628ac71f07d6 Amit Kucheria 2019-03-20 219 ret = regmap_write(priv->tm_map, CNTL_ADDR, reg_cntl); > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 220 if (ret) > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 221 return ret; > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 222 > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 223 return 0; > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 224 } > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 225 > 69b628ac71f07d6 Amit Kucheria 2019-03-20 226 static int calibrate_8960(struct tsens_priv *priv) > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 227 { > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 228 int i; > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 229 char *data; > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 230 > 69b628ac71f07d6 Amit Kucheria 2019-03-20 231 ssize_t num_read = priv->num_sensors; > 69b628ac71f07d6 Amit Kucheria 2019-03-20 232 struct tsens_sensor *s = priv->sensor; > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 233 > 69b628ac71f07d6 Amit Kucheria 2019-03-20 234 data = qfprom_read(priv->dev, "calib"); > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 235 if (IS_ERR(data)) > 69b628ac71f07d6 Amit Kucheria 2019-03-20 236 data = qfprom_read(priv->dev, "calib_backup"); > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 237 if (IS_ERR(data)) > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 238 return PTR_ERR(data); > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 239 > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 240 for (i = 0; i < num_read; i++, s++) > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 241 s->offset = data[i]; > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 242 > 6b8249abb093551 Srinivas Kandagatla 2019-08-23 243 kfree(data); > 6b8249abb093551 Srinivas Kandagatla 2019-08-23 244 > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 245 return 0; > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 246 } > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 247 > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 248 /* Temperature on y axis and ADC-code on x-axis */ > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 249 static inline int code_to_mdegC(u32 adc_code, const struct tsens_sensor *s) > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 250 { > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 251 int slope, offset; > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 252 > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 253 slope = thermal_zone_get_slope(s->tzd); > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 254 offset = CAL_MDEGC - slope * s->offset; > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 255 > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 256 return adc_code * slope + offset; > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 257 } > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 258 > e604bdd2a7e1087 Amit Kucheria 2020-03-12 259 static int get_temp_8960(const struct tsens_sensor *s, int *temp) > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 260 { > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 261 int ret; > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 262 u32 code, trdy; > 8b71bce407b3f13 Amit Kucheria 2019-11-01 263 struct tsens_priv *priv = s->priv; > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 264 unsigned long timeout; > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 265 > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 266 timeout = jiffies + usecs_to_jiffies(TIMEOUT_US); > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 267 do { > 69b628ac71f07d6 Amit Kucheria 2019-03-20 268 ret = regmap_read(priv->tm_map, INT_STATUS_ADDR, &trdy); > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 269 if (ret) > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 270 return ret; > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 271 if (!(trdy & TRDY_MASK)) > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 272 continue; > 69b628ac71f07d6 Amit Kucheria 2019-03-20 273 ret = regmap_read(priv->tm_map, s->status, &code); > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 274 if (ret) > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 275 return ret; > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 276 *temp = code_to_mdegC(code, s); > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 277 return 0; > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 278 } while (time_before(jiffies, timeout)); > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 279 > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 280 return -ETIMEDOUT; > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 281 } > 20d4fd84bf524ad Rajendra Nayak 2016-05-05 282 > efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 283 static struct tsens_features tsens_8960_feat = { > efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 @284 .ver_major = VER_0, > efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 285 .crit_int = 0, > efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 286 .adc = 1, > efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 287 .srot_split = 0, > efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 288 .max_sensors = 11, > efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 289 }; > efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 290 > > --- > 0-DAY CI Kernel Test Service, Intel Corporation > https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org What happened here? This doesn't seem right.
Hi thermal-bot, Thank you for the patch! Yet something to improve: [auto build test ERROR on linus/master] [also build test ERROR on v5.12-rc7] [cannot apply to thermal/next next-20210415] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/thermal-bot-for-Ansuel-Smith/thermal-drivers-tsens-Convert-msm8960-to-reg_field/20210415-200542 base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 7f75285ca572eaabc028cf78c6ab5473d0d160be config: powerpc-randconfig-r022-20210415 (attached as .config) compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project 6a18cc23efad410db48a3ccfc233d215de7d4cb9) reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # install powerpc cross compiling tool for clang build # apt-get install binutils-powerpc-linux-gnu # https://github.com/0day-ci/linux/commit/efea0f0570b6b581bdb2fad978a35fd1a521385b git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review thermal-bot-for-Ansuel-Smith/thermal-drivers-tsens-Convert-msm8960-to-reg_field/20210415-200542 git checkout efea0f0570b6b581bdb2fad978a35fd1a521385b # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 ARCH=powerpc If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp@intel.com> All errors (new ones prefixed by >>): >> drivers/thermal/qcom/tsens-8960.c:193:29: error: use of undeclared identifier 'S0_STATUS_ADDR' priv->sensor[i].status = S0_STATUS_ADDR + 40; ^ >> drivers/thermal/qcom/tsens-8960.c:284:15: error: use of undeclared identifier 'VER_0' .ver_major = VER_0, ^ 2 errors generated. vim +/S0_STATUS_ADDR +193 drivers/thermal/qcom/tsens-8960.c 20d4fd84bf524ad Rajendra Nayak 2016-05-05 175 69b628ac71f07d6 Amit Kucheria 2019-03-20 176 static int init_8960(struct tsens_priv *priv) 20d4fd84bf524ad Rajendra Nayak 2016-05-05 177 { 20d4fd84bf524ad Rajendra Nayak 2016-05-05 178 int ret, i; 20d4fd84bf524ad Rajendra Nayak 2016-05-05 179 u32 reg_cntl; 20d4fd84bf524ad Rajendra Nayak 2016-05-05 180 69b628ac71f07d6 Amit Kucheria 2019-03-20 181 priv->tm_map = dev_get_regmap(priv->dev, NULL); 69b628ac71f07d6 Amit Kucheria 2019-03-20 182 if (!priv->tm_map) 20d4fd84bf524ad Rajendra Nayak 2016-05-05 183 return -ENODEV; 20d4fd84bf524ad Rajendra Nayak 2016-05-05 184 20d4fd84bf524ad Rajendra Nayak 2016-05-05 185 /* 20d4fd84bf524ad Rajendra Nayak 2016-05-05 186 * The status registers for each sensor are discontiguous 20d4fd84bf524ad Rajendra Nayak 2016-05-05 187 * because some SoCs have 5 sensors while others have more 20d4fd84bf524ad Rajendra Nayak 2016-05-05 188 * but the control registers stay in the same place, i.e 20d4fd84bf524ad Rajendra Nayak 2016-05-05 189 * directly after the first 5 status registers. 20d4fd84bf524ad Rajendra Nayak 2016-05-05 190 */ 69b628ac71f07d6 Amit Kucheria 2019-03-20 191 for (i = 0; i < priv->num_sensors; i++) { 20d4fd84bf524ad Rajendra Nayak 2016-05-05 192 if (i >= 5) 69b628ac71f07d6 Amit Kucheria 2019-03-20 @193 priv->sensor[i].status = S0_STATUS_ADDR + 40; 69b628ac71f07d6 Amit Kucheria 2019-03-20 194 priv->sensor[i].status += i * 4; 20d4fd84bf524ad Rajendra Nayak 2016-05-05 195 } 20d4fd84bf524ad Rajendra Nayak 2016-05-05 196 20d4fd84bf524ad Rajendra Nayak 2016-05-05 197 reg_cntl = SW_RST; 69b628ac71f07d6 Amit Kucheria 2019-03-20 198 ret = regmap_update_bits(priv->tm_map, CNTL_ADDR, SW_RST, reg_cntl); 20d4fd84bf524ad Rajendra Nayak 2016-05-05 199 if (ret) 20d4fd84bf524ad Rajendra Nayak 2016-05-05 200 return ret; 20d4fd84bf524ad Rajendra Nayak 2016-05-05 201 69b628ac71f07d6 Amit Kucheria 2019-03-20 202 if (priv->num_sensors > 1) { 20d4fd84bf524ad Rajendra Nayak 2016-05-05 203 reg_cntl |= SLP_CLK_ENA | (MEASURE_PERIOD << 18); 20d4fd84bf524ad Rajendra Nayak 2016-05-05 204 reg_cntl &= ~SW_RST; 69b628ac71f07d6 Amit Kucheria 2019-03-20 205 ret = regmap_update_bits(priv->tm_map, CONFIG_ADDR, 20d4fd84bf524ad Rajendra Nayak 2016-05-05 206 CONFIG_MASK, CONFIG); 20d4fd84bf524ad Rajendra Nayak 2016-05-05 207 } else { 20d4fd84bf524ad Rajendra Nayak 2016-05-05 208 reg_cntl |= SLP_CLK_ENA_8660 | (MEASURE_PERIOD << 16); 20d4fd84bf524ad Rajendra Nayak 2016-05-05 209 reg_cntl &= ~CONFIG_MASK_8660; 20d4fd84bf524ad Rajendra Nayak 2016-05-05 210 reg_cntl |= CONFIG_8660 << CONFIG_SHIFT_8660; 20d4fd84bf524ad Rajendra Nayak 2016-05-05 211 } 20d4fd84bf524ad Rajendra Nayak 2016-05-05 212 69b628ac71f07d6 Amit Kucheria 2019-03-20 213 reg_cntl |= GENMASK(priv->num_sensors - 1, 0) << SENSOR0_SHIFT; 69b628ac71f07d6 Amit Kucheria 2019-03-20 214 ret = regmap_write(priv->tm_map, CNTL_ADDR, reg_cntl); 20d4fd84bf524ad Rajendra Nayak 2016-05-05 215 if (ret) 20d4fd84bf524ad Rajendra Nayak 2016-05-05 216 return ret; 20d4fd84bf524ad Rajendra Nayak 2016-05-05 217 20d4fd84bf524ad Rajendra Nayak 2016-05-05 218 reg_cntl |= EN; 69b628ac71f07d6 Amit Kucheria 2019-03-20 219 ret = regmap_write(priv->tm_map, CNTL_ADDR, reg_cntl); 20d4fd84bf524ad Rajendra Nayak 2016-05-05 220 if (ret) 20d4fd84bf524ad Rajendra Nayak 2016-05-05 221 return ret; 20d4fd84bf524ad Rajendra Nayak 2016-05-05 222 20d4fd84bf524ad Rajendra Nayak 2016-05-05 223 return 0; 20d4fd84bf524ad Rajendra Nayak 2016-05-05 224 } 20d4fd84bf524ad Rajendra Nayak 2016-05-05 225 69b628ac71f07d6 Amit Kucheria 2019-03-20 226 static int calibrate_8960(struct tsens_priv *priv) 20d4fd84bf524ad Rajendra Nayak 2016-05-05 227 { 20d4fd84bf524ad Rajendra Nayak 2016-05-05 228 int i; 20d4fd84bf524ad Rajendra Nayak 2016-05-05 229 char *data; 20d4fd84bf524ad Rajendra Nayak 2016-05-05 230 69b628ac71f07d6 Amit Kucheria 2019-03-20 231 ssize_t num_read = priv->num_sensors; 69b628ac71f07d6 Amit Kucheria 2019-03-20 232 struct tsens_sensor *s = priv->sensor; 20d4fd84bf524ad Rajendra Nayak 2016-05-05 233 69b628ac71f07d6 Amit Kucheria 2019-03-20 234 data = qfprom_read(priv->dev, "calib"); 20d4fd84bf524ad Rajendra Nayak 2016-05-05 235 if (IS_ERR(data)) 69b628ac71f07d6 Amit Kucheria 2019-03-20 236 data = qfprom_read(priv->dev, "calib_backup"); 20d4fd84bf524ad Rajendra Nayak 2016-05-05 237 if (IS_ERR(data)) 20d4fd84bf524ad Rajendra Nayak 2016-05-05 238 return PTR_ERR(data); 20d4fd84bf524ad Rajendra Nayak 2016-05-05 239 20d4fd84bf524ad Rajendra Nayak 2016-05-05 240 for (i = 0; i < num_read; i++, s++) 20d4fd84bf524ad Rajendra Nayak 2016-05-05 241 s->offset = data[i]; 20d4fd84bf524ad Rajendra Nayak 2016-05-05 242 6b8249abb093551 Srinivas Kandagatla 2019-08-23 243 kfree(data); 6b8249abb093551 Srinivas Kandagatla 2019-08-23 244 20d4fd84bf524ad Rajendra Nayak 2016-05-05 245 return 0; 20d4fd84bf524ad Rajendra Nayak 2016-05-05 246 } 20d4fd84bf524ad Rajendra Nayak 2016-05-05 247 20d4fd84bf524ad Rajendra Nayak 2016-05-05 248 /* Temperature on y axis and ADC-code on x-axis */ 20d4fd84bf524ad Rajendra Nayak 2016-05-05 249 static inline int code_to_mdegC(u32 adc_code, const struct tsens_sensor *s) 20d4fd84bf524ad Rajendra Nayak 2016-05-05 250 { 20d4fd84bf524ad Rajendra Nayak 2016-05-05 251 int slope, offset; 20d4fd84bf524ad Rajendra Nayak 2016-05-05 252 20d4fd84bf524ad Rajendra Nayak 2016-05-05 253 slope = thermal_zone_get_slope(s->tzd); 20d4fd84bf524ad Rajendra Nayak 2016-05-05 254 offset = CAL_MDEGC - slope * s->offset; 20d4fd84bf524ad Rajendra Nayak 2016-05-05 255 20d4fd84bf524ad Rajendra Nayak 2016-05-05 256 return adc_code * slope + offset; 20d4fd84bf524ad Rajendra Nayak 2016-05-05 257 } 20d4fd84bf524ad Rajendra Nayak 2016-05-05 258 e604bdd2a7e1087 Amit Kucheria 2020-03-12 259 static int get_temp_8960(const struct tsens_sensor *s, int *temp) 20d4fd84bf524ad Rajendra Nayak 2016-05-05 260 { 20d4fd84bf524ad Rajendra Nayak 2016-05-05 261 int ret; 20d4fd84bf524ad Rajendra Nayak 2016-05-05 262 u32 code, trdy; 8b71bce407b3f13 Amit Kucheria 2019-11-01 263 struct tsens_priv *priv = s->priv; 20d4fd84bf524ad Rajendra Nayak 2016-05-05 264 unsigned long timeout; 20d4fd84bf524ad Rajendra Nayak 2016-05-05 265 20d4fd84bf524ad Rajendra Nayak 2016-05-05 266 timeout = jiffies + usecs_to_jiffies(TIMEOUT_US); 20d4fd84bf524ad Rajendra Nayak 2016-05-05 267 do { 69b628ac71f07d6 Amit Kucheria 2019-03-20 268 ret = regmap_read(priv->tm_map, INT_STATUS_ADDR, &trdy); 20d4fd84bf524ad Rajendra Nayak 2016-05-05 269 if (ret) 20d4fd84bf524ad Rajendra Nayak 2016-05-05 270 return ret; 20d4fd84bf524ad Rajendra Nayak 2016-05-05 271 if (!(trdy & TRDY_MASK)) 20d4fd84bf524ad Rajendra Nayak 2016-05-05 272 continue; 69b628ac71f07d6 Amit Kucheria 2019-03-20 273 ret = regmap_read(priv->tm_map, s->status, &code); 20d4fd84bf524ad Rajendra Nayak 2016-05-05 274 if (ret) 20d4fd84bf524ad Rajendra Nayak 2016-05-05 275 return ret; 20d4fd84bf524ad Rajendra Nayak 2016-05-05 276 *temp = code_to_mdegC(code, s); 20d4fd84bf524ad Rajendra Nayak 2016-05-05 277 return 0; 20d4fd84bf524ad Rajendra Nayak 2016-05-05 278 } while (time_before(jiffies, timeout)); 20d4fd84bf524ad Rajendra Nayak 2016-05-05 279 20d4fd84bf524ad Rajendra Nayak 2016-05-05 280 return -ETIMEDOUT; 20d4fd84bf524ad Rajendra Nayak 2016-05-05 281 } 20d4fd84bf524ad Rajendra Nayak 2016-05-05 282 efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 283 static struct tsens_features tsens_8960_feat = { efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 @284 .ver_major = VER_0, efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 285 .crit_int = 0, efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 286 .adc = 1, efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 287 .srot_split = 0, efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 288 .max_sensors = 11, efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 289 }; efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 290 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
On 15/04/2021 20:52, Ansuel Smith wrote: >> >> Hi thermal-bot, >> >> Thank you for the patch! Yet something to improve: >> >> [auto build test ERROR on linus/master] >> [also build test ERROR on v5.12-rc7] >> [cannot apply to thermal/next next-20210415] >> [If your patch is applied to the wrong git tree, kindly drop us a note. >> And when submitting patch, we suggest to use '--base' as documented in >> https://git-scm.com/docs/git-format-patch] >> >> url: https://github.com/0day-ci/linux/commits/thermal-bot-for-Ansuel-Smith/thermal-drivers-tsens-Convert-msm8960-to-reg_field/20210415-200542 >> base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 7f75285ca572eaabc028cf78c6ab5473d0d160be >> config: arm-randconfig-r015-20210415 (attached as .config) >> compiler: arm-linux-gnueabi-gcc (GCC) 9.3.0 >> reproduce (this is a W=1 build): >> wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross >> chmod +x ~/bin/make.cross >> # https://github.com/0day-ci/linux/commit/efea0f0570b6b581bdb2fad978a35fd1a521385b >> git remote add linux-review https://github.com/0day-ci/linux >> git fetch --no-tags linux-review thermal-bot-for-Ansuel-Smith/thermal-drivers-tsens-Convert-msm8960-to-reg_field/20210415-200542 >> git checkout efea0f0570b6b581bdb2fad978a35fd1a521385b >> # save the attached .config to linux build tree >> COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross W=1 ARCH=arm >> >> If you fix the issue, kindly add following tag as appropriate >> Reported-by: kernel test robot <lkp@intel.com> >> >> All errors (new ones prefixed by >>): >> >> drivers/thermal/qcom/tsens-8960.c: In function 'init_8960': >>>> drivers/thermal/qcom/tsens-8960.c:193:29: error: 'S0_STATUS_ADDR' undeclared (first use in this function); did you mean 'INT_STATUS_ADDR'? >> 193 | priv->sensor[i].status = S0_STATUS_ADDR + 40; >> | ^~~~~~~~~~~~~~ >> | INT_STATUS_ADDR >> drivers/thermal/qcom/tsens-8960.c:193:29: note: each undeclared identifier is reported only once for each function it appears in >> drivers/thermal/qcom/tsens-8960.c: At top level: >>>> drivers/thermal/qcom/tsens-8960.c:284:15: error: 'VER_0' undeclared here (not in a function); did you mean 'VER_0_1'? >> 284 | .ver_major = VER_0, >> | ^~~~~ >> | VER_0_1 >> >> >> vim +193 drivers/thermal/qcom/tsens-8960.c [ ... ] > What happened here? This doesn't seem right. Yes, it is. It means the series is not git bisect safe. Please fix it. -- <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook | <http://twitter.com/#!/linaroorg> Twitter | <http://www.linaro.org/linaro-blog/> Blog
> > On 15/04/2021 20:52, Ansuel Smith wrote: > >> > >> Hi thermal-bot, > >> > >> Thank you for the patch! Yet something to improve: > >> > >> [auto build test ERROR on linus/master] > >> [also build test ERROR on v5.12-rc7] > >> [cannot apply to thermal/next next-20210415] > >> [If your patch is applied to the wrong git tree, kindly drop us a note. > >> And when submitting patch, we suggest to use '--base' as documented in > >> https://git-scm.com/docs/git-format-patch] > >> > >> url: https://github.com/0day-ci/linux/commits/thermal-bot-for-Ansuel-Smith/thermal-drivers-tsens-Convert-msm8960-to-reg_field/20210415-200542 > >> base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 7f75285ca572eaabc028cf78c6ab5473d0d160be > >> config: arm-randconfig-r015-20210415 (attached as .config) > >> compiler: arm-linux-gnueabi-gcc (GCC) 9.3.0 > >> reproduce (this is a W=1 build): > >> wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross > >> chmod +x ~/bin/make.cross > >> # https://github.com/0day-ci/linux/commit/efea0f0570b6b581bdb2fad978a35fd1a521385b > >> git remote add linux-review https://github.com/0day-ci/linux > >> git fetch --no-tags linux-review thermal-bot-for-Ansuel-Smith/thermal-drivers-tsens-Convert-msm8960-to-reg_field/20210415-200542 > >> git checkout efea0f0570b6b581bdb2fad978a35fd1a521385b > >> # save the attached .config to linux build tree > >> COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross W=1 ARCH=arm > >> > >> If you fix the issue, kindly add following tag as appropriate > >> Reported-by: kernel test robot <lkp@intel.com> > >> > >> All errors (new ones prefixed by >>): > >> > >> drivers/thermal/qcom/tsens-8960.c: In function 'init_8960': > >>>> drivers/thermal/qcom/tsens-8960.c:193:29: error: 'S0_STATUS_ADDR' undeclared (first use in this function); did you mean 'INT_STATUS_ADDR'? > >> 193 | priv->sensor[i].status = S0_STATUS_ADDR + 40; > >> | ^~~~~~~~~~~~~~ > >> | INT_STATUS_ADDR > >> drivers/thermal/qcom/tsens-8960.c:193:29: note: each undeclared identifier is reported only once for each function it appears in > >> drivers/thermal/qcom/tsens-8960.c: At top level: > >>>> drivers/thermal/qcom/tsens-8960.c:284:15: error: 'VER_0' undeclared here (not in a function); did you mean 'VER_0_1'? > >> 284 | .ver_major = VER_0, > >> | ^~~~~ > >> | VER_0_1 > >> > >> > >> vim +193 drivers/thermal/qcom/tsens-8960.c > > [ ... ] > > > What happened here? This doesn't seem right. > > Yes, it is. It means the series is not git bisect safe. > > Please fix it. > > I'm a bit confused. Should I send just a patch to fix this or I need to send the series again rebased with the new changes? > > -- > <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs > > Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook | > <http://twitter.com/#!/linaroorg> Twitter | > <http://www.linaro.org/linaro-blog/> Blog
On 19/04/2021 14:08, Ansuel Smith wrote: [ ... ] >>>> vim +193 drivers/thermal/qcom/tsens-8960.c >> >> [ ... ] >> >>> What happened here? This doesn't seem right. >> >> Yes, it is. It means the series is not git bisect safe. >> >> Please fix it. >> >> > > I'm a bit confused. Should I send just a patch to fix this or I > need to send the series again rebased with the new changes? The latter, I've dropped your series from the thermal/next branch -- <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook | <http://twitter.com/#!/linaroorg> Twitter | <http://www.linaro.org/linaro-blog/> Blog
> > On 19/04/2021 14:08, Ansuel Smith wrote: > > [ ... ] > > >>>> vim +193 drivers/thermal/qcom/tsens-8960.c > >> > >> [ ... ] > >> > >>> What happened here? This doesn't seem right. > >> > >> Yes, it is. It means the series is not git bisect safe. > >> > >> Please fix it. > >> > >> > > > > I'm a bit confused. Should I send just a patch to fix this or I > > need to send the series again rebased with the new changes? > > The latter, I've dropped your series from the thermal/next branch > Ok I will resend the series. I notice it has been applied to linux-next, will that be a problem? > > -- > <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs > > Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook | > <http://twitter.com/#!/linaroorg> Twitter | > <http://www.linaro.org/linaro-blog/> Blog
On 20/04/2021 13:04, Ansuel Smith wrote: >> >> On 19/04/2021 14:08, Ansuel Smith wrote: >> >> [ ... ] >> >>>>>> vim +193 drivers/thermal/qcom/tsens-8960.c >>>> >>>> [ ... ] >>>> >>>>> What happened here? This doesn't seem right. >>>> >>>> Yes, it is. It means the series is not git bisect safe. >>>> >>>> Please fix it. >>>> >>>> >>> >>> I'm a bit confused. Should I send just a patch to fix this or I >>> need to send the series again rebased with the new changes? >> >> The latter, I've dropped your series from the thermal/next branch >> > > Ok I will resend the series. I notice it has been applied to linux-next, > will that be a problem? No, it is fine. linux-next uses thermal/linux-next and it is allowed to rebase the branch. I've just updated it with your v14 series dropped. >> -- >> <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs >> >> Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook | >> <http://twitter.com/#!/linaroorg> Twitter | >> <http://www.linaro.org/linaro-blog/> Blog -- <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook | <http://twitter.com/#!/linaroorg> Twitter | <http://www.linaro.org/linaro-blog/> Blog
> > On 20/04/2021 13:04, Ansuel Smith wrote: > >> > >> On 19/04/2021 14:08, Ansuel Smith wrote: > >> > >> [ ... ] > >> > >>>>>> vim +193 drivers/thermal/qcom/tsens-8960.c > >>>> > >>>> [ ... ] > >>>> > >>>>> What happened here? This doesn't seem right. > >>>> > >>>> Yes, it is. It means the series is not git bisect safe. > >>>> > >>>> Please fix it. > >>>> > >>>> > >>> > >>> I'm a bit confused. Should I send just a patch to fix this or I > >>> need to send the series again rebased with the new changes? > >> > >> The latter, I've dropped your series from the thermal/next branch > >> > > > > Ok I will resend the series. I notice it has been applied to linux-next, > > will that be a problem? > > No, it is fine. linux-next uses thermal/linux-next and it is allowed to > rebase the branch. > > I've just updated it with your v14 series dropped. > I have just sent v15 series hoping it's more bisect friendly. Hope it's good now and sorry for the mess. > > >> -- > >> <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs > >> > >> Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook | > >> <http://twitter.com/#!/linaroorg> Twitter | > >> <http://www.linaro.org/linaro-blog/> Blog > > > -- > <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs > > Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook | > <http://twitter.com/#!/linaroorg> Twitter | > <http://www.linaro.org/linaro-blog/> Blog
diff --git a/drivers/thermal/qcom/tsens-8960.c b/drivers/thermal/qcom/tsens-8960.c index 2a28a5a..3f4fc1f 100644 --- a/drivers/thermal/qcom/tsens-8960.c +++ b/drivers/thermal/qcom/tsens-8960.c @@ -51,11 +51,22 @@ #define MIN_LIMIT_TH 0x0 #define MAX_LIMIT_TH 0xff -#define S0_STATUS_ADDR 0x3628 #define INT_STATUS_ADDR 0x363c #define TRDY_MASK BIT(7) #define TIMEOUT_US 100 +#define S0_STATUS_OFF 0x3628 +#define S1_STATUS_OFF 0x362c +#define S2_STATUS_OFF 0x3630 +#define S3_STATUS_OFF 0x3634 +#define S4_STATUS_OFF 0x3638 +#define S5_STATUS_OFF 0x3664 /* Sensors 5-10 found on apq8064/msm8960 */ +#define S6_STATUS_OFF 0x3668 +#define S7_STATUS_OFF 0x366c +#define S8_STATUS_OFF 0x3670 +#define S9_STATUS_OFF 0x3674 +#define S10_STATUS_OFF 0x3678 + static int suspend_8960(struct tsens_priv *priv) { int ret; @@ -269,6 +280,71 @@ static int get_temp_8960(const struct tsens_sensor *s, int *temp) return -ETIMEDOUT; } +static struct tsens_features tsens_8960_feat = { + .ver_major = VER_0, + .crit_int = 0, + .adc = 1, + .srot_split = 0, + .max_sensors = 11, +}; + +static const struct reg_field tsens_8960_regfields[MAX_REGFIELDS] = { + /* ----- SROT ------ */ + /* No VERSION information */ + + /* CNTL */ + [TSENS_EN] = REG_FIELD(CNTL_ADDR, 0, 0), + [TSENS_SW_RST] = REG_FIELD(CNTL_ADDR, 1, 1), + /* 8960 has 5 sensors, 8660 has 11, we only handle 5 */ + [SENSOR_EN] = REG_FIELD(CNTL_ADDR, 3, 7), + + /* ----- TM ------ */ + /* INTERRUPT ENABLE */ + /* NO INTERRUPT ENABLE */ + + /* Single UPPER/LOWER TEMPERATURE THRESHOLD for all sensors */ + [LOW_THRESH_0] = REG_FIELD(THRESHOLD_ADDR, 0, 7), + [UP_THRESH_0] = REG_FIELD(THRESHOLD_ADDR, 8, 15), + /* MIN_THRESH_0 and MAX_THRESH_0 are not present in the regfield + * Recycle CRIT_THRESH_0 and 1 to set the required regs to hardcoded temp + * MIN_THRESH_0 -> CRIT_THRESH_1 + * MAX_THRESH_0 -> CRIT_THRESH_0 + */ + [CRIT_THRESH_1] = REG_FIELD(THRESHOLD_ADDR, 16, 23), + [CRIT_THRESH_0] = REG_FIELD(THRESHOLD_ADDR, 24, 31), + + /* UPPER/LOWER INTERRUPT [CLEAR/STATUS] */ + /* 1 == clear, 0 == normal operation */ + [LOW_INT_CLEAR_0] = REG_FIELD(CNTL_ADDR, 9, 9), + [UP_INT_CLEAR_0] = REG_FIELD(CNTL_ADDR, 10, 10), + + /* NO CRITICAL INTERRUPT SUPPORT on 8960 */ + + /* Sn_STATUS */ + [LAST_TEMP_0] = REG_FIELD(S0_STATUS_OFF, 0, 7), + [LAST_TEMP_1] = REG_FIELD(S1_STATUS_OFF, 0, 7), + [LAST_TEMP_2] = REG_FIELD(S2_STATUS_OFF, 0, 7), + [LAST_TEMP_3] = REG_FIELD(S3_STATUS_OFF, 0, 7), + [LAST_TEMP_4] = REG_FIELD(S4_STATUS_OFF, 0, 7), + [LAST_TEMP_5] = REG_FIELD(S5_STATUS_OFF, 0, 7), + [LAST_TEMP_6] = REG_FIELD(S6_STATUS_OFF, 0, 7), + [LAST_TEMP_7] = REG_FIELD(S7_STATUS_OFF, 0, 7), + [LAST_TEMP_8] = REG_FIELD(S8_STATUS_OFF, 0, 7), + [LAST_TEMP_9] = REG_FIELD(S9_STATUS_OFF, 0, 7), + [LAST_TEMP_10] = REG_FIELD(S10_STATUS_OFF, 0, 7), + + /* No VALID field on 8960 */ + /* TSENS_INT_STATUS bits: 1 == threshold violated */ + [MIN_STATUS_0] = REG_FIELD(INT_STATUS_ADDR, 0, 0), + [LOWER_STATUS_0] = REG_FIELD(INT_STATUS_ADDR, 1, 1), + [UPPER_STATUS_0] = REG_FIELD(INT_STATUS_ADDR, 2, 2), + /* No CRITICAL field on 8960 */ + [MAX_STATUS_0] = REG_FIELD(INT_STATUS_ADDR, 3, 3), + + /* TRDY: 1=ready, 0=in progress */ + [TRDY] = REG_FIELD(INT_STATUS_ADDR, 7, 7), +}; + static const struct tsens_ops ops_8960 = { .init = init_8960, .calibrate = calibrate_8960, @@ -282,4 +358,6 @@ static const struct tsens_ops ops_8960 = { struct tsens_plat_data data_8960 = { .num_sensors = 11, .ops = &ops_8960, + .feat = &tsens_8960_feat, + .fields = tsens_8960_regfields, };