mbox series

[v3,0/3] Introduce the for_each_set_nbits macro

Message ID cover.1615038553.git.syednwaris@gmail.com
Headers show
Series Introduce the for_each_set_nbits macro | expand

Message

Syed Nayyar Waris March 6, 2021, 2:01 p.m. UTC
Hello Bartosz,

Since this patchset primarily affects GPIO drivers, would you like
to pick it up through your GPIO tree?

This patchset introduces a new generic version of for_each_set_nbits.
The previous version of for_each_set_clump8 used a fixed size 8-bit
clump, but the new generic version can work with clump of any size but
less than or equal to BITS_PER_LONG. The patchset utilizes the new macro
in several GPIO drivers.

The earlier 8-bit for_each_set_clump8 facilitated a
for-loop syntax that iterates over a memory region entire groups of set
bits at a time.

For example, suppose you would like to iterate over a 32-bit integer 8
bits at a time, skipping over 8-bit groups with no set bit, where
XXXXXXXX represents the current 8-bit group:

    Example:        10111110 00000000 11111111 00110011
    First loop:     10111110 00000000 11111111 XXXXXXXX
    Second loop:    10111110 00000000 XXXXXXXX 00110011
    Third loop:     XXXXXXXX 00000000 11111111 00110011

Each iteration of the loop returns the next 8-bit group that has at
least one set bit.

But with the new for_each_set_nbits the clump size can be different from 8 bits.
Moreover, the clump can be split at word boundary in situations where word
size is not multiple of clump size. Following are examples showing the working
of new macro for clump sizes of 24 bits and 6 bits.

Example 1:
clump size: 24 bits, Number of clumps (or ports): 10
bitmap stores the bit information from where successive clumps are retrieved.

     /* bitmap memory region */
        0x00aa0000ff000000;  /* Most significant bits */
        0xaaaaaa0000ff0000;
        0x000000aa000000aa;
        0xbbbbabcdeffedcba;  /* Least significant bits */

Different iterations of for_each_set_nbits:-
'offset' is the bit position and 'clump' is the 24 bit clump from the
above bitmap.
Iteration first:        offset: 0 clump: 0xfedcba
Iteration second:       offset: 24 clump: 0xabcdef
Iteration third:        offset: 48 clump: 0xaabbbb
Iteration fourth:       offset: 96 clump: 0xaa
Iteration fifth:        offset: 144 clump: 0xff
Iteration sixth:        offset: 168 clump: 0xaaaaaa
Iteration seventh:      offset: 216 clump: 0xff
Loop breaks because in the end the remaining bits (0x00aa) size was less
than clump size of 24 bits.

In above example it can be seen that in iteration third, the 24 bit clump
that was retrieved was split between bitmap[0] and bitmap[1]. This example
also shows that 24 bit zeroes if present in between, were skipped (preserving
the previous for_each_set_macro8 behaviour).

Example 2:
clump size = 6 bits, Number of clumps (or ports) = 3.

     /* bitmap memory region */
        0x00aa0000ff000000;  /* Most significant bits */
        0xaaaaaa0000ff0000;
        0x0f00000000000000;
        0x0000000000000ac0;  /* Least significant bits */

Different iterations of for_each_set_nbits:
'offset' is the bit position and 'clump' is the 6 bit clump from the
above bitmap.
Iteration first:        offset: 6 clump: 0x2b
Loop breaks because 6 * 3 = 18 bits traversed in bitmap.
Here 6 * 3 is clump size * no. of clumps.

Changes in v3:
 - [Patch 1/3]: Rename for_each_set_clump to for_each_set_nbits.
 - [Patch 1/3]: Shift function definitions outside 'ifdef CONFIG_DEBUG_FS'
   macro guard to resolve build (linking) error in xilinx Patch[3/3].
 - [Patch 2/3]: Rename for_each_set_clump to for_each_set_nbits.

Changes in v2:
 - [Patch 1/3]: Shift the macros and related functions to gpiolib inside
   gpio/. Reduce the visibilty of 'for_each_set_clump' to gpio.
 - [Patch 1/3]: Remove __builtin_unreachable and simply use return
   statement.
 - Remove tests from lib/test_bitmap.c as 'for_each_set_clump' is
   now localised inside gpio/ only.

Syed Nayyar Waris (3):
  gpiolib: Introduce the for_each_set_nbits macro
  gpio: thunderx: Utilize for_each_set_nbits macro
  gpio: xilinx: Utilize generic bitmap_get_value and _set_value

 drivers/gpio/gpio-thunderx.c | 13 ++++--
 drivers/gpio/gpio-xilinx.c   | 63 ++++++++++++-------------
 drivers/gpio/gpiolib.c       | 90 ++++++++++++++++++++++++++++++++++++
 drivers/gpio/gpiolib.h       | 28 +++++++++++
 4 files changed, 158 insertions(+), 36 deletions(-)


base-commit: e71ba9452f0b5b2e8dc8aa5445198cd9214a6a62

Comments

Michal Simek March 8, 2021, 7:13 a.m. UTC | #1
On 3/6/21 3:06 PM, Syed Nayyar Waris wrote:
> This patch reimplements the xgpio_set_multiple() function in
> drivers/gpio/gpio-xilinx.c to use the new generic functions:
> bitmap_get_value() and bitmap_set_value(). The code is now simpler
> to read and understand. Moreover, instead of looping for each bit
> in xgpio_set_multiple() function, now we can check each channel at
> a time and save cycles.
> 
> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> Cc: Michal Simek <michal.simek@xilinx.com>
> Signed-off-by: Syed Nayyar Waris <syednwaris@gmail.com>
> Acked-by: William Breathitt Gray <vilhelm.gray@gmail.com>
> ---
>  drivers/gpio/gpio-xilinx.c | 63 +++++++++++++++++++-------------------
>  1 file changed, 32 insertions(+), 31 deletions(-)
> 
> diff --git a/drivers/gpio/gpio-xilinx.c b/drivers/gpio/gpio-xilinx.c
> index be539381fd82..8445e69cf37b 100644
> --- a/drivers/gpio/gpio-xilinx.c
> +++ b/drivers/gpio/gpio-xilinx.c
> @@ -15,6 +15,7 @@
>  #include <linux/of_device.h>
>  #include <linux/of_platform.h>
>  #include <linux/slab.h>
> +#include "gpiolib.h"
>  
>  /* Register Offset Definitions */
>  #define XGPIO_DATA_OFFSET   (0x0)	/* Data register  */
> @@ -141,37 +142,37 @@ static void xgpio_set_multiple(struct gpio_chip *gc, unsigned long *mask,
>  {
>  	unsigned long flags;
>  	struct xgpio_instance *chip = gpiochip_get_data(gc);
> -	int index = xgpio_index(chip, 0);
> -	int offset, i;
> -
> -	spin_lock_irqsave(&chip->gpio_lock[index], flags);
> -
> -	/* Write to GPIO signals */
> -	for (i = 0; i < gc->ngpio; i++) {
> -		if (*mask == 0)
> -			break;
> -		/* Once finished with an index write it out to the register */
> -		if (index !=  xgpio_index(chip, i)) {
> -			xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET +
> -				       index * XGPIO_CHANNEL_OFFSET,
> -				       chip->gpio_state[index]);
> -			spin_unlock_irqrestore(&chip->gpio_lock[index], flags);
> -			index =  xgpio_index(chip, i);
> -			spin_lock_irqsave(&chip->gpio_lock[index], flags);
> -		}
> -		if (__test_and_clear_bit(i, mask)) {
> -			offset =  xgpio_offset(chip, i);
> -			if (test_bit(i, bits))
> -				chip->gpio_state[index] |= BIT(offset);
> -			else
> -				chip->gpio_state[index] &= ~BIT(offset);
> -		}
> -	}
> -
> -	xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET +
> -		       index * XGPIO_CHANNEL_OFFSET, chip->gpio_state[index]);
> -
> -	spin_unlock_irqrestore(&chip->gpio_lock[index], flags);
> +	u32 *const state = chip->gpio_state;
> +	unsigned int *const width = chip->gpio_width;
> +
> +	DECLARE_BITMAP(old, 64);
> +	DECLARE_BITMAP(new, 64);
> +	DECLARE_BITMAP(changed, 64);
> +
> +	spin_lock_irqsave(&chip->gpio_lock[0], flags);
> +	spin_lock(&chip->gpio_lock[1]);
> +
> +	bitmap_set_value(old, 64, state[0], width[0], 0);
> +	bitmap_set_value(old, 64, state[1], width[1], width[0]);
> +	bitmap_replace(new, old, bits, mask, gc->ngpio);
> +
> +	bitmap_set_value(old, 64, state[0], 32, 0);
> +	bitmap_set_value(old, 64, state[1], 32, 32);
> +	state[0] = bitmap_get_value(new, 0, width[0]);
> +	state[1] = bitmap_get_value(new, width[0], width[1]);
> +	bitmap_set_value(new, 64, state[0], 32, 0);
> +	bitmap_set_value(new, 64, state[1], 32, 32);
> +	bitmap_xor(changed, old, new, 64);
> +
> +	if (((u32 *)changed)[0])
> +		xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET,
> +				state[0]);
> +	if (((u32 *)changed)[1])
> +		xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET +
> +				XGPIO_CHANNEL_OFFSET, state[1]);
> +
> +	spin_unlock(&chip->gpio_lock[1]);
> +	spin_unlock_irqrestore(&chip->gpio_lock[0], flags);
>  }
>  
>  /**
> 

Srinivas N: Can you please test this code?

Thanks,
Michal
Bartosz Golaszewski March 26, 2021, 5:27 p.m. UTC | #2
On Mon, Mar 8, 2021 at 8:13 AM Michal Simek <michal.simek@xilinx.com> wrote:
>

>

>

> On 3/6/21 3:06 PM, Syed Nayyar Waris wrote:

> > This patch reimplements the xgpio_set_multiple() function in

> > drivers/gpio/gpio-xilinx.c to use the new generic functions:

> > bitmap_get_value() and bitmap_set_value(). The code is now simpler

> > to read and understand. Moreover, instead of looping for each bit

> > in xgpio_set_multiple() function, now we can check each channel at

> > a time and save cycles.

> >

> > Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com>

> > Cc: Michal Simek <michal.simek@xilinx.com>

> > Signed-off-by: Syed Nayyar Waris <syednwaris@gmail.com>

> > Acked-by: William Breathitt Gray <vilhelm.gray@gmail.com>

> > ---

> >  drivers/gpio/gpio-xilinx.c | 63 +++++++++++++++++++-------------------

> >  1 file changed, 32 insertions(+), 31 deletions(-)

> >

> > diff --git a/drivers/gpio/gpio-xilinx.c b/drivers/gpio/gpio-xilinx.c

> > index be539381fd82..8445e69cf37b 100644

> > --- a/drivers/gpio/gpio-xilinx.c

> > +++ b/drivers/gpio/gpio-xilinx.c

> > @@ -15,6 +15,7 @@

> >  #include <linux/of_device.h>

> >  #include <linux/of_platform.h>

> >  #include <linux/slab.h>

> > +#include "gpiolib.h"

> >

> >  /* Register Offset Definitions */

> >  #define XGPIO_DATA_OFFSET   (0x0)    /* Data register  */

> > @@ -141,37 +142,37 @@ static void xgpio_set_multiple(struct gpio_chip *gc, unsigned long *mask,

> >  {

> >       unsigned long flags;

> >       struct xgpio_instance *chip = gpiochip_get_data(gc);

> > -     int index = xgpio_index(chip, 0);

> > -     int offset, i;

> > -

> > -     spin_lock_irqsave(&chip->gpio_lock[index], flags);

> > -

> > -     /* Write to GPIO signals */

> > -     for (i = 0; i < gc->ngpio; i++) {

> > -             if (*mask == 0)

> > -                     break;

> > -             /* Once finished with an index write it out to the register */

> > -             if (index !=  xgpio_index(chip, i)) {

> > -                     xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET +

> > -                                    index * XGPIO_CHANNEL_OFFSET,

> > -                                    chip->gpio_state[index]);

> > -                     spin_unlock_irqrestore(&chip->gpio_lock[index], flags);

> > -                     index =  xgpio_index(chip, i);

> > -                     spin_lock_irqsave(&chip->gpio_lock[index], flags);

> > -             }

> > -             if (__test_and_clear_bit(i, mask)) {

> > -                     offset =  xgpio_offset(chip, i);

> > -                     if (test_bit(i, bits))

> > -                             chip->gpio_state[index] |= BIT(offset);

> > -                     else

> > -                             chip->gpio_state[index] &= ~BIT(offset);

> > -             }

> > -     }

> > -

> > -     xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET +

> > -                    index * XGPIO_CHANNEL_OFFSET, chip->gpio_state[index]);

> > -

> > -     spin_unlock_irqrestore(&chip->gpio_lock[index], flags);

> > +     u32 *const state = chip->gpio_state;

> > +     unsigned int *const width = chip->gpio_width;

> > +

> > +     DECLARE_BITMAP(old, 64);

> > +     DECLARE_BITMAP(new, 64);

> > +     DECLARE_BITMAP(changed, 64);

> > +

> > +     spin_lock_irqsave(&chip->gpio_lock[0], flags);

> > +     spin_lock(&chip->gpio_lock[1]);

> > +

> > +     bitmap_set_value(old, 64, state[0], width[0], 0);

> > +     bitmap_set_value(old, 64, state[1], width[1], width[0]);

> > +     bitmap_replace(new, old, bits, mask, gc->ngpio);

> > +

> > +     bitmap_set_value(old, 64, state[0], 32, 0);

> > +     bitmap_set_value(old, 64, state[1], 32, 32);

> > +     state[0] = bitmap_get_value(new, 0, width[0]);

> > +     state[1] = bitmap_get_value(new, width[0], width[1]);

> > +     bitmap_set_value(new, 64, state[0], 32, 0);

> > +     bitmap_set_value(new, 64, state[1], 32, 32);

> > +     bitmap_xor(changed, old, new, 64);

> > +

> > +     if (((u32 *)changed)[0])

> > +             xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET,

> > +                             state[0]);

> > +     if (((u32 *)changed)[1])

> > +             xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET +

> > +                             XGPIO_CHANNEL_OFFSET, state[1]);

> > +

> > +     spin_unlock(&chip->gpio_lock[1]);

> > +     spin_unlock_irqrestore(&chip->gpio_lock[0], flags);

> >  }

> >

> >  /**

> >

>

> Srinivas N: Can you please test this code?

>

> Thanks,

> Michal


Hey, any chance of getting that Tested-by?

Bart
Andy Shevchenko March 26, 2021, 5:57 p.m. UTC | #3
On Sat, Mar 6, 2021 at 4:08 PM Syed Nayyar Waris <syednwaris@gmail.com> wrote:
>

> This patch reimplements the xgpio_set_multiple() function in

> drivers/gpio/gpio-xilinx.c to use the new generic functions:

> bitmap_get_value() and bitmap_set_value(). The code is now simpler

> to read and understand. Moreover, instead of looping for each bit

> in xgpio_set_multiple() function, now we can check each channel at

> a time and save cycles.


...

> +       u32 *const state = chip->gpio_state;

> +       unsigned int *const width = chip->gpio_width;


> +


Extra blank line.

> +       DECLARE_BITMAP(old, 64);

> +       DECLARE_BITMAP(new, 64);

> +       DECLARE_BITMAP(changed, 64);


> +       spin_lock_irqsave(&chip->gpio_lock[0], flags);

> +       spin_lock(&chip->gpio_lock[1]);


I understand why this is done at the top of the function in the original code.
I do not understand why you put some operations under spin lock.

Have you checked what each of these spin locks protects?
Please check and try to lock as minimum as possible.

> +       bitmap_set_value(old, 64, state[0], width[0], 0);

> +       bitmap_set_value(old, 64, state[1], width[1], width[0]);

> +       bitmap_replace(new, old, bits, mask, gc->ngpio);

> +

> +       bitmap_set_value(old, 64, state[0], 32, 0);

> +       bitmap_set_value(old, 64, state[1], 32, 32);

> +       state[0] = bitmap_get_value(new, 0, width[0]);

> +       state[1] = bitmap_get_value(new, width[0], width[1]);

> +       bitmap_set_value(new, 64, state[0], 32, 0);

> +       bitmap_set_value(new, 64, state[1], 32, 32);

> +       bitmap_xor(changed, old, new, 64);


Original code and this is cryptic. Can you add a few comments
explaining what is going on here?

> +       spin_unlock(&chip->gpio_lock[1]);

> +       spin_unlock_irqrestore(&chip->gpio_lock[0], flags);


-- 
With Best Regards,
Andy Shevchenko
Andy Shevchenko March 26, 2021, 6:02 p.m. UTC | #4
On Sat, Mar 6, 2021 at 4:08 PM Syed Nayyar Waris <syednwaris@gmail.com> wrote:

> +       bitmap_set_value(old, 64, state[0], 32, 0);

> +       bitmap_set_value(old, 64, state[1], 32, 32);


Isn't it effectively bitnap_from_arr32() ?

> +       bitmap_set_value(new, 64, state[0], 32, 0);

> +       bitmap_set_value(new, 64, state[1], 32, 32);


Ditto.

-- 
With Best Regards,
Andy Shevchenko
Syed Nayyar Waris March 26, 2021, 10:12 p.m. UTC | #5
On Fri, Mar 26, 2021 at 11:32 PM Andy Shevchenko
<andy.shevchenko@gmail.com> wrote:
>

> On Sat, Mar 6, 2021 at 4:08 PM Syed Nayyar Waris <syednwaris@gmail.com> wrote:

>

> > +       bitmap_set_value(old, 64, state[0], 32, 0);

> > +       bitmap_set_value(old, 64, state[1], 32, 32);

>

> Isn't it effectively bitnap_from_arr32() ?

>

> > +       bitmap_set_value(new, 64, state[0], 32, 0);

> > +       bitmap_set_value(new, 64, state[1], 32, 32);

>

> Ditto.

>

> --

> With Best Regards,

> Andy Shevchenko


Hi Andy,

With bitmap_set_value() we are also specifying the offset (or start)
position too. so that the remainder of the array remains unaffected. I
think it would not be feasible to use bitmap_from/to_arr32()  here.

Regards
Syed Nayyar Waris
William Breathitt Gray March 27, 2021, 12:02 p.m. UTC | #6
On Sat, Mar 27, 2021 at 09:29:26AM +0200, Andy Shevchenko wrote:
> On Saturday, March 27, 2021, Syed Nayyar Waris <syednwaris@gmail.com> wrote:

> 

> > On Fri, Mar 26, 2021 at 11:32 PM Andy Shevchenko

> > <andy.shevchenko@gmail.com> wrote:

> > >

> > > On Sat, Mar 6, 2021 at 4:08 PM Syed Nayyar Waris <syednwaris@gmail.com>

> > wrote:

> > >

> > > > +       bitmap_set_value(old, 64, state[0], 32, 0);

> > > > +       bitmap_set_value(old, 64, state[1], 32, 32);

> > >

> > > Isn't it effectively bitnap_from_arr32() ?

> > >

> > > > +       bitmap_set_value(new, 64, state[0], 32, 0);

> > > > +       bitmap_set_value(new, 64, state[1], 32, 32);

> > >

> > > Ditto.

> > >

> > > --

> > > With Best Regards,

> > > Andy Shevchenko

> >

> > Hi Andy,

> >

> > With bitmap_set_value() we are also specifying the offset (or start)

> > position too. so that the remainder of the array remains unaffected. I

> > think it would not be feasible to use bitmap_from/to_arr32()  here.

> 

> 

> You have hard coded start and nbits parameters to 32. How is it not the

> same?


Would these four lines become something like this:

	bitmap_from_arr32(old, state, 64);
	...
	bitmap_from_arr32(new, state, 64);

Sincerely,

William Breathitt Gray
Andy Shevchenko March 27, 2021, 4:35 p.m. UTC | #7
On Sat, Mar 27, 2021 at 2:02 PM William Breathitt Gray
<vilhelm.gray@gmail.com> wrote:
> On Sat, Mar 27, 2021 at 09:29:26AM +0200, Andy Shevchenko wrote:

> > On Saturday, March 27, 2021, Syed Nayyar Waris <syednwaris@gmail.com> wrote:

> > > On Fri, Mar 26, 2021 at 11:32 PM Andy Shevchenko

> > > <andy.shevchenko@gmail.com> wrote:

> > > > On Sat, Mar 6, 2021 at 4:08 PM Syed Nayyar Waris <syednwaris@gmail.com>

> > > wrote:

> > > >

> > > > > +       bitmap_set_value(old, 64, state[0], 32, 0);

> > > > > +       bitmap_set_value(old, 64, state[1], 32, 32);

> > > >

> > > > Isn't it effectively bitnap_from_arr32() ?

> > > >

> > > > > +       bitmap_set_value(new, 64, state[0], 32, 0);

> > > > > +       bitmap_set_value(new, 64, state[1], 32, 32);

> > > >

> > > > Ditto.


> > > With bitmap_set_value() we are also specifying the offset (or start)

> > > position too. so that the remainder of the array remains unaffected. I

> > > think it would not be feasible to use bitmap_from/to_arr32()  here.

> >

> >

> > You have hard coded start and nbits parameters to 32. How is it not the

> > same?

>

> Would these four lines become something like this:

>

>         bitmap_from_arr32(old, state, 64);

>         ...

>         bitmap_from_arr32(new, state, 64);


This is my understanding, but I might miss something. I mean driver
specifics that make my proposal incorrect.

-- 
With Best Regards,
Andy Shevchenko
Syed Nayyar Waris April 1, 2021, 11:15 a.m. UTC | #8
On Wed, Mar 31, 2021 at 8:56 PM Srinivas Neeli <sneeli@xilinx.com> wrote:
>
> Hi,
>
> > -----Original Message-----
> > From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> > Sent: Friday, March 26, 2021 10:58 PM
> > To: Michal Simek <michals@xilinx.com>
> > Cc: Syed Nayyar Waris <syednwaris@gmail.com>; Srinivas Neeli
> > <sneeli@xilinx.com>; Andy Shevchenko
> > <andriy.shevchenko@linux.intel.com>; William Breathitt Gray
> > <vilhelm.gray@gmail.com>; Arnd Bergmann <arnd@arndb.de>; Robert
> > Richter <rrichter@marvell.com>; Linus Walleij <linus.walleij@linaro.org>;
> > Masahiro Yamada <yamada.masahiro@socionext.com>; Andrew Morton
> > <akpm@linux-foundation.org>; Zhang Rui <rui.zhang@intel.com>; Daniel
> > Lezcano <daniel.lezcano@linaro.org>; Amit Kucheria
> > <amit.kucheria@verdurent.com>; Linux-Arch <linux-arch@vger.kernel.org>;
> > linux-gpio <linux-gpio@vger.kernel.org>; LKML <linux-
> > kernel@vger.kernel.org>; arm-soc <linux-arm-kernel@lists.infradead.org>;
> > linux-pm <linux-pm@vger.kernel.org>; Srinivas Goud <sgoud@xilinx.com>
> > Subject: Re: [PATCH v3 3/3] gpio: xilinx: Utilize generic bitmap_get_value and
> > _set_value
> >
> > On Mon, Mar 8, 2021 at 8:13 AM Michal Simek <michal.simek@xilinx.com>
> > wrote:
> > >
> > >
> > >
> > > On 3/6/21 3:06 PM, Syed Nayyar Waris wrote:
> > > > This patch reimplements the xgpio_set_multiple() function in
> > > > drivers/gpio/gpio-xilinx.c to use the new generic functions:
> > > > bitmap_get_value() and bitmap_set_value(). The code is now simpler
> > > > to read and understand. Moreover, instead of looping for each bit in
> > > > xgpio_set_multiple() function, now we can check each channel at a
> > > > time and save cycles.
> > > >
> > > > Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> > > > Cc: Michal Simek <michal.simek@xilinx.com>
> > > > Signed-off-by: Syed Nayyar Waris <syednwaris@gmail.com>
> > > > Acked-by: William Breathitt Gray <vilhelm.gray@gmail.com>
> > > > ---
> > > >  drivers/gpio/gpio-xilinx.c | 63
> > > > +++++++++++++++++++-------------------
> > > >  1 file changed, 32 insertions(+), 31 deletions(-)
> > > >
> > > > diff --git a/drivers/gpio/gpio-xilinx.c b/drivers/gpio/gpio-xilinx.c
> > > > index be539381fd82..8445e69cf37b 100644
> > > > --- a/drivers/gpio/gpio-xilinx.c
> > > > +++ b/drivers/gpio/gpio-xilinx.c
> > > > @@ -15,6 +15,7 @@
> > > >  #include <linux/of_device.h>
> > > >  #include <linux/of_platform.h>
> > > >  #include <linux/slab.h>
> > > > +#include "gpiolib.h"
> > > >
> > > >  /* Register Offset Definitions */
> > > >  #define XGPIO_DATA_OFFSET   (0x0)    /* Data register  */
> > > > @@ -141,37 +142,37 @@ static void xgpio_set_multiple(struct
> > > > gpio_chip *gc, unsigned long *mask,  {
> > > >       unsigned long flags;
> > > >       struct xgpio_instance *chip = gpiochip_get_data(gc);
> > > > -     int index = xgpio_index(chip, 0);
> > > > -     int offset, i;
> > > > -
> > > > -     spin_lock_irqsave(&chip->gpio_lock[index], flags);
> > > > -
> > > > -     /* Write to GPIO signals */
> > > > -     for (i = 0; i < gc->ngpio; i++) {
> > > > -             if (*mask == 0)
> > > > -                     break;
> > > > -             /* Once finished with an index write it out to the register */
> > > > -             if (index !=  xgpio_index(chip, i)) {
> > > > -                     xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET +
> > > > -                                    index * XGPIO_CHANNEL_OFFSET,
> > > > -                                    chip->gpio_state[index]);
> > > > -                     spin_unlock_irqrestore(&chip->gpio_lock[index], flags);
> > > > -                     index =  xgpio_index(chip, i);
> > > > -                     spin_lock_irqsave(&chip->gpio_lock[index], flags);
> > > > -             }
> > > > -             if (__test_and_clear_bit(i, mask)) {
> > > > -                     offset =  xgpio_offset(chip, i);
> > > > -                     if (test_bit(i, bits))
> > > > -                             chip->gpio_state[index] |= BIT(offset);
> > > > -                     else
> > > > -                             chip->gpio_state[index] &= ~BIT(offset);
> > > > -             }
> > > > -     }
> > > > -
> > > > -     xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET +
> > > > -                    index * XGPIO_CHANNEL_OFFSET, chip->gpio_state[index]);
> > > > -
> > > > -     spin_unlock_irqrestore(&chip->gpio_lock[index], flags);
> > > > +     u32 *const state = chip->gpio_state;
> > > > +     unsigned int *const width = chip->gpio_width;
> > > > +
> > > > +     DECLARE_BITMAP(old, 64);
> > > > +     DECLARE_BITMAP(new, 64);
> > > > +     DECLARE_BITMAP(changed, 64);
> > > > +
> > > > +     spin_lock_irqsave(&chip->gpio_lock[0], flags);
> > > > +     spin_lock(&chip->gpio_lock[1]);
> > > > +
> > > > +     bitmap_set_value(old, 64, state[0], width[0], 0);
> > > > +     bitmap_set_value(old, 64, state[1], width[1], width[0]);
> > > > +     bitmap_replace(new, old, bits, mask, gc->ngpio);
> > > > +
> > > > +     bitmap_set_value(old, 64, state[0], 32, 0);
> > > > +     bitmap_set_value(old, 64, state[1], 32, 32);
> > > > +     state[0] = bitmap_get_value(new, 0, width[0]);
> > > > +     state[1] = bitmap_get_value(new, width[0], width[1]);
> > > > +     bitmap_set_value(new, 64, state[0], 32, 0);
> > > > +     bitmap_set_value(new, 64, state[1], 32, 32);
> > > > +     bitmap_xor(changed, old, new, 64);
> > > > +
> > > > +     if (((u32 *)changed)[0])
> > > > +             xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET,
> > > > +                             state[0]);
> > > > +     if (((u32 *)changed)[1])
> > > > +             xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET +
> > > > +                             XGPIO_CHANNEL_OFFSET, state[1]);
> > > > +
> > > > +     spin_unlock(&chip->gpio_lock[1]);
> > > > +     spin_unlock_irqrestore(&chip->gpio_lock[0], flags);
> > > >  }
> > > >
> > > >  /**
> > > >
> > >
> > > Srinivas N: Can you please test this code?
> > >
> > > Thanks,
> > > Michal
> >
> > Hey, any chance of getting that Tested-by?
> I tested patches with few modifications in code (spin_lock handling and merge conflict).
> functionality wise it's working fine.
>
> >
> > Bart

Hi Bartosz,

May I please know the URL of the tree that you are using. I had been
using the tree below for submitting this patchset on GPIO to you.
https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio.git

I think I am using the wrong tree. On which tree should I base my
patches on for my next  (v4) submission? Should I use the tree below?
:
https://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux.git

Regards
Syed Nayyar Waris
Bartosz Golaszewski April 1, 2021, 12:51 p.m. UTC | #9
On Thu, Apr 1, 2021 at 1:16 PM Syed Nayyar Waris <syednwaris@gmail.com> wrote:
>
> On Wed, Mar 31, 2021 at 8:56 PM Srinivas Neeli <sneeli@xilinx.com> wrote:
> >
> > Hi,
> >
> > > -----Original Message-----
> > > From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> > > Sent: Friday, March 26, 2021 10:58 PM
> > > To: Michal Simek <michals@xilinx.com>
> > > Cc: Syed Nayyar Waris <syednwaris@gmail.com>; Srinivas Neeli
> > > <sneeli@xilinx.com>; Andy Shevchenko
> > > <andriy.shevchenko@linux.intel.com>; William Breathitt Gray
> > > <vilhelm.gray@gmail.com>; Arnd Bergmann <arnd@arndb.de>; Robert
> > > Richter <rrichter@marvell.com>; Linus Walleij <linus.walleij@linaro.org>;
> > > Masahiro Yamada <yamada.masahiro@socionext.com>; Andrew Morton
> > > <akpm@linux-foundation.org>; Zhang Rui <rui.zhang@intel.com>; Daniel
> > > Lezcano <daniel.lezcano@linaro.org>; Amit Kucheria
> > > <amit.kucheria@verdurent.com>; Linux-Arch <linux-arch@vger.kernel.org>;
> > > linux-gpio <linux-gpio@vger.kernel.org>; LKML <linux-
> > > kernel@vger.kernel.org>; arm-soc <linux-arm-kernel@lists.infradead.org>;
> > > linux-pm <linux-pm@vger.kernel.org>; Srinivas Goud <sgoud@xilinx.com>
> > > Subject: Re: [PATCH v3 3/3] gpio: xilinx: Utilize generic bitmap_get_value and
> > > _set_value
> > >
> > > On Mon, Mar 8, 2021 at 8:13 AM Michal Simek <michal.simek@xilinx.com>
> > > wrote:
> > > >
> > > >
> > > >
> > > > On 3/6/21 3:06 PM, Syed Nayyar Waris wrote:
> > > > > This patch reimplements the xgpio_set_multiple() function in
> > > > > drivers/gpio/gpio-xilinx.c to use the new generic functions:
> > > > > bitmap_get_value() and bitmap_set_value(). The code is now simpler
> > > > > to read and understand. Moreover, instead of looping for each bit in
> > > > > xgpio_set_multiple() function, now we can check each channel at a
> > > > > time and save cycles.
> > > > >
> > > > > Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> > > > > Cc: Michal Simek <michal.simek@xilinx.com>
> > > > > Signed-off-by: Syed Nayyar Waris <syednwaris@gmail.com>
> > > > > Acked-by: William Breathitt Gray <vilhelm.gray@gmail.com>
> > > > > ---
> > > > >  drivers/gpio/gpio-xilinx.c | 63
> > > > > +++++++++++++++++++-------------------
> > > > >  1 file changed, 32 insertions(+), 31 deletions(-)
> > > > >
> > > > > diff --git a/drivers/gpio/gpio-xilinx.c b/drivers/gpio/gpio-xilinx.c
> > > > > index be539381fd82..8445e69cf37b 100644
> > > > > --- a/drivers/gpio/gpio-xilinx.c
> > > > > +++ b/drivers/gpio/gpio-xilinx.c
> > > > > @@ -15,6 +15,7 @@
> > > > >  #include <linux/of_device.h>
> > > > >  #include <linux/of_platform.h>
> > > > >  #include <linux/slab.h>
> > > > > +#include "gpiolib.h"
> > > > >
> > > > >  /* Register Offset Definitions */
> > > > >  #define XGPIO_DATA_OFFSET   (0x0)    /* Data register  */
> > > > > @@ -141,37 +142,37 @@ static void xgpio_set_multiple(struct
> > > > > gpio_chip *gc, unsigned long *mask,  {
> > > > >       unsigned long flags;
> > > > >       struct xgpio_instance *chip = gpiochip_get_data(gc);
> > > > > -     int index = xgpio_index(chip, 0);
> > > > > -     int offset, i;
> > > > > -
> > > > > -     spin_lock_irqsave(&chip->gpio_lock[index], flags);
> > > > > -
> > > > > -     /* Write to GPIO signals */
> > > > > -     for (i = 0; i < gc->ngpio; i++) {
> > > > > -             if (*mask == 0)
> > > > > -                     break;
> > > > > -             /* Once finished with an index write it out to the register */
> > > > > -             if (index !=  xgpio_index(chip, i)) {
> > > > > -                     xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET +
> > > > > -                                    index * XGPIO_CHANNEL_OFFSET,
> > > > > -                                    chip->gpio_state[index]);
> > > > > -                     spin_unlock_irqrestore(&chip->gpio_lock[index], flags);
> > > > > -                     index =  xgpio_index(chip, i);
> > > > > -                     spin_lock_irqsave(&chip->gpio_lock[index], flags);
> > > > > -             }
> > > > > -             if (__test_and_clear_bit(i, mask)) {
> > > > > -                     offset =  xgpio_offset(chip, i);
> > > > > -                     if (test_bit(i, bits))
> > > > > -                             chip->gpio_state[index] |= BIT(offset);
> > > > > -                     else
> > > > > -                             chip->gpio_state[index] &= ~BIT(offset);
> > > > > -             }
> > > > > -     }
> > > > > -
> > > > > -     xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET +
> > > > > -                    index * XGPIO_CHANNEL_OFFSET, chip->gpio_state[index]);
> > > > > -
> > > > > -     spin_unlock_irqrestore(&chip->gpio_lock[index], flags);
> > > > > +     u32 *const state = chip->gpio_state;
> > > > > +     unsigned int *const width = chip->gpio_width;
> > > > > +
> > > > > +     DECLARE_BITMAP(old, 64);
> > > > > +     DECLARE_BITMAP(new, 64);
> > > > > +     DECLARE_BITMAP(changed, 64);
> > > > > +
> > > > > +     spin_lock_irqsave(&chip->gpio_lock[0], flags);
> > > > > +     spin_lock(&chip->gpio_lock[1]);
> > > > > +
> > > > > +     bitmap_set_value(old, 64, state[0], width[0], 0);
> > > > > +     bitmap_set_value(old, 64, state[1], width[1], width[0]);
> > > > > +     bitmap_replace(new, old, bits, mask, gc->ngpio);
> > > > > +
> > > > > +     bitmap_set_value(old, 64, state[0], 32, 0);
> > > > > +     bitmap_set_value(old, 64, state[1], 32, 32);
> > > > > +     state[0] = bitmap_get_value(new, 0, width[0]);
> > > > > +     state[1] = bitmap_get_value(new, width[0], width[1]);
> > > > > +     bitmap_set_value(new, 64, state[0], 32, 0);
> > > > > +     bitmap_set_value(new, 64, state[1], 32, 32);
> > > > > +     bitmap_xor(changed, old, new, 64);
> > > > > +
> > > > > +     if (((u32 *)changed)[0])
> > > > > +             xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET,
> > > > > +                             state[0]);
> > > > > +     if (((u32 *)changed)[1])
> > > > > +             xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET +
> > > > > +                             XGPIO_CHANNEL_OFFSET, state[1]);
> > > > > +
> > > > > +     spin_unlock(&chip->gpio_lock[1]);
> > > > > +     spin_unlock_irqrestore(&chip->gpio_lock[0], flags);
> > > > >  }
> > > > >
> > > > >  /**
> > > > >
> > > >
> > > > Srinivas N: Can you please test this code?
> > > >
> > > > Thanks,
> > > > Michal
> > >
> > > Hey, any chance of getting that Tested-by?
> > I tested patches with few modifications in code (spin_lock handling and merge conflict).
> > functionality wise it's working fine.
> >
> > >
> > > Bart
>
> Hi Bartosz,
>
> May I please know the URL of the tree that you are using. I had been
> using the tree below for submitting this patchset on GPIO to you.
> https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio.git
>
> I think I am using the wrong tree. On which tree should I base my
> patches on for my next  (v4) submission? Should I use the tree below?
> :
> https://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux.git
>
> Regards
> Syed Nayyar Waris

Yes this is the one. Please address new issues raised by reviewers.

Bart
Syed Nayyar Waris April 1, 2021, 5:47 p.m. UTC | #10
On Mon, Mar 29, 2021 at 8:54 PM Andy Shevchenko
<andriy.shevchenko@linux.intel.com> wrote:
>

> On Sat, Mar 06, 2021 at 07:36:30PM +0530, Syed Nayyar Waris wrote:

> > This patch reimplements the xgpio_set_multiple() function in

> > drivers/gpio/gpio-xilinx.c to use the new generic functions:

> > bitmap_get_value() and bitmap_set_value(). The code is now simpler

> > to read and understand. Moreover, instead of looping for each bit

> > in xgpio_set_multiple() function, now we can check each channel at

> > a time and save cycles.

>

> ...

>

> > +     u32 *const state = chip->gpio_state;

>

> Looking at this... What's the point of the const here?

>

> Am I right that this tells: pointer is a const, while the data underneath

> can be modified?

>

> > +     unsigned int *const width = chip->gpio_width;

>

> Ditto.

>

> Putting const:s here and there for sake of the const is not good practice.

> It makes code harder to read.

>

> --

> With Best Regards,

> Andy Shevchenko

>

Okay. I will incorporate your comments in my next submission. Thank You.

Regards
Syed Nayyar Waris
Syed Nayyar Waris April 1, 2021, 5:50 p.m. UTC | #11
On Sat, Mar 27, 2021 at 10:05 PM Andy Shevchenko
<andy.shevchenko@gmail.com> wrote:
>

> On Sat, Mar 27, 2021 at 2:02 PM William Breathitt Gray

> <vilhelm.gray@gmail.com> wrote:

> > On Sat, Mar 27, 2021 at 09:29:26AM +0200, Andy Shevchenko wrote:

> > > On Saturday, March 27, 2021, Syed Nayyar Waris <syednwaris@gmail.com> wrote:

> > > > On Fri, Mar 26, 2021 at 11:32 PM Andy Shevchenko

> > > > <andy.shevchenko@gmail.com> wrote:

> > > > > On Sat, Mar 6, 2021 at 4:08 PM Syed Nayyar Waris <syednwaris@gmail.com>

> > > > wrote:

> > > > >

> > > > > > +       bitmap_set_value(old, 64, state[0], 32, 0);

> > > > > > +       bitmap_set_value(old, 64, state[1], 32, 32);

> > > > >

> > > > > Isn't it effectively bitnap_from_arr32() ?

> > > > >

> > > > > > +       bitmap_set_value(new, 64, state[0], 32, 0);

> > > > > > +       bitmap_set_value(new, 64, state[1], 32, 32);

> > > > >

> > > > > Ditto.

>

> > > > With bitmap_set_value() we are also specifying the offset (or start)

> > > > position too. so that the remainder of the array remains unaffected. I

> > > > think it would not be feasible to use bitmap_from/to_arr32()  here.

> > >

> > >

> > > You have hard coded start and nbits parameters to 32. How is it not the

> > > same?

> >

> > Would these four lines become something like this:

> >

> >         bitmap_from_arr32(old, state, 64);

> >         ...

> >         bitmap_from_arr32(new, state, 64);

>

> This is my understanding, but I might miss something. I mean driver

> specifics that make my proposal incorrect.

>

> --

> With Best Regards,

> Andy Shevchenko


I initially (incorrectly) thought that all of the bitmap_set_value()
statements have to be replaced. But now I realised, only those
specific bitmap_set_value() calls containing 32 bits width have to
replaced.

I will incorporate the above review comments in my next v4 submission.

Regards
Syed Nayyar Waris
Syed Nayyar Waris April 2, 2021, 9:40 a.m. UTC | #12
On Fri, Mar 26, 2021 at 11:27 PM Andy Shevchenko
<andy.shevchenko@gmail.com> wrote:
>

> On Sat, Mar 6, 2021 at 4:08 PM Syed Nayyar Waris <syednwaris@gmail.com> wrote:

> >

> > This patch reimplements the xgpio_set_multiple() function in

> > drivers/gpio/gpio-xilinx.c to use the new generic functions:

> > bitmap_get_value() and bitmap_set_value(). The code is now simpler

> > to read and understand. Moreover, instead of looping for each bit

> > in xgpio_set_multiple() function, now we can check each channel at

> > a time and save cycles.

>

> ...

>

> > +       u32 *const state = chip->gpio_state;

> > +       unsigned int *const width = chip->gpio_width;

>

> > +

>

> Extra blank line.

>

> > +       DECLARE_BITMAP(old, 64);

> > +       DECLARE_BITMAP(new, 64);

> > +       DECLARE_BITMAP(changed, 64);

>

> > +       spin_lock_irqsave(&chip->gpio_lock[0], flags);

> > +       spin_lock(&chip->gpio_lock[1]);

>

> I understand why this is done at the top of the function in the original code.

> I do not understand why you put some operations under spin lock.

>

> Have you checked what each of these spin locks protects?

> Please check and try to lock as minimum as possible.

>

> > +       bitmap_set_value(old, 64, state[0], width[0], 0);

> > +       bitmap_set_value(old, 64, state[1], width[1], width[0]);

> > +       bitmap_replace(new, old, bits, mask, gc->ngpio);

> > +

> > +       bitmap_set_value(old, 64, state[0], 32, 0);

> > +       bitmap_set_value(old, 64, state[1], 32, 32);

> > +       state[0] = bitmap_get_value(new, 0, width[0]);

> > +       state[1] = bitmap_get_value(new, width[0], width[1]);

> > +       bitmap_set_value(new, 64, state[0], 32, 0);

> > +       bitmap_set_value(new, 64, state[1], 32, 32);

> > +       bitmap_xor(changed, old, new, 64);

>

> Original code and this is cryptic. Can you add a few comments

> explaining what is going on here?

>

> > +       spin_unlock(&chip->gpio_lock[1]);

> > +       spin_unlock_irqrestore(&chip->gpio_lock[0], flags);

>

> --

> With Best Regards,

> Andy Shevchenko


Have removed the extra line and added comments. Regarding locking - I
see that now there is just a single lock available instead of 2 locks.
Have made necessary changes. Thanks
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/drivers/gpio/gpio-xilinx.c?id=37ef334680800263b32bb96a5156a4b47f0244a2

Regards

Syed Nayyar Waris
Syed Nayyar Waris April 2, 2021, 10:07 a.m. UTC | #13
On Mon, Mar 29, 2021 at 8:54 PM Andy Shevchenko
<andriy.shevchenko@linux.intel.com> wrote:
>
> On Sat, Mar 06, 2021 at 07:36:30PM +0530, Syed Nayyar Waris wrote:
> > This patch reimplements the xgpio_set_multiple() function in
> > drivers/gpio/gpio-xilinx.c to use the new generic functions:
> > bitmap_get_value() and bitmap_set_value(). The code is now simpler
> > to read and understand. Moreover, instead of looping for each bit
> > in xgpio_set_multiple() function, now we can check each channel at
> > a time and save cycles.
>
> ...
>
> > +     u32 *const state = chip->gpio_state;
>
> Looking at this... What's the point of the const here?
>
> Am I right that this tells: pointer is a const, while the data underneath
> can be modified?

Yes you are right and the data underneath can be modified.
I have removed the 'const' in v4

>
> > +     unsigned int *const width = chip->gpio_width;
>
> Ditto.
>
> Putting const:s here and there for sake of the const is not good practice.
> It makes code harder to read.

Okay.

>
> --
> With Best Regards,
> Andy Shevchenko
>
>