diff mbox series

[16/26] tcg: Move MAX_CODE_GEN_BUFFER_SIZE to tcg-target.h

Message ID 20210311002156.253711-17-richard.henderson@linaro.org
State Superseded
Headers show
Series tcg: Workaround macOS 11.2 mprotect bug | expand

Commit Message

Richard Henderson March 11, 2021, 12:21 a.m. UTC 
Remove the ifdef ladder and move each define into the
appropriate header file.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 tcg/aarch64/tcg-target.h |  1 +
 tcg/arm/tcg-target.h     |  1 +
 tcg/i386/tcg-target.h    |  2 ++
 tcg/mips/tcg-target.h    |  6 ++++++
 tcg/ppc/tcg-target.h     |  2 ++
 tcg/riscv/tcg-target.h   |  1 +
 tcg/s390/tcg-target.h    |  3 +++
 tcg/sparc/tcg-target.h   |  1 +
 tcg/tci/tcg-target.h     |  1 +
 tcg/region.c             | 32 ++++++--------------------------
 10 files changed, 24 insertions(+), 26 deletions(-)

-- 
2.25.1

Comments

BALATON Zoltan March 11, 2021, 12:42 a.m. UTC | #1 
On Wed, 10 Mar 2021, Richard Henderson wrote:
> Remove the ifdef ladder and move each define into the

> appropriate header file.

>

> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

> ---

> tcg/aarch64/tcg-target.h |  1 +

> tcg/arm/tcg-target.h     |  1 +

> tcg/i386/tcg-target.h    |  2 ++

> tcg/mips/tcg-target.h    |  6 ++++++

> tcg/ppc/tcg-target.h     |  2 ++

> tcg/riscv/tcg-target.h   |  1 +

> tcg/s390/tcg-target.h    |  3 +++

> tcg/sparc/tcg-target.h   |  1 +

> tcg/tci/tcg-target.h     |  1 +

> tcg/region.c             | 32 ++++++--------------------------

> 10 files changed, 24 insertions(+), 26 deletions(-)

>

> diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h

> index 5ec30dba25..ef55f7c185 100644

> --- a/tcg/aarch64/tcg-target.h

> +++ b/tcg/aarch64/tcg-target.h

> @@ -15,6 +15,7 @@

>

> #define TCG_TARGET_INSN_UNIT_SIZE  4

> #define TCG_TARGET_TLB_DISPLACEMENT_BITS 24

> +#define MAX_CODE_GEN_BUFFER_SIZE  (2 * GiB)

> #undef TCG_TARGET_STACK_GROWSUP

>

> typedef enum {

> diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h

> index 8d1fee6327..b9a85d0f83 100644

> --- a/tcg/arm/tcg-target.h

> +++ b/tcg/arm/tcg-target.h

> @@ -60,6 +60,7 @@ extern int arm_arch;

> #undef TCG_TARGET_STACK_GROWSUP

> #define TCG_TARGET_INSN_UNIT_SIZE 4

> #define TCG_TARGET_TLB_DISPLACEMENT_BITS 16

> +#define MAX_CODE_GEN_BUFFER_SIZE  UINT32_MAX

>

> typedef enum {

>     TCG_REG_R0 = 0,

> diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h

> index b693d3692d..ac10066c3e 100644

> --- a/tcg/i386/tcg-target.h

> +++ b/tcg/i386/tcg-target.h

> @@ -31,9 +31,11 @@

> #ifdef __x86_64__

> # define TCG_TARGET_REG_BITS  64

> # define TCG_TARGET_NB_REGS   32

> +# define MAX_CODE_GEN_BUFFER_SIZE  (2 * GiB)

> #else

> # define TCG_TARGET_REG_BITS  32

> # define TCG_TARGET_NB_REGS   24

> +# define MAX_CODE_GEN_BUFFER_SIZE  UINT32_MAX

> #endif

>

> typedef enum {

> diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h

> index c2c32fb38f..e81e824cab 100644

> --- a/tcg/mips/tcg-target.h

> +++ b/tcg/mips/tcg-target.h

> @@ -39,6 +39,12 @@

> #define TCG_TARGET_TLB_DISPLACEMENT_BITS 16

> #define TCG_TARGET_NB_REGS 32

>

> +/*

> + * We have a 256MB branch region, but leave room to make sure the

> + * main executable is also within that region.

> + */

> +#define MAX_CODE_GEN_BUFFER_SIZE  (128 * MiB)

> +

> typedef enum {

>     TCG_REG_ZERO = 0,

>     TCG_REG_AT,

> diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h

> index d1339afc66..c13ed5640a 100644

> --- a/tcg/ppc/tcg-target.h

> +++ b/tcg/ppc/tcg-target.h

> @@ -27,8 +27,10 @@

>

> #ifdef _ARCH_PPC64

> # define TCG_TARGET_REG_BITS  64

> +# define MAX_CODE_GEN_BUFFER_SIZE  (2 * GiB)

> #else

> # define TCG_TARGET_REG_BITS  32

> +# define MAX_CODE_GEN_BUFFER_SIZE  (32 * MiB)

> #endif

>

> #define TCG_TARGET_NB_REGS 64

> diff --git a/tcg/riscv/tcg-target.h b/tcg/riscv/tcg-target.h

> index 727c8df418..87ea94666b 100644

> --- a/tcg/riscv/tcg-target.h

> +++ b/tcg/riscv/tcg-target.h

> @@ -34,6 +34,7 @@

> #define TCG_TARGET_INSN_UNIT_SIZE 4

> #define TCG_TARGET_TLB_DISPLACEMENT_BITS 20

> #define TCG_TARGET_NB_REGS 32

> +#define MAX_CODE_GEN_BUFFER_SIZE  ((size_t)-1)

>

> typedef enum {

>     TCG_REG_ZERO,

> diff --git a/tcg/s390/tcg-target.h b/tcg/s390/tcg-target.h

> index 641464eea4..b04b72b7eb 100644

> --- a/tcg/s390/tcg-target.h

> +++ b/tcg/s390/tcg-target.h

> @@ -28,6 +28,9 @@

> #define TCG_TARGET_INSN_UNIT_SIZE 2

> #define TCG_TARGET_TLB_DISPLACEMENT_BITS 19

>

> +/* We have a +- 4GB range on the branches; leave some slop.  */

> +#define MAX_CODE_GEN_BUFFER_SIZE  (3 * GiB)

> +

> typedef enum TCGReg {

>     TCG_REG_R0 = 0,

>     TCG_REG_R1,

> diff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h

> index f66f5d07dc..86bb9a2d39 100644

> --- a/tcg/sparc/tcg-target.h

> +++ b/tcg/sparc/tcg-target.h

> @@ -30,6 +30,7 @@

> #define TCG_TARGET_INSN_UNIT_SIZE 4

> #define TCG_TARGET_TLB_DISPLACEMENT_BITS 32

> #define TCG_TARGET_NB_REGS 32

> +#define MAX_CODE_GEN_BUFFER_SIZE  (2 * GiB)

>

> typedef enum {

>     TCG_REG_G0 = 0,

> diff --git a/tcg/tci/tcg-target.h b/tcg/tci/tcg-target.h

> index 9c0021a26f..03cf527cb4 100644

> --- a/tcg/tci/tcg-target.h

> +++ b/tcg/tci/tcg-target.h

> @@ -43,6 +43,7 @@

> #define TCG_TARGET_INTERPRETER 1

> #define TCG_TARGET_INSN_UNIT_SIZE 1

> #define TCG_TARGET_TLB_DISPLACEMENT_BITS 32

> +#define MAX_CODE_GEN_BUFFER_SIZE  ((size_t)-1)

>

> #if UINTPTR_MAX == UINT32_MAX

> # define TCG_TARGET_REG_BITS 32

> diff --git a/tcg/region.c b/tcg/region.c

> index e3fbf6a7e7..8fba0724e5 100644

> --- a/tcg/region.c

> +++ b/tcg/region.c

> @@ -398,34 +398,14 @@ static size_t tcg_n_regions(unsigned max_cpus)

> #endif

> }

>

> -/* Minimum size of the code gen buffer.  This number is randomly chosen,

> -   but not so small that we can't have a fair number of TB's live.  */

> +/*

> + * Minimum size of the code gen buffer.  This number is randomly chosen,

> + * but not so small that we can't have a fair number of TB's live.

> + *

> + * Maximum size is defined in tcg-target.h.

> + */

> #define MIN_CODE_GEN_BUFFER_SIZE     (1 * MiB)

>

> -/* Maximum size of the code gen buffer we'd like to use.  Unless otherwise

> -   indicated, this is constrained by the range of direct branches on the

> -   host cpu, as used by the TCG implementation of goto_tb.  */


This comment about constraints seems to have been lost. Should it be 
preserved above?

Regards,
BALATON Zoltan

> -#if defined(__x86_64__)

> -# define MAX_CODE_GEN_BUFFER_SIZE  (2 * GiB)

> -#elif defined(__sparc__)

> -# define MAX_CODE_GEN_BUFFER_SIZE  (2 * GiB)

> -#elif defined(__powerpc64__)

> -# define MAX_CODE_GEN_BUFFER_SIZE  (2 * GiB)

> -#elif defined(__powerpc__)

> -# define MAX_CODE_GEN_BUFFER_SIZE  (32 * MiB)

> -#elif defined(__aarch64__)

> -# define MAX_CODE_GEN_BUFFER_SIZE  (2 * GiB)

> -#elif defined(__s390x__)

> -  /* We have a +- 4GB range on the branches; leave some slop.  */

> -# define MAX_CODE_GEN_BUFFER_SIZE  (3 * GiB)

> -#elif defined(__mips__)

> -  /* We have a 256MB branch region, but leave room to make sure the

> -     main executable is also within that region.  */

> -# define MAX_CODE_GEN_BUFFER_SIZE  (128 * MiB)

> -#else

> -# define MAX_CODE_GEN_BUFFER_SIZE  ((size_t)-1)

> -#endif

> -

> #if TCG_TARGET_REG_BITS == 32

> #define DEFAULT_CODE_GEN_BUFFER_SIZE_1 (32 * MiB)

> #ifdef CONFIG_USER_ONLY

>
Richard Henderson March 13, 2021, 4 p.m. UTC | #2 
On 3/10/21 6:42 PM, BALATON Zoltan wrote:
>> -/* Minimum size of the code gen buffer.  This number is randomly chosen,

>> -   but not so small that we can't have a fair number of TB's live.  */

>> +/*

>> + * Minimum size of the code gen buffer.  This number is randomly chosen,

>> + * but not so small that we can't have a fair number of TB's live.

>> + *

>> + * Maximum size is defined in tcg-target.h.

>> + */

>> #define MIN_CODE_GEN_BUFFER_SIZE     (1 * MiB)

>>

>> -/* Maximum size of the code gen buffer we'd like to use.  Unless otherwise

>> -   indicated, this is constrained by the range of direct branches on the

>> -   host cpu, as used by the TCG implementation of goto_tb.  */

> 

> This comment about constraints seems to have been lost. Should it be preserved 

> above?


Done.


r~
diff mbox series

Patch

diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h
index 5ec30dba25..ef55f7c185 100644
--- a/tcg/aarch64/tcg-target.h
+++ b/tcg/aarch64/tcg-target.h
@@ -15,6 +15,7 @@ 
 
 #define TCG_TARGET_INSN_UNIT_SIZE  4
 #define TCG_TARGET_TLB_DISPLACEMENT_BITS 24
+#define MAX_CODE_GEN_BUFFER_SIZE  (2 * GiB)
 #undef TCG_TARGET_STACK_GROWSUP
 
 typedef enum {
diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h
index 8d1fee6327..b9a85d0f83 100644
--- a/tcg/arm/tcg-target.h
+++ b/tcg/arm/tcg-target.h
@@ -60,6 +60,7 @@  extern int arm_arch;
 #undef TCG_TARGET_STACK_GROWSUP
 #define TCG_TARGET_INSN_UNIT_SIZE 4
 #define TCG_TARGET_TLB_DISPLACEMENT_BITS 16
+#define MAX_CODE_GEN_BUFFER_SIZE  UINT32_MAX
 
 typedef enum {
     TCG_REG_R0 = 0,
diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h
index b693d3692d..ac10066c3e 100644
--- a/tcg/i386/tcg-target.h
+++ b/tcg/i386/tcg-target.h
@@ -31,9 +31,11 @@ 
 #ifdef __x86_64__
 # define TCG_TARGET_REG_BITS  64
 # define TCG_TARGET_NB_REGS   32
+# define MAX_CODE_GEN_BUFFER_SIZE  (2 * GiB)
 #else
 # define TCG_TARGET_REG_BITS  32
 # define TCG_TARGET_NB_REGS   24
+# define MAX_CODE_GEN_BUFFER_SIZE  UINT32_MAX
 #endif
 
 typedef enum {
diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h
index c2c32fb38f..e81e824cab 100644
--- a/tcg/mips/tcg-target.h
+++ b/tcg/mips/tcg-target.h
@@ -39,6 +39,12 @@ 
 #define TCG_TARGET_TLB_DISPLACEMENT_BITS 16
 #define TCG_TARGET_NB_REGS 32
 
+/*
+ * We have a 256MB branch region, but leave room to make sure the
+ * main executable is also within that region.
+ */
+#define MAX_CODE_GEN_BUFFER_SIZE  (128 * MiB)
+
 typedef enum {
     TCG_REG_ZERO = 0,
     TCG_REG_AT,
diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h
index d1339afc66..c13ed5640a 100644
--- a/tcg/ppc/tcg-target.h
+++ b/tcg/ppc/tcg-target.h
@@ -27,8 +27,10 @@ 
 
 #ifdef _ARCH_PPC64
 # define TCG_TARGET_REG_BITS  64
+# define MAX_CODE_GEN_BUFFER_SIZE  (2 * GiB)
 #else
 # define TCG_TARGET_REG_BITS  32
+# define MAX_CODE_GEN_BUFFER_SIZE  (32 * MiB)
 #endif
 
 #define TCG_TARGET_NB_REGS 64
diff --git a/tcg/riscv/tcg-target.h b/tcg/riscv/tcg-target.h
index 727c8df418..87ea94666b 100644
--- a/tcg/riscv/tcg-target.h
+++ b/tcg/riscv/tcg-target.h
@@ -34,6 +34,7 @@ 
 #define TCG_TARGET_INSN_UNIT_SIZE 4
 #define TCG_TARGET_TLB_DISPLACEMENT_BITS 20
 #define TCG_TARGET_NB_REGS 32
+#define MAX_CODE_GEN_BUFFER_SIZE  ((size_t)-1)
 
 typedef enum {
     TCG_REG_ZERO,
diff --git a/tcg/s390/tcg-target.h b/tcg/s390/tcg-target.h
index 641464eea4..b04b72b7eb 100644
--- a/tcg/s390/tcg-target.h
+++ b/tcg/s390/tcg-target.h
@@ -28,6 +28,9 @@ 
 #define TCG_TARGET_INSN_UNIT_SIZE 2
 #define TCG_TARGET_TLB_DISPLACEMENT_BITS 19
 
+/* We have a +- 4GB range on the branches; leave some slop.  */
+#define MAX_CODE_GEN_BUFFER_SIZE  (3 * GiB)
+
 typedef enum TCGReg {
     TCG_REG_R0 = 0,
     TCG_REG_R1,
diff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h
index f66f5d07dc..86bb9a2d39 100644
--- a/tcg/sparc/tcg-target.h
+++ b/tcg/sparc/tcg-target.h
@@ -30,6 +30,7 @@ 
 #define TCG_TARGET_INSN_UNIT_SIZE 4
 #define TCG_TARGET_TLB_DISPLACEMENT_BITS 32
 #define TCG_TARGET_NB_REGS 32
+#define MAX_CODE_GEN_BUFFER_SIZE  (2 * GiB)
 
 typedef enum {
     TCG_REG_G0 = 0,
diff --git a/tcg/tci/tcg-target.h b/tcg/tci/tcg-target.h
index 9c0021a26f..03cf527cb4 100644
--- a/tcg/tci/tcg-target.h
+++ b/tcg/tci/tcg-target.h
@@ -43,6 +43,7 @@ 
 #define TCG_TARGET_INTERPRETER 1
 #define TCG_TARGET_INSN_UNIT_SIZE 1
 #define TCG_TARGET_TLB_DISPLACEMENT_BITS 32
+#define MAX_CODE_GEN_BUFFER_SIZE  ((size_t)-1)
 
 #if UINTPTR_MAX == UINT32_MAX
 # define TCG_TARGET_REG_BITS 32
diff --git a/tcg/region.c b/tcg/region.c
index e3fbf6a7e7..8fba0724e5 100644
--- a/tcg/region.c
+++ b/tcg/region.c
@@ -398,34 +398,14 @@  static size_t tcg_n_regions(unsigned max_cpus)
 #endif
 }
 
-/* Minimum size of the code gen buffer.  This number is randomly chosen,
-   but not so small that we can't have a fair number of TB's live.  */
+/*
+ * Minimum size of the code gen buffer.  This number is randomly chosen,
+ * but not so small that we can't have a fair number of TB's live.
+ *
+ * Maximum size is defined in tcg-target.h.
+ */
 #define MIN_CODE_GEN_BUFFER_SIZE     (1 * MiB)
 
-/* Maximum size of the code gen buffer we'd like to use.  Unless otherwise
-   indicated, this is constrained by the range of direct branches on the
-   host cpu, as used by the TCG implementation of goto_tb.  */
-#if defined(__x86_64__)
-# define MAX_CODE_GEN_BUFFER_SIZE  (2 * GiB)
-#elif defined(__sparc__)
-# define MAX_CODE_GEN_BUFFER_SIZE  (2 * GiB)
-#elif defined(__powerpc64__)
-# define MAX_CODE_GEN_BUFFER_SIZE  (2 * GiB)
-#elif defined(__powerpc__)
-# define MAX_CODE_GEN_BUFFER_SIZE  (32 * MiB)
-#elif defined(__aarch64__)
-# define MAX_CODE_GEN_BUFFER_SIZE  (2 * GiB)
-#elif defined(__s390x__)
-  /* We have a +- 4GB range on the branches; leave some slop.  */
-# define MAX_CODE_GEN_BUFFER_SIZE  (3 * GiB)
-#elif defined(__mips__)
-  /* We have a 256MB branch region, but leave room to make sure the
-     main executable is also within that region.  */
-# define MAX_CODE_GEN_BUFFER_SIZE  (128 * MiB)
-#else
-# define MAX_CODE_GEN_BUFFER_SIZE  ((size_t)-1)
-#endif
-
 #if TCG_TARGET_REG_BITS == 32
 #define DEFAULT_CODE_GEN_BUFFER_SIZE_1 (32 * MiB)
 #ifdef CONFIG_USER_ONLY