| Message ID | 1615254990-192784-2-git-send-email-shawn.lin@rock-chips.com |
|---|---|
| State | New |
| Headers | show |
| Series | None | expand |
On Tue, Mar 09, 2021 at 09:56:29AM +0800, Shawn Lin wrote: > This patch adds rockchip support in sdhci-of-dwcmhsc.yaml > > Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> > --- > > Changes in v3: None > > .../bindings/mmc/snps,dwcmshc-sdhci.yaml | 24 ++++++++++++++++++++++ > 1 file changed, 24 insertions(+) > > diff --git a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml > index f99fb9f..43989f2 100644 > --- a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml > +++ b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml > @@ -16,6 +16,7 @@ allOf: > properties: > compatible: > enum: > + - rockchip,dwcmshc-sdhci > - snps,dwcmshc-sdhci > > reg: > @@ -31,12 +32,24 @@ properties: > items: > - description: core clock > - description: bus clock for optional > + - description: axi clock for rockchip specified > + - description: block clock for rockchip specified > + - description: timer clock for rockchip specified > + > > clock-names: > minItems: 1 > items: > - const: core > - const: bus > + - const: axi > + - const: block > + - const: timer > + > + rockchip,txclk-tapnum: > + description: Specify the number of delay for tx sampling. > + $ref: /schemas/types.yaml#/definitions/uint32 Constraints for this? 0 - 2^32 is okay? > + > > required: > - compatible > @@ -49,6 +62,17 @@ unevaluatedProperties: false > > examples: > - | > + mmc@fe310000 { > + compatible = "rockchip,dwcmshc-sdhci"; > + reg = <0xfe310000 0x10000>; > + interrupts = <0 25 0x4>; > + clocks = <&cru 17>, <&cru 18>, <&cru 19>, <&cru 20>, <&cru 21>; > + clock-names = "core", "bus", "axi", "block", "timer"; > + bus-width = <8>; > + #address-cells = <1>; > + #size-cells = <0>; > + }; > + - | > mmc@aa0000 { > compatible = "snps,dwcmshc-sdhci"; > reg = <0xaa000 0x1000>; > -- > 2.7.4 > > >
Hi Rob On 2021/3/10 11:01, Rob Herring wrote: > On Tue, Mar 09, 2021 at 09:56:29AM +0800, Shawn Lin wrote: >> This patch adds rockchip support in sdhci-of-dwcmhsc.yaml >> >> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> ..... >> + >> + rockchip,txclk-tapnum: >> + description: Specify the number of delay for tx sampling. >> + $ref: /schemas/types.yaml#/definitions/uint32 > > Constraints for this? 0 - 2^32 is okay? Oh, actually this is a 4-bit value, and the reg map looks like: 7:5 RO reserved -------------------- 4:0 RW tapnum So I think it should constraints for u8? > >> + >> >> required: >> - compatible >> @@ -49,6 +62,17 @@ unevaluatedProperties: false >> >> examples: >> - | >> + mmc@fe310000 { >> + compatible = "rockchip,dwcmshc-sdhci"; >> + reg = <0xfe310000 0x10000>; >> + interrupts = <0 25 0x4>; >> + clocks = <&cru 17>, <&cru 18>, <&cru 19>, <&cru 20>, <&cru 21>; >> + clock-names = "core", "bus", "axi", "block", "timer"; >> + bus-width = <8>; >> + #address-cells = <1>; >> + #size-cells = <0>; >> + }; >> + - | >> mmc@aa0000 { >> compatible = "snps,dwcmshc-sdhci"; >> reg = <0xaa000 0x1000>; >> -- >> 2.7.4 >> >> >> > > >
On 3/10/21 4:01 AM, Rob Herring wrote: > On Tue, Mar 09, 2021 at 09:56:29AM +0800, Shawn Lin wrote: >> This patch adds rockchip support in sdhci-of-dwcmhsc.yaml >> >> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> >> --- >> >> Changes in v3: None >> >> .../bindings/mmc/snps,dwcmshc-sdhci.yaml | 24 ++++++++++++++++++++++ >> 1 file changed, 24 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml >> index f99fb9f..43989f2 100644 >> --- a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml >> +++ b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml >> @@ -16,6 +16,7 @@ allOf: >> properties: >> compatible: >> enum: >> + - rockchip,dwcmshc-sdhci Compatible strings are supposed to be SoC orientated. What SoC was this change for? rk3568 ? Could Shawn confirm that? - rockchip,rk3568-dwcmshc-sdhci ?? Could Rob advise here? >> - snps,dwcmshc-sdhci >> >> reg: >> @@ -31,12 +32,24 @@ properties: >> items: >> - description: core clock >> - description: bus clock for optional >> + - description: axi clock for rockchip specified >> + - description: block clock for rockchip specified >> + - description: timer clock for rockchip specified >> + >> >> clock-names: >> minItems: 1 >> items: >> - const: core >> - const: bus >> + - const: axi >> + - const: block >> + - const: timer >> + >> + rockchip,txclk-tapnum: >> + description: Specify the number of delay for tx sampling. >> + $ref: /schemas/types.yaml#/definitions/uint32 > > Constraints for this? 0 - 2^32 is okay? > >> + >> >> required: >> - compatible >> @@ -49,6 +62,17 @@ unevaluatedProperties: false >> >> examples: >> - | >> + mmc@fe310000 { >> + compatible = "rockchip,dwcmshc-sdhci"; compatible = "rockchip,rk3568-dwcmshc-sdhci"; ?? >> + reg = <0xfe310000 0x10000>; >> + interrupts = <0 25 0x4>; >> + clocks = <&cru 17>, <&cru 18>, <&cru 19>, <&cru 20>, <&cru 21>; >> + clock-names = "core", "bus", "axi", "block", "timer"; >> + bus-width = <8>; >> + #address-cells = <1>; >> + #size-cells = <0>; >> + }; >> + - | >> mmc@aa0000 { >> compatible = "snps,dwcmshc-sdhci"; >> reg = <0xaa000 0x1000>; >> -- >> 2.7.4 >> >> >> >
On 2021/3/10 15:00, Johan Jonker wrote: > On 3/10/21 4:01 AM, Rob Herring wrote: >> On Tue, Mar 09, 2021 at 09:56:29AM +0800, Shawn Lin wrote: >>> This patch adds rockchip support in sdhci-of-dwcmhsc.yaml >>> >>> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> >>> --- >>> >>> Changes in v3: None >>> >>> .../bindings/mmc/snps,dwcmshc-sdhci.yaml | 24 ++++++++++++++++++++++ >>> 1 file changed, 24 insertions(+) >>> >>> diff --git a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml >>> index f99fb9f..43989f2 100644 >>> --- a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml >>> +++ b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml >>> @@ -16,6 +16,7 @@ allOf: >>> properties: >>> compatible: >>> enum: > >>> + - rockchip,dwcmshc-sdhci > > Compatible strings are supposed to be SoC orientated. > What SoC was this change for? rk3568 ? > Could Shawn confirm that? Yes. We are inclined to use this controller from now on for a long time for up-coming SoCs. Should we tag compatible for rk3568 specified? One of the negative things I could come up with is that we do this for dwmmc-rockchip, but we end up doing nothing else, except for adding new compatible string again and again in Document. > > - rockchip,rk3568-dwcmshc-sdhci ?? > > Could Rob advise here? > >>> - snps,dwcmshc-sdhci >>> >>> reg: >>> @@ -31,12 +32,24 @@ properties: >>> items: >>> - description: core clock >>> - description: bus clock for optional >>> + - description: axi clock for rockchip specified >>> + - description: block clock for rockchip specified >>> + - description: timer clock for rockchip specified >>> + >>> >>> clock-names: >>> minItems: 1 >>> items: >>> - const: core >>> - const: bus >>> + - const: axi >>> + - const: block >>> + - const: timer >>> + >>> + rockchip,txclk-tapnum: >>> + description: Specify the number of delay for tx sampling. >>> + $ref: /schemas/types.yaml#/definitions/uint32 >> >> Constraints for this? 0 - 2^32 is okay? >> >>> + >>> >>> required: >>> - compatible >>> @@ -49,6 +62,17 @@ unevaluatedProperties: false >>> >>> examples: >>> - | >>> + mmc@fe310000 { > >>> + compatible = "rockchip,dwcmshc-sdhci"; > > compatible = "rockchip,rk3568-dwcmshc-sdhci"; ?? > >>> + reg = <0xfe310000 0x10000>; >>> + interrupts = <0 25 0x4>; >>> + clocks = <&cru 17>, <&cru 18>, <&cru 19>, <&cru 20>, <&cru 21>; >>> + clock-names = "core", "bus", "axi", "block", "timer"; >>> + bus-width = <8>; >>> + #address-cells = <1>; >>> + #size-cells = <0>; >>> + }; >>> + - | >>> mmc@aa0000 { >>> compatible = "snps,dwcmshc-sdhci"; >>> reg = <0xaa000 0x1000>; >>> -- >>> 2.7.4 >>> >>> >>> >> > > > > >
On Wed, Mar 10, 2021 at 2:37 AM Shawn Lin <shawn.lin@rock-chips.com> wrote: > > > On 2021/3/10 15:00, Johan Jonker wrote: > > On 3/10/21 4:01 AM, Rob Herring wrote: > >> On Tue, Mar 09, 2021 at 09:56:29AM +0800, Shawn Lin wrote: > >>> This patch adds rockchip support in sdhci-of-dwcmhsc.yaml > >>> > >>> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> > >>> --- > >>> > >>> Changes in v3: None > >>> > >>> .../bindings/mmc/snps,dwcmshc-sdhci.yaml | 24 ++++++++++++++++++++++ > >>> 1 file changed, 24 insertions(+) > >>> > >>> diff --git a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml > >>> index f99fb9f..43989f2 100644 > >>> --- a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml > >>> +++ b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml > >>> @@ -16,6 +16,7 @@ allOf: > >>> properties: > >>> compatible: > >>> enum: > > > >>> + - rockchip,dwcmshc-sdhci > > > > Compatible strings are supposed to be SoC orientated. > > What SoC was this change for? rk3568 ? > > Could Shawn confirm that? > > Yes. We are inclined to use this controller from now on for a > long time for up-coming SoCs. Should we tag compatible for rk3568 > specified? One of the negative things I could come up with is that we > do this for dwmmc-rockchip, but we end up doing nothing else, > except for adding new compatible string again and again in Document. Yes, you should make this SoC specific. It's one line patches if nothing else changed. > > > > - rockchip,rk3568-dwcmshc-sdhci ?? I'd shorten it to 'rockchip,rk3568-dwcmshc'. > > > > Could Rob advise here?
diff --git a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml index f99fb9f..43989f2 100644 --- a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml @@ -16,6 +16,7 @@ allOf: properties: compatible: enum: + - rockchip,dwcmshc-sdhci - snps,dwcmshc-sdhci reg: @@ -31,12 +32,24 @@ properties: items: - description: core clock - description: bus clock for optional + - description: axi clock for rockchip specified + - description: block clock for rockchip specified + - description: timer clock for rockchip specified + clock-names: minItems: 1 items: - const: core - const: bus + - const: axi + - const: block + - const: timer + + rockchip,txclk-tapnum: + description: Specify the number of delay for tx sampling. + $ref: /schemas/types.yaml#/definitions/uint32 + required: - compatible @@ -49,6 +62,17 @@ unevaluatedProperties: false examples: - | + mmc@fe310000 { + compatible = "rockchip,dwcmshc-sdhci"; + reg = <0xfe310000 0x10000>; + interrupts = <0 25 0x4>; + clocks = <&cru 17>, <&cru 18>, <&cru 19>, <&cru 20>, <&cru 21>; + clock-names = "core", "bus", "axi", "block", "timer"; + bus-width = <8>; + #address-cells = <1>; + #size-cells = <0>; + }; + - | mmc@aa0000 { compatible = "snps,dwcmshc-sdhci"; reg = <0xaa000 0x1000>;
This patch adds rockchip support in sdhci-of-dwcmhsc.yaml Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> --- Changes in v3: None .../bindings/mmc/snps,dwcmshc-sdhci.yaml | 24 ++++++++++++++++++++++ 1 file changed, 24 insertions(+)