| Message ID | 1315303120-24203-3-git-send-email-shawn.guo@linaro.org |
|---|---|
| State | New |
| Headers | show |
On Tuesday 06 September 2011 17:58:36 Shawn Guo wrote: > --- /dev/null > +++ b/arch/arm/plat-mxc/include/mach/mx6q.h > @@ -0,0 +1,29 @@ > +#ifndef __MACH_MX6Q_H__ > +#define __MACH_MX6Q_H__ > + > +/* static mappings */ > +#define IMX6Q_VA(x) (0xf4000000 + (x)) This should return a 'void __iomem *' pointer, not an integer. > +#define MX6Q_SCU_BASE_ADDR 0x00a00000 > +#define MX6Q_CCM_BASE_ADDR 0x020c4000 > +#define MX6Q_ANATOP_BASE_ADDR 0x020c8000 > +#define MX6Q_UART4_BASE_ADDR 0x021f0000 > + > +#define MX6Q_SCU_BASE_VADDR IMX6Q_VA(MX6Q_SCU_BASE_ADDR) > +#define MX6Q_CCM_BASE_VADDR IMX6Q_VA(MX6Q_CCM_BASE_ADDR) > +#define MX6Q_ANATOP_BASE_VADDR IMX6Q_VA(MX6Q_ANATOP_BASE_ADDR) > +#define MX6Q_UART4_BASE_VADDR IMX6Q_VA(MX6Q_UART4_BASE_ADDR) The list is reasonably short, but I think you can still try harder to remove some of the remaining elements. I can understand the need for UART4 (for ll_debug), but I don't really understand what the others are and why you cannot get the values from the device tree and ioremap them. Maybe you can add a few comments to explain these if they are indeed necessary. Arnd
On Tue, Sep 06, 2011 at 05:58:36PM +0800, Shawn Guo wrote: > It adds the core definitions and low-level debug uart support > for imx6q. > > Signed-off-by: Shawn Guo <shawn.guo@linaro.org> > --- > arch/arm/Kconfig | 2 +- > arch/arm/Kconfig.debug | 7 +++++ > arch/arm/Makefile | 1 + > arch/arm/mach-imx/Kconfig | 4 +++ > arch/arm/mach-imx/Makefile | 2 + > arch/arm/mach-imx/Makefile.boot | 4 +++ > arch/arm/mach-imx/lluart.c | 33 ++++++++++++++++++++++++++ > arch/arm/plat-mxc/Kconfig | 5 ++++ > arch/arm/plat-mxc/include/mach/debug-macro.S | 5 ++++ > arch/arm/plat-mxc/include/mach/entry-macro.S | 15 +++++++++++- > arch/arm/plat-mxc/include/mach/hardware.h | 1 + > arch/arm/plat-mxc/include/mach/irqs.h | 9 ++++-- > arch/arm/plat-mxc/include/mach/memory.h | 3 ++ > arch/arm/plat-mxc/include/mach/mx6q.h | 29 ++++++++++++++++++++++ > 14 files changed, 115 insertions(+), 5 deletions(-) > create mode 100644 arch/arm/mach-imx/lluart.c > create mode 100644 arch/arm/plat-mxc/include/mach/mx6q.h > > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig > index 4ea9974..37c20a4 100644 > --- a/arch/arm/Kconfig > +++ b/arch/arm/Kconfig > @@ -1348,7 +1348,7 @@ config SMP > depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \ > MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \ > ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \ > - ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE > + ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE || SOC_IMX6Q > select USE_GENERIC_SMP_HELPERS > select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP > help > diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug > index 965d59a..68fc155 100644 > --- a/arch/arm/Kconfig.debug > +++ b/arch/arm/Kconfig.debug > @@ -155,6 +155,13 @@ choice > Say Y here if you want kernel low-level debugging support > on i.MX50 or i.MX53. > > + config DEBUG_IMX6Q_UART > + bool "i.MX6Q Debug UART" > + depends on SOC_IMX6Q > + help > + Say Y here if you want kernel low-level debugging support > + on i.MX6Q. > + > config DEBUG_S3C_UART0 > depends on PLAT_SAMSUNG > bool "Use S3C UART 0 for low-level debug" > diff --git a/arch/arm/Makefile b/arch/arm/Makefile > index 70c424e..3a0bbe4 100644 > --- a/arch/arm/Makefile > +++ b/arch/arm/Makefile > @@ -159,6 +159,7 @@ machine-$(CONFIG_ARCH_MX2) := imx > machine-$(CONFIG_ARCH_MX25) := imx > machine-$(CONFIG_ARCH_MX3) := imx > machine-$(CONFIG_ARCH_MX5) := mx5 > +machine-$(CONFIG_ARCH_MX6) := imx > machine-$(CONFIG_ARCH_MXS) := mxs > machine-$(CONFIG_ARCH_NETX) := netx > machine-$(CONFIG_ARCH_NOMADIK) := nomadik > diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig > index 0519dd7..4cf5178 100644 > --- a/arch/arm/mach-imx/Kconfig > +++ b/arch/arm/mach-imx/Kconfig > @@ -58,6 +58,10 @@ config SOC_IMX35 > select ARCH_MX35 > select MXC_AVIC > > +config SOC_IMX6Q > + bool > + select ARM_GIC > + select CPU_V7 > > if ARCH_MX1 > > diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile > index e9eb36d..96ecc96 100644 > --- a/arch/arm/mach-imx/Makefile > +++ b/arch/arm/mach-imx/Makefile > @@ -61,3 +61,5 @@ obj-$(CONFIG_MACH_MX35_3DS) += mach-mx35_3ds.o > obj-$(CONFIG_MACH_EUKREA_CPUIMX35) += mach-cpuimx35.o > obj-$(CONFIG_MACH_EUKREA_MBIMXSD35_BASEBOARD) += eukrea_mbimxsd35-baseboard.o > obj-$(CONFIG_MACH_VPR200) += mach-vpr200.o > + > +obj-$(CONFIG_DEBUG_LL) += lluart.o > diff --git a/arch/arm/mach-imx/Makefile.boot b/arch/arm/mach-imx/Makefile.boot > index ebee18b..389a0e3 100644 > --- a/arch/arm/mach-imx/Makefile.boot > +++ b/arch/arm/mach-imx/Makefile.boot > @@ -17,3 +17,7 @@ initrd_phys-$(CONFIG_MACH_MX27) := 0xA0800000 > zreladdr-$(CONFIG_ARCH_MX3) := 0x80008000 > params_phys-$(CONFIG_ARCH_MX3) := 0x80000100 > initrd_phys-$(CONFIG_ARCH_MX3) := 0x80800000 > + > +zreladdr-$(CONFIG_SOC_IMX6Q) := 0x10008000 > +params_phys-$(CONFIG_SOC_IMX6Q) := 0x10000100 > +initrd_phys-$(CONFIG_SOC_IMX6Q) := 0x10800000 Do you really need params_phys and initrd_phys? > diff --git a/arch/arm/mach-imx/lluart.c b/arch/arm/mach-imx/lluart.c > new file mode 100644 > index 0000000..34205cb > --- /dev/null > +++ b/arch/arm/mach-imx/lluart.c > @@ -0,0 +1,33 @@ > +/* > + * Copyright 2011 Freescale Semiconductor, Inc. > + * Copyright 2011 Linaro Ltd. > + * > + * The code contained herein is licensed under the GNU General Public > + * License. You may obtain a copy of the GNU General Public License > + * Version 2 or later at the following locations: > + * > + * http://www.opensource.org/licenses/gpl-license.html > + * http://www.gnu.org/copyleft/gpl.html > + */ > + > +#include <linux/init.h> > +#include <asm/page.h> > +#include <asm/sizes.h> > +#include <asm/mach/map.h> > +#include <mach/hardware.h> > + > +static struct map_desc imx_lluart_desc = { > +#ifdef CONFIG_DEBUG_IMX6Q_UART > + .virtual = MX6Q_UART4_BASE_VADDR, > + .pfn = __phys_to_pfn(MX6Q_UART4_BASE_ADDR), > + .length = SZ_16K, > + .type = MT_DEVICE, > +#endif > +}; > + > +void __init imx_lluart_map_io(void) > +{ > + if (imx_lluart_desc.virtual) > + iotable_init(&imx_lluart_desc, 1); > +} I don't see yet where this is called, but I wonder what happens on a non-imx6q machine (provided it is called there). > + > diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig > index a5353fc..e548f9b 100644 > --- a/arch/arm/plat-mxc/Kconfig > +++ b/arch/arm/plat-mxc/Kconfig > @@ -48,6 +48,11 @@ config ARCH_MX51 > help > This enables support for systems based on the Freescale i.MX51 family > > +config ARCH_MX6 > + bool "i.MX6" > + help > + This enables support for systems based on the Freescale i.MX6 family > + > endchoice > > source "arch/arm/mach-imx/Kconfig" > diff --git a/arch/arm/plat-mxc/include/mach/debug-macro.S b/arch/arm/plat-mxc/include/mach/debug-macro.S > index 07cfdbe..471872a 100644 > --- a/arch/arm/plat-mxc/include/mach/debug-macro.S > +++ b/arch/arm/plat-mxc/include/mach/debug-macro.S > @@ -24,9 +24,14 @@ > #define UART_PADDR MX51_UART1_BASE_ADDR > #elif defined (CONFIG_DEBUG_IMX50_IMX53_UART) > #define UART_PADDR MX53_UART1_BASE_ADDR > +#elif defined (CONFIG_DEBUG_IMX6Q_UART) > +#define UART_PADDR MX6Q_UART4_BASE_ADDR > +#define UART_VADDR MX6Q_UART4_BASE_VADDR You cannot use the existing IMX_IO_P2V? I'd like to have a look into it to make it usable there, too. See below. > #endif > > +#ifndef UART_VADDR > #define UART_VADDR IMX_IO_ADDRESS(UART_PADDR) > +#endif > > .macro addruart, rp, rv > ldr \rp, =UART_PADDR @ physical > diff --git a/arch/arm/plat-mxc/include/mach/entry-macro.S b/arch/arm/plat-mxc/include/mach/entry-macro.S > index 066d464..341f800 100644 > --- a/arch/arm/plat-mxc/include/mach/entry-macro.S > +++ b/arch/arm/plat-mxc/include/mach/entry-macro.S > @@ -1,6 +1,6 @@ > /* > * Copyright (C) 2007 Lennert Buytenhek <buytenh@wantstofly.org> > - * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. > + * Copyright 2004-2011 Freescale Semiconductor, Inc. All Rights Reserved. > */ > > /* > @@ -11,6 +11,17 @@ > > #include <mach/hardware.h> > > +#ifdef CONFIG_ARM_GIC > +#include <asm/hardware/entry-macro-gic.S> > + > + .macro disable_fiq > + .endm > + > + .macro arch_ret_to_user, tmp1, tmp2 > + .endm > + > +#else > + hmm, this essentially means mx6 support cannot go into a kernel image for the other imx machines :-( > #define AVIC_NIMASK 0x04 > > @ this macro disables fast irq (not implemented) > @@ -78,3 +89,5 @@ > movs \irqnr, \irqnr > #endif > .endm > + > +#endif /* CONFIG_ARM_GIC */ > diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h > index a8bfd56..e1f84ce 100644 > --- a/arch/arm/plat-mxc/include/mach/hardware.h > +++ b/arch/arm/plat-mxc/include/mach/hardware.h > @@ -97,6 +97,7 @@ > > #include <mach/mxc.h> > > +#include <mach/mx6q.h> > #include <mach/mx50.h> > #include <mach/mx51.h> > #include <mach/mx53.h> > diff --git a/arch/arm/plat-mxc/include/mach/irqs.h b/arch/arm/plat-mxc/include/mach/irqs.h > index 00e812b..3ae400f 100644 > --- a/arch/arm/plat-mxc/include/mach/irqs.h > +++ b/arch/arm/plat-mxc/include/mach/irqs.h > @@ -14,12 +14,15 @@ > #include <asm-generic/gpio.h> > > /* > - * SoCs with TZIC interrupt controller have 128 IRQs, those with AVIC have 64 > + * SoCs with AVIC interrupt controller have 64 IRQs, those with TZIC > + * have 128, otherwise those with GIC have 160 IRQs. > */ > -#ifdef CONFIG_MXC_TZIC > +#if defined CONFIG_MXC_AVIC > +#define MXC_INTERNAL_IRQS 64 > +#elif defined CONFIG_MXC_TZIC > #define MXC_INTERNAL_IRQS 128 > #else > -#define MXC_INTERNAL_IRQS 64 > +#define MXC_INTERNAL_IRQS 160 > #endif This is broken. The highest number has to go to the top. Otherwise if you have an image with at least 2 of the available irq controllers your MXC_INTERNAL_IRQS is too small. > > #define MXC_GPIO_IRQ_START MXC_INTERNAL_IRQS > diff --git a/arch/arm/plat-mxc/include/mach/memory.h b/arch/arm/plat-mxc/include/mach/memory.h > index 11be5cd..2b8e186 100644 > --- a/arch/arm/plat-mxc/include/mach/memory.h > +++ b/arch/arm/plat-mxc/include/mach/memory.h > @@ -19,6 +19,7 @@ > #define MX50_PHYS_OFFSET UL(0x70000000) > #define MX51_PHYS_OFFSET UL(0x90000000) > #define MX53_PHYS_OFFSET UL(0x70000000) > +#define MX6Q_PHYS_OFFSET UL(0x10000000) > > #if !defined(CONFIG_RUNTIME_PHYS_OFFSET) > # if defined CONFIG_ARCH_MX1 > @@ -37,6 +38,8 @@ > # define PLAT_PHYS_OFFSET MX51_PHYS_OFFSET > # elif defined CONFIG_ARCH_MX53 > # define PLAT_PHYS_OFFSET MX53_PHYS_OFFSET > +# elif defined CONFIG_SOC_IMX6Q > +# define PLAT_PHYS_OFFSET MX6Q_PHYS_OFFSET > # endif > #endif > > diff --git a/arch/arm/plat-mxc/include/mach/mx6q.h b/arch/arm/plat-mxc/include/mach/mx6q.h > new file mode 100644 > index 0000000..7432310 > --- /dev/null > +++ b/arch/arm/plat-mxc/include/mach/mx6q.h > @@ -0,0 +1,29 @@ > +/* > + * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved. > + * Copyright 2011 Linaro Ltd. > + * > + * The code contained herein is licensed under the GNU General Public > + * License. You may obtain a copy of the GNU General Public License > + * Version 2 or later at the following locations: > + * > + * http://www.opensource.org/licenses/gpl-license.html > + * http://www.gnu.org/copyleft/gpl.html > + */ > + > +#ifndef __MACH_MX6Q_H__ > +#define __MACH_MX6Q_H__ > + > +/* static mappings */ > +#define IMX6Q_VA(x) (0xf4000000 + (x)) > + > +#define MX6Q_SCU_BASE_ADDR 0x00a00000 > +#define MX6Q_CCM_BASE_ADDR 0x020c4000 > +#define MX6Q_ANATOP_BASE_ADDR 0x020c8000 > +#define MX6Q_UART4_BASE_ADDR 0x021f0000 > + > +#define MX6Q_SCU_BASE_VADDR IMX6Q_VA(MX6Q_SCU_BASE_ADDR) > +#define MX6Q_CCM_BASE_VADDR IMX6Q_VA(MX6Q_CCM_BASE_ADDR) > +#define MX6Q_ANATOP_BASE_VADDR IMX6Q_VA(MX6Q_ANATOP_BASE_ADDR) > +#define MX6Q_UART4_BASE_VADDR IMX6Q_VA(MX6Q_UART4_BASE_ADDR) Depending on the sizes of these memory regions you can use the existing IMX_IO_P2V here. The conditions are: SCU_SIZE <= 0x200000 CCM_SIZE <= 0x4000 ANATOP_SIZE <= 0x28000 UART4 <= 0x100000 hmm, looking at patch 4 SCU_BASE is determined by a coprocessor instruction?! Other than that these restrictions seem to be fulfilled. Best regards Uwe > + > +#endif /* __MACH_MX6Q_H__ */ > --
On Tue, Sep 06, 2011 at 08:39:29PM +0200, Arnd Bergmann wrote: > On Tuesday 06 September 2011 17:58:36 Shawn Guo wrote: > > --- /dev/null > > +++ b/arch/arm/plat-mxc/include/mach/mx6q.h > > @@ -0,0 +1,29 @@ > > +#ifndef __MACH_MX6Q_H__ > > +#define __MACH_MX6Q_H__ > > + > > +/* static mappings */ > > +#define IMX6Q_VA(x) (0xf4000000 + (x)) > > This should return a 'void __iomem *' pointer, not an integer. > To pair the virtual address and physical address which is an integer, I chose to define the virtual address as integer too, and cast it to pointer when using it using helper macro IOMEM() defined in arch/arm/plat-mxc/include/mach/hardware.h. > > +#define MX6Q_SCU_BASE_ADDR 0x00a00000 > > +#define MX6Q_CCM_BASE_ADDR 0x020c4000 > > +#define MX6Q_ANATOP_BASE_ADDR 0x020c8000 > > +#define MX6Q_UART4_BASE_ADDR 0x021f0000 > > + > > +#define MX6Q_SCU_BASE_VADDR IMX6Q_VA(MX6Q_SCU_BASE_ADDR) > > +#define MX6Q_CCM_BASE_VADDR IMX6Q_VA(MX6Q_CCM_BASE_ADDR) > > +#define MX6Q_ANATOP_BASE_VADDR IMX6Q_VA(MX6Q_ANATOP_BASE_ADDR) > > +#define MX6Q_UART4_BASE_VADDR IMX6Q_VA(MX6Q_UART4_BASE_ADDR) > > The list is reasonably short, but I think you can still try harder to remove > some of the remaining elements. I can understand the need for UART4 > (for ll_debug), but I don't really understand what the others are and > why you cannot get the values from the device tree and ioremap them. > For SCU_BASE, the definition is actually unused, since physical base of SCU can be retrieved from coprocessor. I put them here for documentation purpose telling it's a static mapping. For CCM and ANATOP, the static mappings are used by clock code, because "struct clk" is statically defined and initialized. They can become dynamic mapping when we migrate the clock to common framework and device tree. > Maybe you can add a few comments to explain these if they are indeed > necessary. > Ok, will do.
On Tue, Sep 06, 2011 at 10:25:55PM +0200, Uwe Kleine-König wrote: > On Tue, Sep 06, 2011 at 05:58:36PM +0800, Shawn Guo wrote: > > It adds the core definitions and low-level debug uart support > > for imx6q. > > > > Signed-off-by: Shawn Guo <shawn.guo@linaro.org> > > --- > > arch/arm/Kconfig | 2 +- > > arch/arm/Kconfig.debug | 7 +++++ > > arch/arm/Makefile | 1 + > > arch/arm/mach-imx/Kconfig | 4 +++ > > arch/arm/mach-imx/Makefile | 2 + > > arch/arm/mach-imx/Makefile.boot | 4 +++ > > arch/arm/mach-imx/lluart.c | 33 ++++++++++++++++++++++++++ > > arch/arm/plat-mxc/Kconfig | 5 ++++ > > arch/arm/plat-mxc/include/mach/debug-macro.S | 5 ++++ > > arch/arm/plat-mxc/include/mach/entry-macro.S | 15 +++++++++++- > > arch/arm/plat-mxc/include/mach/hardware.h | 1 + > > arch/arm/plat-mxc/include/mach/irqs.h | 9 ++++-- > > arch/arm/plat-mxc/include/mach/memory.h | 3 ++ > > arch/arm/plat-mxc/include/mach/mx6q.h | 29 ++++++++++++++++++++++ > > 14 files changed, 115 insertions(+), 5 deletions(-) > > create mode 100644 arch/arm/mach-imx/lluart.c > > create mode 100644 arch/arm/plat-mxc/include/mach/mx6q.h > > > > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig > > index 4ea9974..37c20a4 100644 > > --- a/arch/arm/Kconfig > > +++ b/arch/arm/Kconfig > > @@ -1348,7 +1348,7 @@ config SMP > > depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \ > > MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \ > > ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \ > > - ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE > > + ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE || SOC_IMX6Q > > select USE_GENERIC_SMP_HELPERS > > select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP > > help > > diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug > > index 965d59a..68fc155 100644 > > --- a/arch/arm/Kconfig.debug > > +++ b/arch/arm/Kconfig.debug > > @@ -155,6 +155,13 @@ choice > > Say Y here if you want kernel low-level debugging support > > on i.MX50 or i.MX53. > > > > + config DEBUG_IMX6Q_UART > > + bool "i.MX6Q Debug UART" > > + depends on SOC_IMX6Q > > + help > > + Say Y here if you want kernel low-level debugging support > > + on i.MX6Q. > > + > > config DEBUG_S3C_UART0 > > depends on PLAT_SAMSUNG > > bool "Use S3C UART 0 for low-level debug" > > diff --git a/arch/arm/Makefile b/arch/arm/Makefile > > index 70c424e..3a0bbe4 100644 > > --- a/arch/arm/Makefile > > +++ b/arch/arm/Makefile > > @@ -159,6 +159,7 @@ machine-$(CONFIG_ARCH_MX2) := imx > > machine-$(CONFIG_ARCH_MX25) := imx > > machine-$(CONFIG_ARCH_MX3) := imx > > machine-$(CONFIG_ARCH_MX5) := mx5 > > +machine-$(CONFIG_ARCH_MX6) := imx > > machine-$(CONFIG_ARCH_MXS) := mxs > > machine-$(CONFIG_ARCH_NETX) := netx > > machine-$(CONFIG_ARCH_NOMADIK) := nomadik > > diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig > > index 0519dd7..4cf5178 100644 > > --- a/arch/arm/mach-imx/Kconfig > > +++ b/arch/arm/mach-imx/Kconfig > > @@ -58,6 +58,10 @@ config SOC_IMX35 > > select ARCH_MX35 > > select MXC_AVIC > > > > +config SOC_IMX6Q > > + bool > > + select ARM_GIC > > + select CPU_V7 > > > > if ARCH_MX1 > > > > diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile > > index e9eb36d..96ecc96 100644 > > --- a/arch/arm/mach-imx/Makefile > > +++ b/arch/arm/mach-imx/Makefile > > @@ -61,3 +61,5 @@ obj-$(CONFIG_MACH_MX35_3DS) += mach-mx35_3ds.o > > obj-$(CONFIG_MACH_EUKREA_CPUIMX35) += mach-cpuimx35.o > > obj-$(CONFIG_MACH_EUKREA_MBIMXSD35_BASEBOARD) += eukrea_mbimxsd35-baseboard.o > > obj-$(CONFIG_MACH_VPR200) += mach-vpr200.o > > + > > +obj-$(CONFIG_DEBUG_LL) += lluart.o > > diff --git a/arch/arm/mach-imx/Makefile.boot b/arch/arm/mach-imx/Makefile.boot > > index ebee18b..389a0e3 100644 > > --- a/arch/arm/mach-imx/Makefile.boot > > +++ b/arch/arm/mach-imx/Makefile.boot > > @@ -17,3 +17,7 @@ initrd_phys-$(CONFIG_MACH_MX27) := 0xA0800000 > > zreladdr-$(CONFIG_ARCH_MX3) := 0x80008000 > > params_phys-$(CONFIG_ARCH_MX3) := 0x80000100 > > initrd_phys-$(CONFIG_ARCH_MX3) := 0x80800000 > > + > > +zreladdr-$(CONFIG_SOC_IMX6Q) := 0x10008000 > > +params_phys-$(CONFIG_SOC_IMX6Q) := 0x10000100 > > +initrd_phys-$(CONFIG_SOC_IMX6Q) := 0x10800000 > Do you really need params_phys and initrd_phys? > I added them to make IMX6Q look consistent with other soc in the file, and leave it to a global cleanup, if we decide to clean later. > > diff --git a/arch/arm/mach-imx/lluart.c b/arch/arm/mach-imx/lluart.c > > new file mode 100644 > > index 0000000..34205cb > > --- /dev/null > > +++ b/arch/arm/mach-imx/lluart.c > > @@ -0,0 +1,33 @@ > > +/* > > + * Copyright 2011 Freescale Semiconductor, Inc. > > + * Copyright 2011 Linaro Ltd. > > + * > > + * The code contained herein is licensed under the GNU General Public > > + * License. You may obtain a copy of the GNU General Public License > > + * Version 2 or later at the following locations: > > + * > > + * http://www.opensource.org/licenses/gpl-license.html > > + * http://www.gnu.org/copyleft/gpl.html > > + */ > > + > > +#include <linux/init.h> > > +#include <asm/page.h> > > +#include <asm/sizes.h> > > +#include <asm/mach/map.h> > > +#include <mach/hardware.h> > > + > > +static struct map_desc imx_lluart_desc = { > > +#ifdef CONFIG_DEBUG_IMX6Q_UART > > + .virtual = MX6Q_UART4_BASE_VADDR, > > + .pfn = __phys_to_pfn(MX6Q_UART4_BASE_ADDR), > > + .length = SZ_16K, > > + .type = MT_DEVICE, > > +#endif > > +}; > > + > > +void __init imx_lluart_map_io(void) > > +{ > > + if (imx_lluart_desc.virtual) > > + iotable_init(&imx_lluart_desc, 1); > > +} > I don't see yet where this is called, but I wonder what happens on a > non-imx6q machine (provided it is called there). This is called by imx6q_map_io() in mach-imx6q.c. For non-imx6q machines, imx_lluart_desc will be all zero, therefore iotable_init() call will be bypassed. > > + > > diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig > > index a5353fc..e548f9b 100644 > > --- a/arch/arm/plat-mxc/Kconfig > > +++ b/arch/arm/plat-mxc/Kconfig > > @@ -48,6 +48,11 @@ config ARCH_MX51 > > help > > This enables support for systems based on the Freescale i.MX51 family > > > > +config ARCH_MX6 > > + bool "i.MX6" > > + help > > + This enables support for systems based on the Freescale i.MX6 family > > + > > endchoice > > > > source "arch/arm/mach-imx/Kconfig" > > diff --git a/arch/arm/plat-mxc/include/mach/debug-macro.S b/arch/arm/plat-mxc/include/mach/debug-macro.S > > index 07cfdbe..471872a 100644 > > --- a/arch/arm/plat-mxc/include/mach/debug-macro.S > > +++ b/arch/arm/plat-mxc/include/mach/debug-macro.S > > @@ -24,9 +24,14 @@ > > #define UART_PADDR MX51_UART1_BASE_ADDR > > #elif defined (CONFIG_DEBUG_IMX50_IMX53_UART) > > #define UART_PADDR MX53_UART1_BASE_ADDR > > +#elif defined (CONFIG_DEBUG_IMX6Q_UART) > > +#define UART_PADDR MX6Q_UART4_BASE_ADDR > > +#define UART_VADDR MX6Q_UART4_BASE_VADDR > You cannot use the existing IMX_IO_P2V? I'd like to have a look into it > to make it usable there, too. See below. > > > #endif > > > > +#ifndef UART_VADDR > > #define UART_VADDR IMX_IO_ADDRESS(UART_PADDR) > > +#endif > > > > .macro addruart, rp, rv > > ldr \rp, =UART_PADDR @ physical > > diff --git a/arch/arm/plat-mxc/include/mach/entry-macro.S b/arch/arm/plat-mxc/include/mach/entry-macro.S > > index 066d464..341f800 100644 > > --- a/arch/arm/plat-mxc/include/mach/entry-macro.S > > +++ b/arch/arm/plat-mxc/include/mach/entry-macro.S > > @@ -1,6 +1,6 @@ > > /* > > * Copyright (C) 2007 Lennert Buytenhek <buytenh@wantstofly.org> > > - * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. > > + * Copyright 2004-2011 Freescale Semiconductor, Inc. All Rights Reserved. > > */ > > > > /* > > @@ -11,6 +11,17 @@ > > > > #include <mach/hardware.h> > > > > +#ifdef CONFIG_ARM_GIC > > +#include <asm/hardware/entry-macro-gic.S> > > + > > + .macro disable_fiq > > + .endm > > + > > + .macro arch_ret_to_user, tmp1, tmp2 > > + .endm > > + > > +#else > > + > hmm, this essentially means mx6 support cannot go into a kernel image > for the other imx machines :-( > Ah, sorry. I totally forgot about this. Will fix it in the next version. > > #define AVIC_NIMASK 0x04 > > > > @ this macro disables fast irq (not implemented) > > @@ -78,3 +89,5 @@ > > movs \irqnr, \irqnr > > #endif > > .endm > > + > > +#endif /* CONFIG_ARM_GIC */ > > diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h > > index a8bfd56..e1f84ce 100644 > > --- a/arch/arm/plat-mxc/include/mach/hardware.h > > +++ b/arch/arm/plat-mxc/include/mach/hardware.h > > @@ -97,6 +97,7 @@ > > > > #include <mach/mxc.h> > > > > +#include <mach/mx6q.h> > > #include <mach/mx50.h> > > #include <mach/mx51.h> > > #include <mach/mx53.h> > > diff --git a/arch/arm/plat-mxc/include/mach/irqs.h b/arch/arm/plat-mxc/include/mach/irqs.h > > index 00e812b..3ae400f 100644 > > --- a/arch/arm/plat-mxc/include/mach/irqs.h > > +++ b/arch/arm/plat-mxc/include/mach/irqs.h > > @@ -14,12 +14,15 @@ > > #include <asm-generic/gpio.h> > > > > /* > > - * SoCs with TZIC interrupt controller have 128 IRQs, those with AVIC have 64 > > + * SoCs with AVIC interrupt controller have 64 IRQs, those with TZIC > > + * have 128, otherwise those with GIC have 160 IRQs. > > */ > > -#ifdef CONFIG_MXC_TZIC > > +#if defined CONFIG_MXC_AVIC > > +#define MXC_INTERNAL_IRQS 64 > > +#elif defined CONFIG_MXC_TZIC > > #define MXC_INTERNAL_IRQS 128 > > #else > > -#define MXC_INTERNAL_IRQS 64 > > +#define MXC_INTERNAL_IRQS 160 > > #endif > This is broken. The highest number has to go to the top. Otherwise if > you have an image with at least 2 of the available irq controllers your > MXC_INTERNAL_IRQS is too small. > Yes, this is yet another one I forgot about single image support. I should probably put some documentation about the correct order, which can be forgot by people like me. Thanks for catching this. > > > > #define MXC_GPIO_IRQ_START MXC_INTERNAL_IRQS > > diff --git a/arch/arm/plat-mxc/include/mach/memory.h b/arch/arm/plat-mxc/include/mach/memory.h > > index 11be5cd..2b8e186 100644 > > --- a/arch/arm/plat-mxc/include/mach/memory.h > > +++ b/arch/arm/plat-mxc/include/mach/memory.h > > @@ -19,6 +19,7 @@ > > #define MX50_PHYS_OFFSET UL(0x70000000) > > #define MX51_PHYS_OFFSET UL(0x90000000) > > #define MX53_PHYS_OFFSET UL(0x70000000) > > +#define MX6Q_PHYS_OFFSET UL(0x10000000) > > > > #if !defined(CONFIG_RUNTIME_PHYS_OFFSET) > > # if defined CONFIG_ARCH_MX1 > > @@ -37,6 +38,8 @@ > > # define PLAT_PHYS_OFFSET MX51_PHYS_OFFSET > > # elif defined CONFIG_ARCH_MX53 > > # define PLAT_PHYS_OFFSET MX53_PHYS_OFFSET > > +# elif defined CONFIG_SOC_IMX6Q > > +# define PLAT_PHYS_OFFSET MX6Q_PHYS_OFFSET > > # endif > > #endif > > > > diff --git a/arch/arm/plat-mxc/include/mach/mx6q.h b/arch/arm/plat-mxc/include/mach/mx6q.h > > new file mode 100644 > > index 0000000..7432310 > > --- /dev/null > > +++ b/arch/arm/plat-mxc/include/mach/mx6q.h > > @@ -0,0 +1,29 @@ > > +/* > > + * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved. > > + * Copyright 2011 Linaro Ltd. > > + * > > + * The code contained herein is licensed under the GNU General Public > > + * License. You may obtain a copy of the GNU General Public License > > + * Version 2 or later at the following locations: > > + * > > + * http://www.opensource.org/licenses/gpl-license.html > > + * http://www.gnu.org/copyleft/gpl.html > > + */ > > + > > +#ifndef __MACH_MX6Q_H__ > > +#define __MACH_MX6Q_H__ > > + > > +/* static mappings */ > > +#define IMX6Q_VA(x) (0xf4000000 + (x)) > > + > > +#define MX6Q_SCU_BASE_ADDR 0x00a00000 > > +#define MX6Q_CCM_BASE_ADDR 0x020c4000 > > +#define MX6Q_ANATOP_BASE_ADDR 0x020c8000 > > +#define MX6Q_UART4_BASE_ADDR 0x021f0000 > > + > > +#define MX6Q_SCU_BASE_VADDR IMX6Q_VA(MX6Q_SCU_BASE_ADDR) > > +#define MX6Q_CCM_BASE_VADDR IMX6Q_VA(MX6Q_CCM_BASE_ADDR) > > +#define MX6Q_ANATOP_BASE_VADDR IMX6Q_VA(MX6Q_ANATOP_BASE_ADDR) > > +#define MX6Q_UART4_BASE_VADDR IMX6Q_VA(MX6Q_UART4_BASE_ADDR) > Depending on the sizes of these memory regions you can use the existing > IMX_IO_P2V here. The conditions are: > > SCU_SIZE <= 0x200000 > CCM_SIZE <= 0x4000 > ANATOP_SIZE <= 0x28000 > UART4 <= 0x100000 > This is exactly what I dislike about IMX_IO_P2V(). We have to verify all these conditions manually. Looking at the static mapping below (copied from arch/arm/plat-mxc/include/mach/hardware.h), do you think it's really scalable and easy to maintain for the long run? /* * This is rather complicated for humans and ugly to verify, but for a machine * it's OK. Still more as it is usually only applied to constants. The upsides * on using this approach are: * * - same mapping on all i.MX machines * - works for assembler, too * - no need to nurture #defines for virtual addresses * * The downside it, it's hard to verify (but I have a script for that). * * Obviously this needs to be injective for each SoC. In general it maps the * whole address space to [0xf4000000, 0xf5ffffff]. So [0xf6000000,0xfeffffff] * is free for per-machine use (e.g. KZM_ARM11_01 uses 64MiB there). * * It applies the following mappings for the different SoCs: * * mx1: * IO 0x00200000+0x100000 -> 0xf4000000+0x100000 * mx21: * AIPI 0x10000000+0x100000 -> 0xf4400000+0x100000 * SAHB1 0x80000000+0x100000 -> 0xf4000000+0x100000 * X_MEMC 0xdf000000+0x004000 -> 0xf5f00000+0x004000 * mx25: * AIPS1 0x43f00000+0x100000 -> 0xf5300000+0x100000 * AIPS2 0x53f00000+0x100000 -> 0xf5700000+0x100000 * AVIC 0x68000000+0x100000 -> 0xf5800000+0x100000 * mx27: * AIPI 0x10000000+0x100000 -> 0xf4400000+0x100000 * SAHB1 0x80000000+0x100000 -> 0xf4000000+0x100000 * X_MEMC 0xd8000000+0x100000 -> 0xf5c00000+0x100000 * mx31: * AIPS1 0x43f00000+0x100000 -> 0xf5300000+0x100000 * AIPS2 0x53f00000+0x100000 -> 0xf5700000+0x100000 * AVIC 0x68000000+0x100000 -> 0xf5800000+0x100000 * X_MEMC 0xb8000000+0x010000 -> 0xf4c00000+0x010000 * SPBA0 0x50000000+0x100000 -> 0xf5400000+0x100000 * mx35: * AIPS1 0x43f00000+0x100000 -> 0xf5300000+0x100000 * AIPS2 0x53f00000+0x100000 -> 0xf5700000+0x100000 * AVIC 0x68000000+0x100000 -> 0xf5800000+0x100000 * X_MEMC 0xb8000000+0x010000 -> 0xf4c00000+0x010000 * SPBA0 0x50000000+0x100000 -> 0xf5400000+0x100000 * mx50: * TZIC 0x0fffc000+0x004000 -> 0xf4bfc000+0x004000 * SPBA0 0x50000000+0x100000 -> 0xf5400000+0x100000 * AIPS1 0x53f00000+0x100000 -> 0xf5700000+0x100000 * AIPS2 0x63f00000+0x100000 -> 0xf5300000+0x100000 * mx51: * IRAM 0x1ffe0000+0x020000 -> 0xf4fe0000+0x020000 * DEBUG 0x60000000+0x100000 -> 0xf5000000+0x100000 * SPBA0 0x70000000+0x100000 -> 0xf5400000+0x100000 * AIPS1 0x73f00000+0x100000 -> 0xf5700000+0x100000 * AIPS2 0x83f00000+0x100000 -> 0xf4300000+0x100000 */ #define IMX_IO_P2V(x) ( \ 0xf4000000 + \ (((x) & 0x50000000) >> 6) + \ (((x) & 0x0b000000) >> 4) + \ (((x) & 0x000fffff))) > hmm, looking at patch 4 SCU_BASE is determined by a coprocessor > instruction?! Ah, yes. The SCU physical base address can be retrieved from coprocessor. Regards, Shawn > Other than that these restrictions seem to be fulfilled. >
On Wed, Sep 07, 2011 at 07:00:02PM +0800, Shawn Guo wrote: > On Tue, Sep 06, 2011 at 10:25:55PM +0200, Uwe Kleine-König wrote: > > On Tue, Sep 06, 2011 at 05:58:36PM +0800, Shawn Guo wrote: > > > It adds the core definitions and low-level debug uart support > > > for imx6q. > > > > > > Signed-off-by: Shawn Guo <shawn.guo@linaro.org> > > > --- > > > arch/arm/Kconfig | 2 +- > > > arch/arm/Kconfig.debug | 7 +++++ > > > arch/arm/Makefile | 1 + > > > arch/arm/mach-imx/Kconfig | 4 +++ > > > arch/arm/mach-imx/Makefile | 2 + > > > arch/arm/mach-imx/Makefile.boot | 4 +++ > > > arch/arm/mach-imx/lluart.c | 33 ++++++++++++++++++++++++++ > > > arch/arm/plat-mxc/Kconfig | 5 ++++ > > > arch/arm/plat-mxc/include/mach/debug-macro.S | 5 ++++ > > > arch/arm/plat-mxc/include/mach/entry-macro.S | 15 +++++++++++- > > > arch/arm/plat-mxc/include/mach/hardware.h | 1 + > > > arch/arm/plat-mxc/include/mach/irqs.h | 9 ++++-- > > > arch/arm/plat-mxc/include/mach/memory.h | 3 ++ > > > arch/arm/plat-mxc/include/mach/mx6q.h | 29 ++++++++++++++++++++++ > > > 14 files changed, 115 insertions(+), 5 deletions(-) > > > create mode 100644 arch/arm/mach-imx/lluart.c > > > create mode 100644 arch/arm/plat-mxc/include/mach/mx6q.h > > > > > > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig > > > index 4ea9974..37c20a4 100644 > > > --- a/arch/arm/Kconfig > > > +++ b/arch/arm/Kconfig > > > @@ -1348,7 +1348,7 @@ config SMP > > > depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \ > > > MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \ > > > ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \ > > > - ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE > > > + ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE || SOC_IMX6Q > > > select USE_GENERIC_SMP_HELPERS > > > select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP > > > help > > > diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug > > > index 965d59a..68fc155 100644 > > > --- a/arch/arm/Kconfig.debug > > > +++ b/arch/arm/Kconfig.debug > > > @@ -155,6 +155,13 @@ choice > > > Say Y here if you want kernel low-level debugging support > > > on i.MX50 or i.MX53. > > > > > > + config DEBUG_IMX6Q_UART > > > + bool "i.MX6Q Debug UART" > > > + depends on SOC_IMX6Q > > > + help > > > + Say Y here if you want kernel low-level debugging support > > > + on i.MX6Q. > > > + > > > config DEBUG_S3C_UART0 > > > depends on PLAT_SAMSUNG > > > bool "Use S3C UART 0 for low-level debug" > > > diff --git a/arch/arm/Makefile b/arch/arm/Makefile > > > index 70c424e..3a0bbe4 100644 > > > --- a/arch/arm/Makefile > > > +++ b/arch/arm/Makefile > > > @@ -159,6 +159,7 @@ machine-$(CONFIG_ARCH_MX2) := imx > > > machine-$(CONFIG_ARCH_MX25) := imx > > > machine-$(CONFIG_ARCH_MX3) := imx > > > machine-$(CONFIG_ARCH_MX5) := mx5 > > > +machine-$(CONFIG_ARCH_MX6) := imx > > > machine-$(CONFIG_ARCH_MXS) := mxs > > > machine-$(CONFIG_ARCH_NETX) := netx > > > machine-$(CONFIG_ARCH_NOMADIK) := nomadik > > > diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig > > > index 0519dd7..4cf5178 100644 > > > --- a/arch/arm/mach-imx/Kconfig > > > +++ b/arch/arm/mach-imx/Kconfig > > > @@ -58,6 +58,10 @@ config SOC_IMX35 > > > select ARCH_MX35 > > > select MXC_AVIC > > > > > > +config SOC_IMX6Q > > > + bool > > > + select ARM_GIC > > > + select CPU_V7 > > > > > > if ARCH_MX1 > > > > > > diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile > > > index e9eb36d..96ecc96 100644 > > > --- a/arch/arm/mach-imx/Makefile > > > +++ b/arch/arm/mach-imx/Makefile > > > @@ -61,3 +61,5 @@ obj-$(CONFIG_MACH_MX35_3DS) += mach-mx35_3ds.o > > > obj-$(CONFIG_MACH_EUKREA_CPUIMX35) += mach-cpuimx35.o > > > obj-$(CONFIG_MACH_EUKREA_MBIMXSD35_BASEBOARD) += eukrea_mbimxsd35-baseboard.o > > > obj-$(CONFIG_MACH_VPR200) += mach-vpr200.o > > > + > > > +obj-$(CONFIG_DEBUG_LL) += lluart.o > > > diff --git a/arch/arm/mach-imx/Makefile.boot b/arch/arm/mach-imx/Makefile.boot > > > index ebee18b..389a0e3 100644 > > > --- a/arch/arm/mach-imx/Makefile.boot > > > +++ b/arch/arm/mach-imx/Makefile.boot > > > @@ -17,3 +17,7 @@ initrd_phys-$(CONFIG_MACH_MX27) := 0xA0800000 > > > zreladdr-$(CONFIG_ARCH_MX3) := 0x80008000 > > > params_phys-$(CONFIG_ARCH_MX3) := 0x80000100 > > > initrd_phys-$(CONFIG_ARCH_MX3) := 0x80800000 > > > + > > > +zreladdr-$(CONFIG_SOC_IMX6Q) := 0x10008000 > > > +params_phys-$(CONFIG_SOC_IMX6Q) := 0x10000100 > > > +initrd_phys-$(CONFIG_SOC_IMX6Q) := 0x10800000 > > Do you really need params_phys and initrd_phys? > > > I added them to make IMX6Q look consistent with other soc in the file, > and leave it to a global cleanup, if we decide to clean later. If you ask me don't do that. Better do it for imx6q as clean as possible. > > > diff --git a/arch/arm/mach-imx/lluart.c b/arch/arm/mach-imx/lluart.c > > > new file mode 100644 > > > index 0000000..34205cb > > > --- /dev/null > > > +++ b/arch/arm/mach-imx/lluart.c > > > @@ -0,0 +1,33 @@ > > > +/* > > > + * Copyright 2011 Freescale Semiconductor, Inc. > > > + * Copyright 2011 Linaro Ltd. > > > + * > > > + * The code contained herein is licensed under the GNU General Public > > > + * License. You may obtain a copy of the GNU General Public License > > > + * Version 2 or later at the following locations: > > > + * > > > + * http://www.opensource.org/licenses/gpl-license.html > > > + * http://www.gnu.org/copyleft/gpl.html > > > + */ > > > + > > > +#include <linux/init.h> > > > +#include <asm/page.h> > > > +#include <asm/sizes.h> > > > +#include <asm/mach/map.h> > > > +#include <mach/hardware.h> > > > + > > > +static struct map_desc imx_lluart_desc = { > > > +#ifdef CONFIG_DEBUG_IMX6Q_UART > > > + .virtual = MX6Q_UART4_BASE_VADDR, > > > + .pfn = __phys_to_pfn(MX6Q_UART4_BASE_ADDR), > > > + .length = SZ_16K, > > > + .type = MT_DEVICE, > > > +#endif > > > +}; > > > + > > > +void __init imx_lluart_map_io(void) > > > +{ > > > + if (imx_lluart_desc.virtual) > > > + iotable_init(&imx_lluart_desc, 1); > > > +} > > I don't see yet where this is called, but I wonder what happens on a > > non-imx6q machine (provided it is called there). > > This is called by imx6q_map_io() in mach-imx6q.c. For non-imx6q > machines, imx_lluart_desc will be all zero, But only if the image doesn't support imx6q, right? Anyhow, I hope imx6q_map_io isn't called for pre-imx6q SoCs. Ah, and I hope we don't need to argue here as Russell doesn't like the new DEBUG_LL changes :-) > therefore iotable_init() > call will be bypassed. > > > > + > > > diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig > > > index a5353fc..e548f9b 100644 > > > --- a/arch/arm/plat-mxc/Kconfig > > > +++ b/arch/arm/plat-mxc/Kconfig > > > @@ -48,6 +48,11 @@ config ARCH_MX51 > > > help > > > This enables support for systems based on the Freescale i.MX51 family > > > > > > +config ARCH_MX6 > > > + bool "i.MX6" > > > + help > > > + This enables support for systems based on the Freescale i.MX6 family > > > + > > > endchoice > > > > > > source "arch/arm/mach-imx/Kconfig" > > > diff --git a/arch/arm/plat-mxc/include/mach/debug-macro.S b/arch/arm/plat-mxc/include/mach/debug-macro.S > > > index 07cfdbe..471872a 100644 > > > --- a/arch/arm/plat-mxc/include/mach/debug-macro.S > > > +++ b/arch/arm/plat-mxc/include/mach/debug-macro.S > > > @@ -24,9 +24,14 @@ > > > #define UART_PADDR MX51_UART1_BASE_ADDR > > > #elif defined (CONFIG_DEBUG_IMX50_IMX53_UART) > > > #define UART_PADDR MX53_UART1_BASE_ADDR > > > +#elif defined (CONFIG_DEBUG_IMX6Q_UART) > > > +#define UART_PADDR MX6Q_UART4_BASE_ADDR > > > +#define UART_VADDR MX6Q_UART4_BASE_VADDR > > You cannot use the existing IMX_IO_P2V? I'd like to have a look into it > > to make it usable there, too. See below. > > > > > #endif > > > > > > +#ifndef UART_VADDR > > > #define UART_VADDR IMX_IO_ADDRESS(UART_PADDR) > > > +#endif > > > > > > .macro addruart, rp, rv > > > ldr \rp, =UART_PADDR @ physical > > > diff --git a/arch/arm/plat-mxc/include/mach/entry-macro.S b/arch/arm/plat-mxc/include/mach/entry-macro.S > > > index 066d464..341f800 100644 > > > --- a/arch/arm/plat-mxc/include/mach/entry-macro.S > > > +++ b/arch/arm/plat-mxc/include/mach/entry-macro.S > > > @@ -1,6 +1,6 @@ > > > /* > > > * Copyright (C) 2007 Lennert Buytenhek <buytenh@wantstofly.org> > > > - * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. > > > + * Copyright 2004-2011 Freescale Semiconductor, Inc. All Rights Reserved. > > > */ > > > > > > /* > > > @@ -11,6 +11,17 @@ > > > > > > #include <mach/hardware.h> > > > > > > +#ifdef CONFIG_ARM_GIC > > > +#include <asm/hardware/entry-macro-gic.S> > > > + > > > + .macro disable_fiq > > > + .endm > > > + > > > + .macro arch_ret_to_user, tmp1, tmp2 > > > + .endm > > > + > > > +#else > > > + > > hmm, this essentially means mx6 support cannot go into a kernel image > > for the other imx machines :-( > > > Ah, sorry. I totally forgot about this. Will fix it in the next > version. > > > > #define AVIC_NIMASK 0x04 > > > > > > @ this macro disables fast irq (not implemented) > > > @@ -78,3 +89,5 @@ > > > movs \irqnr, \irqnr > > > #endif > > > .endm > > > + > > > +#endif /* CONFIG_ARM_GIC */ > > > diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h > > > index a8bfd56..e1f84ce 100644 > > > --- a/arch/arm/plat-mxc/include/mach/hardware.h > > > +++ b/arch/arm/plat-mxc/include/mach/hardware.h > > > @@ -97,6 +97,7 @@ > > > > > > #include <mach/mxc.h> > > > > > > +#include <mach/mx6q.h> > > > #include <mach/mx50.h> > > > #include <mach/mx51.h> > > > #include <mach/mx53.h> > > > diff --git a/arch/arm/plat-mxc/include/mach/irqs.h b/arch/arm/plat-mxc/include/mach/irqs.h > > > index 00e812b..3ae400f 100644 > > > --- a/arch/arm/plat-mxc/include/mach/irqs.h > > > +++ b/arch/arm/plat-mxc/include/mach/irqs.h > > > @@ -14,12 +14,15 @@ > > > #include <asm-generic/gpio.h> > > > > > > /* > > > - * SoCs with TZIC interrupt controller have 128 IRQs, those with AVIC have 64 > > > + * SoCs with AVIC interrupt controller have 64 IRQs, those with TZIC > > > + * have 128, otherwise those with GIC have 160 IRQs. > > > */ > > > -#ifdef CONFIG_MXC_TZIC > > > +#if defined CONFIG_MXC_AVIC > > > +#define MXC_INTERNAL_IRQS 64 > > > +#elif defined CONFIG_MXC_TZIC > > > #define MXC_INTERNAL_IRQS 128 > > > #else > > > -#define MXC_INTERNAL_IRQS 64 > > > +#define MXC_INTERNAL_IRQS 160 > > > #endif > > This is broken. The highest number has to go to the top. Otherwise if > > you have an image with at least 2 of the available irq controllers your > > MXC_INTERNAL_IRQS is too small. > > > Yes, this is yet another one I forgot about single image support. > I should probably put some documentation about the correct order, > which can be forgot by people like me. Maybe just introduce a corresponding comment when you touch this part of code anyhow?! > > > #define MXC_GPIO_IRQ_START MXC_INTERNAL_IRQS > > > diff --git a/arch/arm/plat-mxc/include/mach/memory.h b/arch/arm/plat-mxc/include/mach/memory.h > > > index 11be5cd..2b8e186 100644 > > > --- a/arch/arm/plat-mxc/include/mach/memory.h > > > +++ b/arch/arm/plat-mxc/include/mach/memory.h > > > @@ -19,6 +19,7 @@ > > > #define MX50_PHYS_OFFSET UL(0x70000000) > > > #define MX51_PHYS_OFFSET UL(0x90000000) > > > #define MX53_PHYS_OFFSET UL(0x70000000) > > > +#define MX6Q_PHYS_OFFSET UL(0x10000000) > > > > > > #if !defined(CONFIG_RUNTIME_PHYS_OFFSET) > > > # if defined CONFIG_ARCH_MX1 > > > @@ -37,6 +38,8 @@ > > > # define PLAT_PHYS_OFFSET MX51_PHYS_OFFSET > > > # elif defined CONFIG_ARCH_MX53 > > > # define PLAT_PHYS_OFFSET MX53_PHYS_OFFSET > > > +# elif defined CONFIG_SOC_IMX6Q > > > +# define PLAT_PHYS_OFFSET MX6Q_PHYS_OFFSET > > > # endif > > > #endif > > > > > > diff --git a/arch/arm/plat-mxc/include/mach/mx6q.h b/arch/arm/plat-mxc/include/mach/mx6q.h > > > new file mode 100644 > > > index 0000000..7432310 > > > --- /dev/null > > > +++ b/arch/arm/plat-mxc/include/mach/mx6q.h > > > @@ -0,0 +1,29 @@ > > > +/* > > > + * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved. > > > + * Copyright 2011 Linaro Ltd. > > > + * > > > + * The code contained herein is licensed under the GNU General Public > > > + * License. You may obtain a copy of the GNU General Public License > > > + * Version 2 or later at the following locations: > > > + * > > > + * http://www.opensource.org/licenses/gpl-license.html > > > + * http://www.gnu.org/copyleft/gpl.html > > > + */ > > > + > > > +#ifndef __MACH_MX6Q_H__ > > > +#define __MACH_MX6Q_H__ > > > + > > > +/* static mappings */ > > > +#define IMX6Q_VA(x) (0xf4000000 + (x)) > > > + > > > +#define MX6Q_SCU_BASE_ADDR 0x00a00000 > > > +#define MX6Q_CCM_BASE_ADDR 0x020c4000 > > > +#define MX6Q_ANATOP_BASE_ADDR 0x020c8000 > > > +#define MX6Q_UART4_BASE_ADDR 0x021f0000 > > > + > > > +#define MX6Q_SCU_BASE_VADDR IMX6Q_VA(MX6Q_SCU_BASE_ADDR) > > > +#define MX6Q_CCM_BASE_VADDR IMX6Q_VA(MX6Q_CCM_BASE_ADDR) > > > +#define MX6Q_ANATOP_BASE_VADDR IMX6Q_VA(MX6Q_ANATOP_BASE_ADDR) > > > +#define MX6Q_UART4_BASE_VADDR IMX6Q_VA(MX6Q_UART4_BASE_ADDR) > > Depending on the sizes of these memory regions you can use the existing > > IMX_IO_P2V here. The conditions are: > > > > SCU_SIZE <= 0x200000 Actually this should be 0x100000 as this is the size that is mapped in a continous chunk. > > CCM_SIZE <= 0x4000 > > ANATOP_SIZE <= 0x28000 > > UART4 <= 0x100000 > > > This is exactly what I dislike about IMX_IO_P2V(). We have to verify > all these conditions manually. Looking at the static mapping below I did it semi-manual, I just put your constants for imx6q into my script (all with size=0x4000 for now) and it told me: ... * mx6q: * SCU 0x00a00000+0x004000 -> 0xf4000000+0x004000 * CCM 0x020c4000+0x004000 -> 0xf42c4000+0x004000 * ANATOP 0x020c8000+0x004000 -> 0xf42c8000+0x004000 * UART4 0x021f0000+0x004000 -> 0xf42f0000+0x004000 ... > (copied from arch/arm/plat-mxc/include/mach/hardware.h), do you think > it's really scalable and easy to maintain for the long run? At least it provides a way to verify the correctness of the mapping. Before I introduced the mapping function there was a conflict IIRC. > /* > * This is rather complicated for humans and ugly to verify, but for a machine > * it's OK. Still more as it is usually only applied to constants. The upsides > * on using this approach are: > * > * - same mapping on all i.MX machines > * - works for assembler, too > * - no need to nurture #defines for virtual addresses > * > * The downside it, it's hard to verify (but I have a script for that). If you want I can provide you that script. > * Obviously this needs to be injective for each SoC. In general it maps the > * whole address space to [0xf4000000, 0xf5ffffff]. So [0xf6000000,0xfeffffff] > * is free for per-machine use (e.g. KZM_ARM11_01 uses 64MiB there). > * > * It applies the following mappings for the different SoCs: > * > * mx1: > * IO 0x00200000+0x100000 -> 0xf4000000+0x100000 > * mx21: > * AIPI 0x10000000+0x100000 -> 0xf4400000+0x100000 > * SAHB1 0x80000000+0x100000 -> 0xf4000000+0x100000 > * X_MEMC 0xdf000000+0x004000 -> 0xf5f00000+0x004000 > * mx25: > * AIPS1 0x43f00000+0x100000 -> 0xf5300000+0x100000 > * AIPS2 0x53f00000+0x100000 -> 0xf5700000+0x100000 > * AVIC 0x68000000+0x100000 -> 0xf5800000+0x100000 > * mx27: > * AIPI 0x10000000+0x100000 -> 0xf4400000+0x100000 > * SAHB1 0x80000000+0x100000 -> 0xf4000000+0x100000 > * X_MEMC 0xd8000000+0x100000 -> 0xf5c00000+0x100000 > * mx31: > * AIPS1 0x43f00000+0x100000 -> 0xf5300000+0x100000 > * AIPS2 0x53f00000+0x100000 -> 0xf5700000+0x100000 > * AVIC 0x68000000+0x100000 -> 0xf5800000+0x100000 > * X_MEMC 0xb8000000+0x010000 -> 0xf4c00000+0x010000 > * SPBA0 0x50000000+0x100000 -> 0xf5400000+0x100000 > * mx35: > * AIPS1 0x43f00000+0x100000 -> 0xf5300000+0x100000 > * AIPS2 0x53f00000+0x100000 -> 0xf5700000+0x100000 > * AVIC 0x68000000+0x100000 -> 0xf5800000+0x100000 > * X_MEMC 0xb8000000+0x010000 -> 0xf4c00000+0x010000 > * SPBA0 0x50000000+0x100000 -> 0xf5400000+0x100000 > * mx50: > * TZIC 0x0fffc000+0x004000 -> 0xf4bfc000+0x004000 > * SPBA0 0x50000000+0x100000 -> 0xf5400000+0x100000 > * AIPS1 0x53f00000+0x100000 -> 0xf5700000+0x100000 > * AIPS2 0x63f00000+0x100000 -> 0xf5300000+0x100000 > * mx51: > * IRAM 0x1ffe0000+0x020000 -> 0xf4fe0000+0x020000 > * DEBUG 0x60000000+0x100000 -> 0xf5000000+0x100000 > * SPBA0 0x70000000+0x100000 -> 0xf5400000+0x100000 > * AIPS1 0x73f00000+0x100000 -> 0xf5700000+0x100000 > * AIPS2 0x83f00000+0x100000 -> 0xf4300000+0x100000 > */ > #define IMX_IO_P2V(x) ( \ > 0xf4000000 + \ > (((x) & 0x50000000) >> 6) + \ > (((x) & 0x0b000000) >> 4) + \ > (((x) & 0x000fffff))) > > > hmm, looking at patch 4 SCU_BASE is determined by a coprocessor > > instruction?! > > Ah, yes. The SCU physical base address can be retrieved from > coprocessor. Is there an advantage in autodetecting the base address? Best regards Uwe
On Wed, Sep 07, 2011 at 02:36:35PM +0200, Uwe Kleine-König wrote: > But only if the image doesn't support imx6q, right? Anyhow, I hope > imx6q_map_io isn't called for pre-imx6q SoCs. Ah, and I hope we don't > need to argue here as Russell doesn't like the new DEBUG_LL changes :-) I have no problem with the Kconfig menu approach or existing approaches to DEBUG_LL. What I have an objection to is trying to stuff the information for it into places which ultimately render the facility useless for its intended purpose - to permit debugging the _really_ _early_ assembly code. That is what it was written for: if we introduce complicated ways to put behind it, we'll need to come up with a completely new debugging infrastructure to debug the now buggered debugging infrastructure. And then people will want to do the same to the debug debugging infrastructure. Then we'll have to invent the debug debugging debugging infrastructure. Repeat until you've nested it a million times. It's supposed to be _simple_ and _obviously_ correct so that it _works_ with minimal fuss. Making it complicated by picking out information from device trees will kill that, and at that point its not worth keeping around anymore. Let me give you an instance: your kernel doesn't boot. Early printk doesn't work. You want to find out if control is even getting to the very first instruction in head.S. You can do that with DEBUG_LL as it stands today because we know exactly where the serial port is supposed to be. If you have to pick the DEBUG_LL information out of a DT, you can no longer do that - you first have to obtain the pointer to DT, and then parse the DT table to find out where the hell the port is. What if the reason your kernel isn't booting is because the DT pointer is wrong? What if the reason your kernel isn't booting is because the information contained within DT is wrong? How do you debug that? You probably end up having to write your own debugging infrastructure using a fixed address for the port. Congratulations - you just reinvented what DEBUG_LL was designed to be doing before someone came along and totally buggered it up. The fact that DEBUG_LL is hard-coded to a certain port address is one of its strongest points. It means that if you know that the port address is correct (which is a matter of looking at the SoCs data sheets and confirming that the hex digits match) then you can be reasonably sure that you're going to get some output from it. No need to wonder "Is the DT pointer correct? Are we parsing DT properly?" etc. So, either we keep it in its current form or we throw it out from mainline entirely and I keep it as a separate add-on patch for those who want to use it.
On Wed, 7 Sep 2011, Russell King - ARM Linux wrote: > On Wed, Sep 07, 2011 at 02:36:35PM +0200, Uwe Kleine-König wrote: > > But only if the image doesn't support imx6q, right? Anyhow, I hope > > imx6q_map_io isn't called for pre-imx6q SoCs. Ah, and I hope we don't > > need to argue here as Russell doesn't like the new DEBUG_LL changes :-) > > I have no problem with the Kconfig menu approach or existing approaches > to DEBUG_LL. What I have an objection to is trying to stuff the > information for it into places which ultimately render the facility > useless for its intended purpose - to permit debugging the _really_ > _early_ assembly code. > > That is what it was written for: if we introduce complicated ways to > put behind it, we'll need to come up with a completely new debugging > infrastructure to debug the now buggered debugging infrastructure. For the record I now agree with Russell. In order to have early serial output that works across multiple SOCs in the same kernel image intended to non developers we'll have to add a parallel infrastructure. Keeping the DEBUG_LL code as simple as possible for developers is the way to go (and that might be needed to debug that parallel infrastructure). Nicolas
On Wednesday 07 September 2011, Nicolas Pitre wrote: > On Wed, 7 Sep 2011, Russell King - ARM Linux wrote: > > > On Wed, Sep 07, 2011 at 02:36:35PM +0200, Uwe Kleine-König wrote: > > > But only if the image doesn't support imx6q, right? Anyhow, I hope > > > imx6q_map_io isn't called for pre-imx6q SoCs. Ah, and I hope we don't > > > need to argue here as Russell doesn't like the new DEBUG_LL changes :-) > > > > I have no problem with the Kconfig menu approach or existing approaches > > to DEBUG_LL. What I have an objection to is trying to stuff the > > information for it into places which ultimately render the facility > > useless for its intended purpose - to permit debugging the really > > early assembly code. > > > > That is what it was written for: if we introduce complicated ways to > > put behind it, we'll need to come up with a completely new debugging > > infrastructure to debug the now buggered debugging infrastructure. > > For the record I now agree with Russell. > > In order to have early serial output that works across multiple SOCs in > the same kernel image intended to non developers we'll have to add a > parallel infrastructure. Keeping the DEBUG_LL code as simple as > possible for developers is the way to go (and that might be needed to > debug that parallel infrastructure). Yes, agreed. It should not be too hard to provide more CON_BOOT consoles. For 8250, this can actually be done already using the code from drivers/tty/serial/8250_early.c with a custom command line, but there are better ways to do that in a generic way. Arnd
* Arnd Bergmann <arnd@arndb.de> [110908 07:23]: > On Wednesday 07 September 2011, Nicolas Pitre wrote: > > On Wed, 7 Sep 2011, Russell King - ARM Linux wrote: > > > > > On Wed, Sep 07, 2011 at 02:36:35PM +0200, Uwe Kleine-König wrote: > > > > But only if the image doesn't support imx6q, right? Anyhow, I hope > > > > imx6q_map_io isn't called for pre-imx6q SoCs. Ah, and I hope we don't > > > > need to argue here as Russell doesn't like the new DEBUG_LL changes :-) > > > > > > I have no problem with the Kconfig menu approach or existing approaches > > > to DEBUG_LL. What I have an objection to is trying to stuff the > > > information for it into places which ultimately render the facility > > > useless for its intended purpose - to permit debugging the really > > > early assembly code. > > > > > > That is what it was written for: if we introduce complicated ways to > > > put behind it, we'll need to come up with a completely new debugging > > > infrastructure to debug the now buggered debugging infrastructure. > > > > For the record I now agree with Russell. > > > > In order to have early serial output that works across multiple SOCs in > > the same kernel image intended to non developers we'll have to add a > > parallel infrastructure. Keeping the DEBUG_LL code as simple as > > possible for developers is the way to go (and that might be needed to > > debug that parallel infrastructure). > > Yes, agreed. It should not be too hard to provide more CON_BOOT consoles. > For 8250, this can actually be done already using the code from > drivers/tty/serial/8250_early.c with a custom command line, but there > are better ways to do that in a generic way. Sounds good to me. Regards, Tony
On Wed, Sep 07, 2011 at 02:36:35PM +0200, Uwe Kleine-König wrote: > On Wed, Sep 07, 2011 at 07:00:02PM +0800, Shawn Guo wrote: > > On Tue, Sep 06, 2011 at 10:25:55PM +0200, Uwe Kleine-König wrote: > > > On Tue, Sep 06, 2011 at 05:58:36PM +0800, Shawn Guo wrote: [...] > > > > diff --git a/arch/arm/plat-mxc/include/mach/mx6q.h b/arch/arm/plat-mxc/include/mach/mx6q.h > > > > new file mode 100644 > > > > index 0000000..7432310 > > > > --- /dev/null > > > > +++ b/arch/arm/plat-mxc/include/mach/mx6q.h > > > > @@ -0,0 +1,29 @@ > > > > +/* > > > > + * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved. > > > > + * Copyright 2011 Linaro Ltd. > > > > + * > > > > + * The code contained herein is licensed under the GNU General Public > > > > + * License. You may obtain a copy of the GNU General Public License > > > > + * Version 2 or later at the following locations: > > > > + * > > > > + * http://www.opensource.org/licenses/gpl-license.html > > > > + * http://www.gnu.org/copyleft/gpl.html > > > > + */ > > > > + > > > > +#ifndef __MACH_MX6Q_H__ > > > > +#define __MACH_MX6Q_H__ > > > > + > > > > +/* static mappings */ > > > > +#define IMX6Q_VA(x) (0xf4000000 + (x)) > > > > + > > > > +#define MX6Q_SCU_BASE_ADDR 0x00a00000 > > > > +#define MX6Q_CCM_BASE_ADDR 0x020c4000 > > > > +#define MX6Q_ANATOP_BASE_ADDR 0x020c8000 > > > > +#define MX6Q_UART4_BASE_ADDR 0x021f0000 > > > > + > > > > +#define MX6Q_SCU_BASE_VADDR IMX6Q_VA(MX6Q_SCU_BASE_ADDR) > > > > +#define MX6Q_CCM_BASE_VADDR IMX6Q_VA(MX6Q_CCM_BASE_ADDR) > > > > +#define MX6Q_ANATOP_BASE_VADDR IMX6Q_VA(MX6Q_ANATOP_BASE_ADDR) > > > > +#define MX6Q_UART4_BASE_VADDR IMX6Q_VA(MX6Q_UART4_BASE_ADDR) > > > Depending on the sizes of these memory regions you can use the existing > > > IMX_IO_P2V here. The conditions are: > > > > > > SCU_SIZE <= 0x200000 > Actually this should be 0x100000 as this is the size that is mapped in a > continous chunk. > > > > CCM_SIZE <= 0x4000 > > > ANATOP_SIZE <= 0x28000 > > > UART4 <= 0x100000 > > > > > This is exactly what I dislike about IMX_IO_P2V(). We have to verify > > all these conditions manually. Looking at the static mapping below > I did it semi-manual, I just put your constants for imx6q into my script > (all with size=0x4000 for now) and it told me: > > ... > * mx6q: > * SCU 0x00a00000+0x004000 -> 0xf4000000+0x004000 > * CCM 0x020c4000+0x004000 -> 0xf42c4000+0x004000 > * ANATOP 0x020c8000+0x004000 -> 0xf42c8000+0x004000 > * UART4 0x021f0000+0x004000 -> 0xf42f0000+0x004000 > ... > > > (copied from arch/arm/plat-mxc/include/mach/hardware.h), do you think > > it's really scalable and easy to maintain for the long run? > At least it provides a way to verify the correctness of the mapping. > Before I introduced the mapping function there was a conflict IIRC. > > > /* > > * This is rather complicated for humans and ugly to verify, but for a machine > > * it's OK. Still more as it is usually only applied to constants. The upsides > > * on using this approach are: > > * > > * - same mapping on all i.MX machines > > * - works for assembler, too > > * - no need to nurture #defines for virtual addresses > > * > > * The downside it, it's hard to verify (but I have a script for that). > If you want I can provide you that script. > Yes, please. I would use IMX_IO_P2V() in the next post. [...] > > #define IMX_IO_P2V(x) ( \ > > 0xf4000000 + \ > > (((x) & 0x50000000) >> 6) + \ > > (((x) & 0x0b000000) >> 4) + \ > > (((x) & 0x000fffff))) > > > > > hmm, looking at patch 4 SCU_BASE is determined by a coprocessor > > > instruction?! > > > > Ah, yes. The SCU physical base address can be retrieved from > > coprocessor. > Is there an advantage in autodetecting the base address? > Any disadvantage for doing so?
Hello Shawn, On Mon, Sep 12, 2011 at 10:30:01AM +0800, Shawn Guo wrote: > On Wed, Sep 07, 2011 at 02:36:35PM +0200, Uwe Kleine-König wrote: > > On Wed, Sep 07, 2011 at 07:00:02PM +0800, Shawn Guo wrote: > > > On Tue, Sep 06, 2011 at 10:25:55PM +0200, Uwe Kleine-König wrote: > > > > On Tue, Sep 06, 2011 at 05:58:36PM +0800, Shawn Guo wrote: > > [...] > > > > > > diff --git a/arch/arm/plat-mxc/include/mach/mx6q.h b/arch/arm/plat-mxc/include/mach/mx6q.h > > > > > new file mode 100644 > > > > > index 0000000..7432310 > > > > > --- /dev/null > > > > > +++ b/arch/arm/plat-mxc/include/mach/mx6q.h > > > > > @@ -0,0 +1,29 @@ > > > > > +/* > > > > > + * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved. > > > > > + * Copyright 2011 Linaro Ltd. > > > > > + * > > > > > + * The code contained herein is licensed under the GNU General Public > > > > > + * License. You may obtain a copy of the GNU General Public License > > > > > + * Version 2 or later at the following locations: > > > > > + * > > > > > + * http://www.opensource.org/licenses/gpl-license.html > > > > > + * http://www.gnu.org/copyleft/gpl.html > > > > > + */ > > > > > + > > > > > +#ifndef __MACH_MX6Q_H__ > > > > > +#define __MACH_MX6Q_H__ > > > > > + > > > > > +/* static mappings */ > > > > > +#define IMX6Q_VA(x) (0xf4000000 + (x)) > > > > > + > > > > > +#define MX6Q_SCU_BASE_ADDR 0x00a00000 > > > > > +#define MX6Q_CCM_BASE_ADDR 0x020c4000 > > > > > +#define MX6Q_ANATOP_BASE_ADDR 0x020c8000 > > > > > +#define MX6Q_UART4_BASE_ADDR 0x021f0000 > > > > > + > > > > > +#define MX6Q_SCU_BASE_VADDR IMX6Q_VA(MX6Q_SCU_BASE_ADDR) > > > > > +#define MX6Q_CCM_BASE_VADDR IMX6Q_VA(MX6Q_CCM_BASE_ADDR) > > > > > +#define MX6Q_ANATOP_BASE_VADDR IMX6Q_VA(MX6Q_ANATOP_BASE_ADDR) > > > > > +#define MX6Q_UART4_BASE_VADDR IMX6Q_VA(MX6Q_UART4_BASE_ADDR) > > > > Depending on the sizes of these memory regions you can use the existing > > > > IMX_IO_P2V here. The conditions are: > > > > > > > > SCU_SIZE <= 0x200000 > > Actually this should be 0x100000 as this is the size that is mapped in a > > continous chunk. > > > > > > CCM_SIZE <= 0x4000 > > > > ANATOP_SIZE <= 0x28000 > > > > UART4 <= 0x100000 > > > > > > > This is exactly what I dislike about IMX_IO_P2V(). We have to verify > > > all these conditions manually. Looking at the static mapping below > > I did it semi-manual, I just put your constants for imx6q into my script > > (all with size=0x4000 for now) and it told me: > > > > ... > > * mx6q: > > * SCU 0x00a00000+0x004000 -> 0xf4000000+0x004000 > > * CCM 0x020c4000+0x004000 -> 0xf42c4000+0x004000 > > * ANATOP 0x020c8000+0x004000 -> 0xf42c8000+0x004000 > > * UART4 0x021f0000+0x004000 -> 0xf42f0000+0x004000 > > ... > > > > > (copied from arch/arm/plat-mxc/include/mach/hardware.h), do you think > > > it's really scalable and easy to maintain for the long run? > > At least it provides a way to verify the correctness of the mapping. > > Before I introduced the mapping function there was a conflict IIRC. > > > > > /* > > > * This is rather complicated for humans and ugly to verify, but for a machine > > > * it's OK. Still more as it is usually only applied to constants. The upsides > > > * on using this approach are: > > > * > > > * - same mapping on all i.MX machines > > > * - works for assembler, too > > > * - no need to nurture #defines for virtual addresses > > > * > > > * The downside it, it's hard to verify (but I have a script for that). > > If you want I can provide you that script. > > > Yes, please. I would use IMX_IO_P2V() in the next post. I just found a bug in the conflict detection code, so I put it in a repository to prevent the broken script to enter the archives. You can find it on git://git.pengutronix.de/git/ukl/imx-iop2v.git > [...] > > > > #define IMX_IO_P2V(x) ( \ > > > 0xf4000000 + \ > > > (((x) & 0x50000000) >> 6) + \ > > > (((x) & 0x0b000000) >> 4) + \ > > > (((x) & 0x000fffff))) > > > > > > > hmm, looking at patch 4 SCU_BASE is determined by a coprocessor > > > > instruction?! > > > > > > Ah, yes. The SCU physical base address can be retrieved from > > > coprocessor. > > Is there an advantage in autodetecting the base address? > > > Any disadvantage for doing so? It makes #define MX6Q_SCU_BASE_ADDR 0x00a00000 superfluous. And in case the real address is different it might make IMX_IO_P2V(real scu address) != scu_io_desc.virtual which makes the scriptable check for conflicts kind of useless and might come as a surprise. Best regards Uwe
On Mon, Sep 12, 2011 at 09:41:47AM +0200, Uwe Kleine-König wrote: > Hello Shawn, > > On Mon, Sep 12, 2011 at 10:30:01AM +0800, Shawn Guo wrote: > > On Wed, Sep 07, 2011 at 02:36:35PM +0200, Uwe Kleine-König wrote: > > > On Wed, Sep 07, 2011 at 07:00:02PM +0800, Shawn Guo wrote: > > > > On Tue, Sep 06, 2011 at 10:25:55PM +0200, Uwe Kleine-König wrote: > > > > > On Tue, Sep 06, 2011 at 05:58:36PM +0800, Shawn Guo wrote: > > > > [...] > > > > > > > > diff --git a/arch/arm/plat-mxc/include/mach/mx6q.h b/arch/arm/plat-mxc/include/mach/mx6q.h > > > > > > new file mode 100644 > > > > > > index 0000000..7432310 > > > > > > --- /dev/null > > > > > > +++ b/arch/arm/plat-mxc/include/mach/mx6q.h > > > > > > @@ -0,0 +1,29 @@ > > > > > > +/* > > > > > > + * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved. > > > > > > + * Copyright 2011 Linaro Ltd. > > > > > > + * > > > > > > + * The code contained herein is licensed under the GNU General Public > > > > > > + * License. You may obtain a copy of the GNU General Public License > > > > > > + * Version 2 or later at the following locations: > > > > > > + * > > > > > > + * http://www.opensource.org/licenses/gpl-license.html > > > > > > + * http://www.gnu.org/copyleft/gpl.html > > > > > > + */ > > > > > > + > > > > > > +#ifndef __MACH_MX6Q_H__ > > > > > > +#define __MACH_MX6Q_H__ > > > > > > + > > > > > > +/* static mappings */ > > > > > > +#define IMX6Q_VA(x) (0xf4000000 + (x)) > > > > > > + > > > > > > +#define MX6Q_SCU_BASE_ADDR 0x00a00000 > > > > > > +#define MX6Q_CCM_BASE_ADDR 0x020c4000 > > > > > > +#define MX6Q_ANATOP_BASE_ADDR 0x020c8000 > > > > > > +#define MX6Q_UART4_BASE_ADDR 0x021f0000 > > > > > > + > > > > > > +#define MX6Q_SCU_BASE_VADDR IMX6Q_VA(MX6Q_SCU_BASE_ADDR) > > > > > > +#define MX6Q_CCM_BASE_VADDR IMX6Q_VA(MX6Q_CCM_BASE_ADDR) > > > > > > +#define MX6Q_ANATOP_BASE_VADDR IMX6Q_VA(MX6Q_ANATOP_BASE_ADDR) > > > > > > +#define MX6Q_UART4_BASE_VADDR IMX6Q_VA(MX6Q_UART4_BASE_ADDR) > > > > > Depending on the sizes of these memory regions you can use the existing > > > > > IMX_IO_P2V here. The conditions are: > > > > > > > > > > SCU_SIZE <= 0x200000 > > > Actually this should be 0x100000 as this is the size that is mapped in a > > > continous chunk. > > > > > > > > CCM_SIZE <= 0x4000 > > > > > ANATOP_SIZE <= 0x28000 > > > > > UART4 <= 0x100000 > > > > > > > > > This is exactly what I dislike about IMX_IO_P2V(). We have to verify > > > > all these conditions manually. Looking at the static mapping below > > > I did it semi-manual, I just put your constants for imx6q into my script > > > (all with size=0x4000 for now) and it told me: > > > > > > ... > > > * mx6q: > > > * SCU 0x00a00000+0x004000 -> 0xf4000000+0x004000 > > > * CCM 0x020c4000+0x004000 -> 0xf42c4000+0x004000 > > > * ANATOP 0x020c8000+0x004000 -> 0xf42c8000+0x004000 > > > * UART4 0x021f0000+0x004000 -> 0xf42f0000+0x004000 > > > ... > > > > > > > (copied from arch/arm/plat-mxc/include/mach/hardware.h), do you think > > > > it's really scalable and easy to maintain for the long run? > > > At least it provides a way to verify the correctness of the mapping. > > > Before I introduced the mapping function there was a conflict IIRC. > > > > > > > /* > > > > * This is rather complicated for humans and ugly to verify, but for a machine > > > > * it's OK. Still more as it is usually only applied to constants. The upsides > > > > * on using this approach are: > > > > * > > > > * - same mapping on all i.MX machines > > > > * - works for assembler, too > > > > * - no need to nurture #defines for virtual addresses > > > > * > > > > * The downside it, it's hard to verify (but I have a script for that). > > > If you want I can provide you that script. > > > > > Yes, please. I would use IMX_IO_P2V() in the next post. > I just found a bug in the conflict detection code, so I put it in a > repository to prevent the broken script to enter the archives. You can > find it on > > git://git.pengutronix.de/git/ukl/imx-iop2v.git > Thanks, Uwe. > > [...] > > > > > > #define IMX_IO_P2V(x) ( \ > > > > 0xf4000000 + \ > > > > (((x) & 0x50000000) >> 6) + \ > > > > (((x) & 0x0b000000) >> 4) + \ > > > > (((x) & 0x000fffff))) > > > > > > > > > hmm, looking at patch 4 SCU_BASE is determined by a coprocessor > > > > > instruction?! > > > > > > > > Ah, yes. The SCU physical base address can be retrieved from > > > > coprocessor. > > > Is there an advantage in autodetecting the base address? > > > > > Any disadvantage for doing so? > It makes > > #define MX6Q_SCU_BASE_ADDR 0x00a00000 > > superfluous. The definition is actually not needed. I put it there as a documentation telling SCU is statically mapped. > And in case the real address is different it might make > > IMX_IO_P2V(real scu address) != scu_io_desc.virtual > This should never happen. One thing I'm trying to do is to keep arch/arm/mach-imx/platsmp.c not specific to imx6q. The auto-detecting helps to keep MX6Q_SCU_BASE_ADDR away from the file, so that one day when we have another imx smp soc, we can simply reuse the file. Regards, Shawn > which makes the scriptable check for conflicts kind of useless and might > come as a surprise. >
On Wed, Sep 07, 2011 at 07:00:02PM +0800, Shawn Guo wrote: > On Tue, Sep 06, 2011 at 10:25:55PM +0200, Uwe Kleine-König wrote: > > On Tue, Sep 06, 2011 at 05:58:36PM +0800, Shawn Guo wrote: > > > It adds the core definitions and low-level debug uart support > > > for imx6q. > > > > > > Signed-off-by: Shawn Guo <shawn.guo@linaro.org> > > > --- > > > arch/arm/Kconfig | 2 +- > > > arch/arm/Kconfig.debug | 7 +++++ > > > arch/arm/Makefile | 1 + > > > arch/arm/mach-imx/Kconfig | 4 +++ > > > arch/arm/mach-imx/Makefile | 2 + > > > arch/arm/mach-imx/Makefile.boot | 4 +++ > > > arch/arm/mach-imx/lluart.c | 33 ++++++++++++++++++++++++++ > > > arch/arm/plat-mxc/Kconfig | 5 ++++ > > > arch/arm/plat-mxc/include/mach/debug-macro.S | 5 ++++ > > > arch/arm/plat-mxc/include/mach/entry-macro.S | 15 +++++++++++- > > > arch/arm/plat-mxc/include/mach/hardware.h | 1 + > > > arch/arm/plat-mxc/include/mach/irqs.h | 9 ++++-- > > > arch/arm/plat-mxc/include/mach/memory.h | 3 ++ > > > arch/arm/plat-mxc/include/mach/mx6q.h | 29 ++++++++++++++++++++++ > > > 14 files changed, 115 insertions(+), 5 deletions(-) > > > create mode 100644 arch/arm/mach-imx/lluart.c > > > create mode 100644 arch/arm/plat-mxc/include/mach/mx6q.h > > > > > > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig > > > index 4ea9974..37c20a4 100644 > > > --- a/arch/arm/Kconfig > > > +++ b/arch/arm/Kconfig > > > @@ -1348,7 +1348,7 @@ config SMP > > > depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \ > > > MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \ > > > ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \ > > > - ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE > > > + ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE || SOC_IMX6Q > > > select USE_GENERIC_SMP_HELPERS > > > select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP > > > help > > > diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug > > > index 965d59a..68fc155 100644 > > > --- a/arch/arm/Kconfig.debug > > > +++ b/arch/arm/Kconfig.debug > > > @@ -155,6 +155,13 @@ choice > > > Say Y here if you want kernel low-level debugging support > > > on i.MX50 or i.MX53. > > > > > > + config DEBUG_IMX6Q_UART > > > + bool "i.MX6Q Debug UART" > > > + depends on SOC_IMX6Q > > > + help > > > + Say Y here if you want kernel low-level debugging support > > > + on i.MX6Q. > > > + > > > config DEBUG_S3C_UART0 > > > depends on PLAT_SAMSUNG > > > bool "Use S3C UART 0 for low-level debug" > > > diff --git a/arch/arm/Makefile b/arch/arm/Makefile > > > index 70c424e..3a0bbe4 100644 > > > --- a/arch/arm/Makefile > > > +++ b/arch/arm/Makefile > > > @@ -159,6 +159,7 @@ machine-$(CONFIG_ARCH_MX2) := imx > > > machine-$(CONFIG_ARCH_MX25) := imx > > > machine-$(CONFIG_ARCH_MX3) := imx > > > machine-$(CONFIG_ARCH_MX5) := mx5 > > > +machine-$(CONFIG_ARCH_MX6) := imx > > > machine-$(CONFIG_ARCH_MXS) := mxs > > > machine-$(CONFIG_ARCH_NETX) := netx > > > machine-$(CONFIG_ARCH_NOMADIK) := nomadik > > > diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig > > > index 0519dd7..4cf5178 100644 > > > --- a/arch/arm/mach-imx/Kconfig > > > +++ b/arch/arm/mach-imx/Kconfig > > > @@ -58,6 +58,10 @@ config SOC_IMX35 > > > select ARCH_MX35 > > > select MXC_AVIC > > > > > > +config SOC_IMX6Q > > > + bool > > > + select ARM_GIC > > > + select CPU_V7 > > > > > > if ARCH_MX1 > > > > > > diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile > > > index e9eb36d..96ecc96 100644 > > > --- a/arch/arm/mach-imx/Makefile > > > +++ b/arch/arm/mach-imx/Makefile > > > @@ -61,3 +61,5 @@ obj-$(CONFIG_MACH_MX35_3DS) += mach-mx35_3ds.o > > > obj-$(CONFIG_MACH_EUKREA_CPUIMX35) += mach-cpuimx35.o > > > obj-$(CONFIG_MACH_EUKREA_MBIMXSD35_BASEBOARD) += eukrea_mbimxsd35-baseboard.o > > > obj-$(CONFIG_MACH_VPR200) += mach-vpr200.o > > > + > > > +obj-$(CONFIG_DEBUG_LL) += lluart.o > > > diff --git a/arch/arm/mach-imx/Makefile.boot b/arch/arm/mach-imx/Makefile.boot > > > index ebee18b..389a0e3 100644 > > > --- a/arch/arm/mach-imx/Makefile.boot > > > +++ b/arch/arm/mach-imx/Makefile.boot > > > @@ -17,3 +17,7 @@ initrd_phys-$(CONFIG_MACH_MX27) := 0xA0800000 > > > zreladdr-$(CONFIG_ARCH_MX3) := 0x80008000 > > > params_phys-$(CONFIG_ARCH_MX3) := 0x80000100 > > > initrd_phys-$(CONFIG_ARCH_MX3) := 0x80800000 > > > + > > > +zreladdr-$(CONFIG_SOC_IMX6Q) := 0x10008000 > > > +params_phys-$(CONFIG_SOC_IMX6Q) := 0x10000100 > > > +initrd_phys-$(CONFIG_SOC_IMX6Q) := 0x10800000 > > Do you really need params_phys and initrd_phys? > > > I added them to make IMX6Q look consistent with other soc in the file, > and leave it to a global cleanup, if we decide to clean later. I vote to skip params_phys and initrd_phys now. Every recent bootloader does not need them. As the i.MX6 is a new SoC, we have no reason to handle legacy bootloaders. When we want to to a global cleanup for these variables we already know that i.MX6 has no legacy bootloader problems. BTW many variables have the name imx6q, I suppose the 'q' is for quad cpu. From the FSL website I know that there are other versions of the i.MX6 planned. Are these variables really imx6q specific? Otherwise please skip the 'q'. Sascha
On Mon, Sep 12, 2011 at 10:44:39AM +0200, Sascha Hauer wrote: > On Wed, Sep 07, 2011 at 07:00:02PM +0800, Shawn Guo wrote: > > On Tue, Sep 06, 2011 at 10:25:55PM +0200, Uwe Kleine-König wrote: > > > On Tue, Sep 06, 2011 at 05:58:36PM +0800, Shawn Guo wrote: > > > > It adds the core definitions and low-level debug uart support > > > > for imx6q. > > > > > > > > Signed-off-by: Shawn Guo <shawn.guo@linaro.org> > > > > --- > > > > arch/arm/Kconfig | 2 +- > > > > arch/arm/Kconfig.debug | 7 +++++ > > > > arch/arm/Makefile | 1 + > > > > arch/arm/mach-imx/Kconfig | 4 +++ > > > > arch/arm/mach-imx/Makefile | 2 + > > > > arch/arm/mach-imx/Makefile.boot | 4 +++ > > > > arch/arm/mach-imx/lluart.c | 33 ++++++++++++++++++++++++++ > > > > arch/arm/plat-mxc/Kconfig | 5 ++++ > > > > arch/arm/plat-mxc/include/mach/debug-macro.S | 5 ++++ > > > > arch/arm/plat-mxc/include/mach/entry-macro.S | 15 +++++++++++- > > > > arch/arm/plat-mxc/include/mach/hardware.h | 1 + > > > > arch/arm/plat-mxc/include/mach/irqs.h | 9 ++++-- > > > > arch/arm/plat-mxc/include/mach/memory.h | 3 ++ > > > > arch/arm/plat-mxc/include/mach/mx6q.h | 29 ++++++++++++++++++++++ > > > > 14 files changed, 115 insertions(+), 5 deletions(-) > > > > create mode 100644 arch/arm/mach-imx/lluart.c > > > > create mode 100644 arch/arm/plat-mxc/include/mach/mx6q.h > > > > > > > > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig > > > > index 4ea9974..37c20a4 100644 > > > > --- a/arch/arm/Kconfig > > > > +++ b/arch/arm/Kconfig > > > > @@ -1348,7 +1348,7 @@ config SMP > > > > depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \ > > > > MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \ > > > > ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \ > > > > - ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE > > > > + ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE || SOC_IMX6Q > > > > select USE_GENERIC_SMP_HELPERS > > > > select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP > > > > help > > > > diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug > > > > index 965d59a..68fc155 100644 > > > > --- a/arch/arm/Kconfig.debug > > > > +++ b/arch/arm/Kconfig.debug > > > > @@ -155,6 +155,13 @@ choice > > > > Say Y here if you want kernel low-level debugging support > > > > on i.MX50 or i.MX53. > > > > > > > > + config DEBUG_IMX6Q_UART > > > > + bool "i.MX6Q Debug UART" > > > > + depends on SOC_IMX6Q > > > > + help > > > > + Say Y here if you want kernel low-level debugging support > > > > + on i.MX6Q. > > > > + > > > > config DEBUG_S3C_UART0 > > > > depends on PLAT_SAMSUNG > > > > bool "Use S3C UART 0 for low-level debug" > > > > diff --git a/arch/arm/Makefile b/arch/arm/Makefile > > > > index 70c424e..3a0bbe4 100644 > > > > --- a/arch/arm/Makefile > > > > +++ b/arch/arm/Makefile > > > > @@ -159,6 +159,7 @@ machine-$(CONFIG_ARCH_MX2) := imx > > > > machine-$(CONFIG_ARCH_MX25) := imx > > > > machine-$(CONFIG_ARCH_MX3) := imx > > > > machine-$(CONFIG_ARCH_MX5) := mx5 > > > > +machine-$(CONFIG_ARCH_MX6) := imx > > > > machine-$(CONFIG_ARCH_MXS) := mxs > > > > machine-$(CONFIG_ARCH_NETX) := netx > > > > machine-$(CONFIG_ARCH_NOMADIK) := nomadik > > > > diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig > > > > index 0519dd7..4cf5178 100644 > > > > --- a/arch/arm/mach-imx/Kconfig > > > > +++ b/arch/arm/mach-imx/Kconfig > > > > @@ -58,6 +58,10 @@ config SOC_IMX35 > > > > select ARCH_MX35 > > > > select MXC_AVIC > > > > > > > > +config SOC_IMX6Q > > > > + bool > > > > + select ARM_GIC > > > > + select CPU_V7 > > > > > > > > if ARCH_MX1 > > > > > > > > diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile > > > > index e9eb36d..96ecc96 100644 > > > > --- a/arch/arm/mach-imx/Makefile > > > > +++ b/arch/arm/mach-imx/Makefile > > > > @@ -61,3 +61,5 @@ obj-$(CONFIG_MACH_MX35_3DS) += mach-mx35_3ds.o > > > > obj-$(CONFIG_MACH_EUKREA_CPUIMX35) += mach-cpuimx35.o > > > > obj-$(CONFIG_MACH_EUKREA_MBIMXSD35_BASEBOARD) += eukrea_mbimxsd35-baseboard.o > > > > obj-$(CONFIG_MACH_VPR200) += mach-vpr200.o > > > > + > > > > +obj-$(CONFIG_DEBUG_LL) += lluart.o > > > > diff --git a/arch/arm/mach-imx/Makefile.boot b/arch/arm/mach-imx/Makefile.boot > > > > index ebee18b..389a0e3 100644 > > > > --- a/arch/arm/mach-imx/Makefile.boot > > > > +++ b/arch/arm/mach-imx/Makefile.boot > > > > @@ -17,3 +17,7 @@ initrd_phys-$(CONFIG_MACH_MX27) := 0xA0800000 > > > > zreladdr-$(CONFIG_ARCH_MX3) := 0x80008000 > > > > params_phys-$(CONFIG_ARCH_MX3) := 0x80000100 > > > > initrd_phys-$(CONFIG_ARCH_MX3) := 0x80800000 > > > > + > > > > +zreladdr-$(CONFIG_SOC_IMX6Q) := 0x10008000 > > > > +params_phys-$(CONFIG_SOC_IMX6Q) := 0x10000100 > > > > +initrd_phys-$(CONFIG_SOC_IMX6Q) := 0x10800000 > > > Do you really need params_phys and initrd_phys? > > > > > I added them to make IMX6Q look consistent with other soc in the file, > > and leave it to a global cleanup, if we decide to clean later. > > I vote to skip params_phys and initrd_phys now. Every recent bootloader > does not need them. As the i.MX6 is a new SoC, we have no reason to > handle legacy bootloaders. When we want to to a global cleanup for these > variables we already know that i.MX6 has no legacy bootloader problems. > Ok. > BTW many variables have the name imx6q, I suppose the 'q' is for quad > cpu. From the FSL website I know that there are other versions of the > i.MX6 planned. Are these variables really imx6q specific? Otherwise > please skip the 'q'. > Before other imx6 family SoCs come to world, we really do not know what are imx6q specific and what are not.
On Mon, Sep 12, 2011 at 10:44:39AM +0200, Sascha Hauer wrote: > I vote to skip params_phys and initrd_phys now. Every recent bootloader > does not need them. As the i.MX6 is a new SoC, we have no reason to > handle legacy bootloaders. Can we stop this misunderstanding right now. It's NOT about legacy boot loaders. It's about the bootp code which allows an initrd to be packaged up together with a zImage file as one single file. That's used to be able to boot with an initrd on platforms which can only obtain one file from the boot media, and they specify where the parameters are expected to be (which can be solved by updating the code to use r2) and where to place the initrd image (which can't be solved as it would mean encoding memory information for every platform into the bootp code.) An example of a current boot loader which requires this: Simtec's Able boot loader.
Hi Uwe, On Tue, Sep 06, 2011 at 10:25:55PM +0200, Uwe Kleine-König wrote: > On Tue, Sep 06, 2011 at 05:58:36PM +0800, Shawn Guo wrote: [...] > > diff --git a/arch/arm/plat-mxc/include/mach/entry-macro.S b/arch/arm/plat-mxc/include/mach/entry-macro.S > > index 066d464..341f800 100644 > > --- a/arch/arm/plat-mxc/include/mach/entry-macro.S > > +++ b/arch/arm/plat-mxc/include/mach/entry-macro.S > > @@ -1,6 +1,6 @@ > > /* > > * Copyright (C) 2007 Lennert Buytenhek <buytenh@wantstofly.org> > > - * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. > > + * Copyright 2004-2011 Freescale Semiconductor, Inc. All Rights Reserved. > > */ > > > > /* > > @@ -11,6 +11,17 @@ > > > > #include <mach/hardware.h> > > > > +#ifdef CONFIG_ARM_GIC > > +#include <asm/hardware/entry-macro-gic.S> > > + > > + .macro disable_fiq > > + .endm > > + > > + .macro arch_ret_to_user, tmp1, tmp2 > > + .endm > > + > > +#else > > + > hmm, this essentially means mx6 support cannot go into a kernel image > for the other imx machines :-( > I thought you gave this comment because imx6q change breaks the existing support for single image. But looking at the code a little bit closer, I found that even the coexisting of AVIC and TZIC have not been supported. That said imx6q change did not make the situation any worse, and we should come up with a solution later than this series to build AVIC, TZIC and GIC in single image.
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 4ea9974..37c20a4 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1348,7 +1348,7 @@ config SMP depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \ MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \ ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \ - ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE + ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE || SOC_IMX6Q select USE_GENERIC_SMP_HELPERS select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP help diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 965d59a..68fc155 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -155,6 +155,13 @@ choice Say Y here if you want kernel low-level debugging support on i.MX50 or i.MX53. + config DEBUG_IMX6Q_UART + bool "i.MX6Q Debug UART" + depends on SOC_IMX6Q + help + Say Y here if you want kernel low-level debugging support + on i.MX6Q. + config DEBUG_S3C_UART0 depends on PLAT_SAMSUNG bool "Use S3C UART 0 for low-level debug" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 70c424e..3a0bbe4 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -159,6 +159,7 @@ machine-$(CONFIG_ARCH_MX2) := imx machine-$(CONFIG_ARCH_MX25) := imx machine-$(CONFIG_ARCH_MX3) := imx machine-$(CONFIG_ARCH_MX5) := mx5 +machine-$(CONFIG_ARCH_MX6) := imx machine-$(CONFIG_ARCH_MXS) := mxs machine-$(CONFIG_ARCH_NETX) := netx machine-$(CONFIG_ARCH_NOMADIK) := nomadik diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 0519dd7..4cf5178 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -58,6 +58,10 @@ config SOC_IMX35 select ARCH_MX35 select MXC_AVIC +config SOC_IMX6Q + bool + select ARM_GIC + select CPU_V7 if ARCH_MX1 diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index e9eb36d..96ecc96 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile @@ -61,3 +61,5 @@ obj-$(CONFIG_MACH_MX35_3DS) += mach-mx35_3ds.o obj-$(CONFIG_MACH_EUKREA_CPUIMX35) += mach-cpuimx35.o obj-$(CONFIG_MACH_EUKREA_MBIMXSD35_BASEBOARD) += eukrea_mbimxsd35-baseboard.o obj-$(CONFIG_MACH_VPR200) += mach-vpr200.o + +obj-$(CONFIG_DEBUG_LL) += lluart.o diff --git a/arch/arm/mach-imx/Makefile.boot b/arch/arm/mach-imx/Makefile.boot index ebee18b..389a0e3 100644 --- a/arch/arm/mach-imx/Makefile.boot +++ b/arch/arm/mach-imx/Makefile.boot @@ -17,3 +17,7 @@ initrd_phys-$(CONFIG_MACH_MX27) := 0xA0800000 zreladdr-$(CONFIG_ARCH_MX3) := 0x80008000 params_phys-$(CONFIG_ARCH_MX3) := 0x80000100 initrd_phys-$(CONFIG_ARCH_MX3) := 0x80800000 + +zreladdr-$(CONFIG_SOC_IMX6Q) := 0x10008000 +params_phys-$(CONFIG_SOC_IMX6Q) := 0x10000100 +initrd_phys-$(CONFIG_SOC_IMX6Q) := 0x10800000 diff --git a/arch/arm/mach-imx/lluart.c b/arch/arm/mach-imx/lluart.c new file mode 100644 index 0000000..34205cb --- /dev/null +++ b/arch/arm/mach-imx/lluart.c @@ -0,0 +1,33 @@ +/* + * Copyright 2011 Freescale Semiconductor, Inc. + * Copyright 2011 Linaro Ltd. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include <linux/init.h> +#include <asm/page.h> +#include <asm/sizes.h> +#include <asm/mach/map.h> +#include <mach/hardware.h> + +static struct map_desc imx_lluart_desc = { +#ifdef CONFIG_DEBUG_IMX6Q_UART + .virtual = MX6Q_UART4_BASE_VADDR, + .pfn = __phys_to_pfn(MX6Q_UART4_BASE_ADDR), + .length = SZ_16K, + .type = MT_DEVICE, +#endif +}; + +void __init imx_lluart_map_io(void) +{ + if (imx_lluart_desc.virtual) + iotable_init(&imx_lluart_desc, 1); +} + diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig index a5353fc..e548f9b 100644 --- a/arch/arm/plat-mxc/Kconfig +++ b/arch/arm/plat-mxc/Kconfig @@ -48,6 +48,11 @@ config ARCH_MX51 help This enables support for systems based on the Freescale i.MX51 family +config ARCH_MX6 + bool "i.MX6" + help + This enables support for systems based on the Freescale i.MX6 family + endchoice source "arch/arm/mach-imx/Kconfig" diff --git a/arch/arm/plat-mxc/include/mach/debug-macro.S b/arch/arm/plat-mxc/include/mach/debug-macro.S index 07cfdbe..471872a 100644 --- a/arch/arm/plat-mxc/include/mach/debug-macro.S +++ b/arch/arm/plat-mxc/include/mach/debug-macro.S @@ -24,9 +24,14 @@ #define UART_PADDR MX51_UART1_BASE_ADDR #elif defined (CONFIG_DEBUG_IMX50_IMX53_UART) #define UART_PADDR MX53_UART1_BASE_ADDR +#elif defined (CONFIG_DEBUG_IMX6Q_UART) +#define UART_PADDR MX6Q_UART4_BASE_ADDR +#define UART_VADDR MX6Q_UART4_BASE_VADDR #endif +#ifndef UART_VADDR #define UART_VADDR IMX_IO_ADDRESS(UART_PADDR) +#endif .macro addruart, rp, rv ldr \rp, =UART_PADDR @ physical diff --git a/arch/arm/plat-mxc/include/mach/entry-macro.S b/arch/arm/plat-mxc/include/mach/entry-macro.S index 066d464..341f800 100644 --- a/arch/arm/plat-mxc/include/mach/entry-macro.S +++ b/arch/arm/plat-mxc/include/mach/entry-macro.S @@ -1,6 +1,6 @@ /* * Copyright (C) 2007 Lennert Buytenhek <buytenh@wantstofly.org> - * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2004-2011 Freescale Semiconductor, Inc. All Rights Reserved. */ /* @@ -11,6 +11,17 @@ #include <mach/hardware.h> +#ifdef CONFIG_ARM_GIC +#include <asm/hardware/entry-macro-gic.S> + + .macro disable_fiq + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm + +#else + #define AVIC_NIMASK 0x04 @ this macro disables fast irq (not implemented) @@ -78,3 +89,5 @@ movs \irqnr, \irqnr #endif .endm + +#endif /* CONFIG_ARM_GIC */ diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h index a8bfd56..e1f84ce 100644 --- a/arch/arm/plat-mxc/include/mach/hardware.h +++ b/arch/arm/plat-mxc/include/mach/hardware.h @@ -97,6 +97,7 @@ #include <mach/mxc.h> +#include <mach/mx6q.h> #include <mach/mx50.h> #include <mach/mx51.h> #include <mach/mx53.h> diff --git a/arch/arm/plat-mxc/include/mach/irqs.h b/arch/arm/plat-mxc/include/mach/irqs.h index 00e812b..3ae400f 100644 --- a/arch/arm/plat-mxc/include/mach/irqs.h +++ b/arch/arm/plat-mxc/include/mach/irqs.h @@ -14,12 +14,15 @@ #include <asm-generic/gpio.h> /* - * SoCs with TZIC interrupt controller have 128 IRQs, those with AVIC have 64 + * SoCs with AVIC interrupt controller have 64 IRQs, those with TZIC + * have 128, otherwise those with GIC have 160 IRQs. */ -#ifdef CONFIG_MXC_TZIC +#if defined CONFIG_MXC_AVIC +#define MXC_INTERNAL_IRQS 64 +#elif defined CONFIG_MXC_TZIC #define MXC_INTERNAL_IRQS 128 #else -#define MXC_INTERNAL_IRQS 64 +#define MXC_INTERNAL_IRQS 160 #endif #define MXC_GPIO_IRQ_START MXC_INTERNAL_IRQS diff --git a/arch/arm/plat-mxc/include/mach/memory.h b/arch/arm/plat-mxc/include/mach/memory.h index 11be5cd..2b8e186 100644 --- a/arch/arm/plat-mxc/include/mach/memory.h +++ b/arch/arm/plat-mxc/include/mach/memory.h @@ -19,6 +19,7 @@ #define MX50_PHYS_OFFSET UL(0x70000000) #define MX51_PHYS_OFFSET UL(0x90000000) #define MX53_PHYS_OFFSET UL(0x70000000) +#define MX6Q_PHYS_OFFSET UL(0x10000000) #if !defined(CONFIG_RUNTIME_PHYS_OFFSET) # if defined CONFIG_ARCH_MX1 @@ -37,6 +38,8 @@ # define PLAT_PHYS_OFFSET MX51_PHYS_OFFSET # elif defined CONFIG_ARCH_MX53 # define PLAT_PHYS_OFFSET MX53_PHYS_OFFSET +# elif defined CONFIG_SOC_IMX6Q +# define PLAT_PHYS_OFFSET MX6Q_PHYS_OFFSET # endif #endif diff --git a/arch/arm/plat-mxc/include/mach/mx6q.h b/arch/arm/plat-mxc/include/mach/mx6q.h new file mode 100644 index 0000000..7432310 --- /dev/null +++ b/arch/arm/plat-mxc/include/mach/mx6q.h @@ -0,0 +1,29 @@ +/* + * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2011 Linaro Ltd. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#ifndef __MACH_MX6Q_H__ +#define __MACH_MX6Q_H__ + +/* static mappings */ +#define IMX6Q_VA(x) (0xf4000000 + (x)) + +#define MX6Q_SCU_BASE_ADDR 0x00a00000 +#define MX6Q_CCM_BASE_ADDR 0x020c4000 +#define MX6Q_ANATOP_BASE_ADDR 0x020c8000 +#define MX6Q_UART4_BASE_ADDR 0x021f0000 + +#define MX6Q_SCU_BASE_VADDR IMX6Q_VA(MX6Q_SCU_BASE_ADDR) +#define MX6Q_CCM_BASE_VADDR IMX6Q_VA(MX6Q_CCM_BASE_ADDR) +#define MX6Q_ANATOP_BASE_VADDR IMX6Q_VA(MX6Q_ANATOP_BASE_ADDR) +#define MX6Q_UART4_BASE_VADDR IMX6Q_VA(MX6Q_UART4_BASE_ADDR) + +#endif /* __MACH_MX6Q_H__ */
It adds the core definitions and low-level debug uart support for imx6q. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> --- arch/arm/Kconfig | 2 +- arch/arm/Kconfig.debug | 7 +++++ arch/arm/Makefile | 1 + arch/arm/mach-imx/Kconfig | 4 +++ arch/arm/mach-imx/Makefile | 2 + arch/arm/mach-imx/Makefile.boot | 4 +++ arch/arm/mach-imx/lluart.c | 33 ++++++++++++++++++++++++++ arch/arm/plat-mxc/Kconfig | 5 ++++ arch/arm/plat-mxc/include/mach/debug-macro.S | 5 ++++ arch/arm/plat-mxc/include/mach/entry-macro.S | 15 +++++++++++- arch/arm/plat-mxc/include/mach/hardware.h | 1 + arch/arm/plat-mxc/include/mach/irqs.h | 9 ++++-- arch/arm/plat-mxc/include/mach/memory.h | 3 ++ arch/arm/plat-mxc/include/mach/mx6q.h | 29 ++++++++++++++++++++++ 14 files changed, 115 insertions(+), 5 deletions(-) create mode 100644 arch/arm/mach-imx/lluart.c create mode 100644 arch/arm/plat-mxc/include/mach/mx6q.h