diff mbox series

[v2,05/14] arm64: dts: qcom: sc7280: Add RSC and PDC devices

Message ID 1614773878-8058-6-git-send-email-rnayak@codeaurora.org
State Superseded
Headers show
Series Add binding updates and DT files for SC7280 SoC | expand

Commit Message

Rajendra Nayak March 3, 2021, 12:17 p.m. UTC 
From: Maulik Shah <mkshah@codeaurora.org>

Add PDC interrupt controller along with apps RSC device.
Also add reserved memory for command_db.

Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
---
 arch/arm64/boot/dts/qcom/sc7280.dtsi | 44 ++++++++++++++++++++++++++++++++++++
 1 file changed, 44 insertions(+)

Comments

Stephen Boyd March 4, 2021, 12:04 a.m. UTC | #1 
Quoting Rajendra Nayak (2021-03-03 04:17:49)
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi

> index 4a56d9c..21c2399 100644

> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi

> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi

> @@ -30,6 +31,18 @@

>                 };

>         };

>  

> +       reserved_memory: reserved-memory {


Do we plan to use this label at any point? I'd prefer we remove this
until it becomes useful.

> +               #address-cells = <2>;

> +               #size-cells = <2>;

> +               ranges;

> +

> +               aop_cmd_db_mem: memory@80860000 {

> +                       reg = <0x0 0x80860000 0x0 0x20000>;

> +                       compatible = "qcom,cmd-db";

> +                       no-map;

> +               };

> +       };

> +

>         cpus {

>                 #address-cells = <2>;

>                 #size-cells = <0>;

> @@ -203,6 +229,7 @@

>                         interrupt-controller;

>                         #interrupt-cells = <2>;

>                         gpio-ranges = <&tlmm 0 0 175>;

> +                       wakeup-parent = <&pdc>;

>  

>                         qup_uart5_default: qup-uart5-default {

>                                 pins = "gpio46", "gpio47";

> @@ -287,6 +314,23 @@

>                                 status = "disabled";

>                         };

>                 };

> +

> +               apps_rsc: rsc@18200000 {


Any better name than 'rsc'? Maybe 'power-controller'?

> +                       compatible = "qcom,rpmh-rsc";

> +                       reg = <0 0x18200000 0 0x10000>,

> +                             <0 0x18210000 0 0x10000>,

> +                             <0 0x18220000 0 0x10000>;

> +                       reg-names = "drv-0", "drv-1", "drv-2";

> +                       interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,

> +                                    <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,

> +                                    <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;

> +                       qcom,tcs-offset = <0xd00>;

> +                       qcom,drv-id = <2>;

> +                       qcom,tcs-config = <ACTIVE_TCS  2>,

> +                                         <SLEEP_TCS   3>,

> +                                         <WAKE_TCS    3>,

> +                                         <CONTROL_TCS 1>;

> +               };

>         };
Rajendra Nayak March 5, 2021, 5:42 a.m. UTC | #2 
On 3/4/2021 5:34 AM, Stephen Boyd wrote:
> Quoting Rajendra Nayak (2021-03-03 04:17:49)
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> index 4a56d9c..21c2399 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> @@ -30,6 +31,18 @@
>>                  };
>>          };
>>   
>> +       reserved_memory: reserved-memory {
> 
> Do we plan to use this label at any point? I'd prefer we remove this
> until it becomes useful.

sure, i'll drop it

> 
>> +               #address-cells = <2>;
>> +               #size-cells = <2>;
>> +               ranges;
>> +
>> +               aop_cmd_db_mem: memory@80860000 {
>> +                       reg = <0x0 0x80860000 0x0 0x20000>;
>> +                       compatible = "qcom,cmd-db";
>> +                       no-map;
>> +               };
>> +       };
>> +
>>          cpus {
>>                  #address-cells = <2>;
>>                  #size-cells = <0>;
>> @@ -203,6 +229,7 @@
>>                          interrupt-controller;
>>                          #interrupt-cells = <2>;
>>                          gpio-ranges = <&tlmm 0 0 175>;
>> +                       wakeup-parent = <&pdc>;
>>   
>>                          qup_uart5_default: qup-uart5-default {
>>                                  pins = "gpio46", "gpio47";
>> @@ -287,6 +314,23 @@
>>                                  status = "disabled";
>>                          };
>>                  };
>> +
>> +               apps_rsc: rsc@18200000 {
> 
> Any better name than 'rsc'? Maybe 'power-controller'?

hmm, Maulik, any thoughts? This would perhaps need the bindings docs
to be updated as well (and maybe the existing platform DTs using rsc too)

> 
>> +                       compatible = "qcom,rpmh-rsc";
>> +                       reg = <0 0x18200000 0 0x10000>,
>> +                             <0 0x18210000 0 0x10000>,
>> +                             <0 0x18220000 0 0x10000>;
>> +                       reg-names = "drv-0", "drv-1", "drv-2";
>> +                       interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
>> +                                    <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
>> +                                    <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
>> +                       qcom,tcs-offset = <0xd00>;
>> +                       qcom,drv-id = <2>;
>> +                       qcom,tcs-config = <ACTIVE_TCS  2>,
>> +                                         <SLEEP_TCS   3>,
>> +                                         <WAKE_TCS    3>,
>> +                                         <CONTROL_TCS 1>;
>> +               };
>>          };
Maulik Shah March 8, 2021, 5:21 a.m. UTC | #3 
Hi,

On 3/5/2021 11:12 AM, Rajendra Nayak wrote:
>

> On 3/4/2021 5:34 AM, Stephen Boyd wrote:

>> Quoting Rajendra Nayak (2021-03-03 04:17:49)

>>> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi 

>>> b/arch/arm64/boot/dts/qcom/sc7280.dtsi

>>> index 4a56d9c..21c2399 100644

>>> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi

>>> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi

>>> @@ -30,6 +31,18 @@

>>>                  };

>>>          };

>>>   +       reserved_memory: reserved-memory {

>>

>> Do we plan to use this label at any point? I'd prefer we remove this

>> until it becomes useful.

>

> sure, i'll drop it

>

>>

>>> +               #address-cells = <2>;

>>> +               #size-cells = <2>;

>>> +               ranges;

>>> +

>>> +               aop_cmd_db_mem: memory@80860000 {

>>> +                       reg = <0x0 0x80860000 0x0 0x20000>;

>>> +                       compatible = "qcom,cmd-db";

>>> +                       no-map;

>>> +               };

>>> +       };

>>> +

>>>          cpus {

>>>                  #address-cells = <2>;

>>>                  #size-cells = <0>;

>>> @@ -203,6 +229,7 @@

>>>                          interrupt-controller;

>>>                          #interrupt-cells = <2>;

>>>                          gpio-ranges = <&tlmm 0 0 175>;

>>> +                       wakeup-parent = <&pdc>;

>>>                            qup_uart5_default: qup-uart5-default {

>>>                                  pins = "gpio46", "gpio47";

>>> @@ -287,6 +314,23 @@

>>>                                  status = "disabled";

>>>                          };

>>>                  };

>>> +

>>> +               apps_rsc: rsc@18200000 {

>>

>> Any better name than 'rsc'? Maybe 'power-controller'?

>

> hmm, Maulik, any thoughts? This would perhaps need the bindings docs

> to be updated as well (and maybe the existing platform DTs using rsc too)


I think we should be good with rsc (resource-state-coordinator). RSC 
itself don't do any resource power management.

Thanks,
Maulik
>

>>

>>> +                       compatible = "qcom,rpmh-rsc";

>>> +                       reg = <0 0x18200000 0 0x10000>,

>>> +                             <0 0x18210000 0 0x10000>,

>>> +                             <0 0x18220000 0 0x10000>;

>>> +                       reg-names = "drv-0", "drv-1", "drv-2";

>>> +                       interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,

>>> +                                    <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,

>>> +                                    <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;

>>> +                       qcom,tcs-offset = <0xd00>;

>>> +                       qcom,drv-id = <2>;

>>> +                       qcom,tcs-config = <ACTIVE_TCS 2>,

>>> +                                         <SLEEP_TCS 3>,

>>> +                                         <WAKE_TCS 3>,

>>> +                                         <CONTROL_TCS 1>;

>>> +               };

>>>          };

>

-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
Stephen Boyd March 23, 2021, 7:06 a.m. UTC | #4 
Quoting Maulik Shah (2021-03-07 21:21:04)
> Hi,

> 

> On 3/5/2021 11:12 AM, Rajendra Nayak wrote:

> >

> > On 3/4/2021 5:34 AM, Stephen Boyd wrote:

> >> Quoting Rajendra Nayak (2021-03-03 04:17:49)

> >>> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi 

> >>> b/arch/arm64/boot/dts/qcom/sc7280.dtsi

> >>> index 4a56d9c..21c2399 100644

> >>> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi

> >>> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi

> >>> @@ -30,6 +31,18 @@

> >>>                  };

> >>>          };

> >>>   +       reserved_memory: reserved-memory {

> >>

> >> Do we plan to use this label at any point? I'd prefer we remove this

> >> until it becomes useful.

> >

> > sure, i'll drop it

> >

> >>

> >>> +               #address-cells = <2>;

> >>> +               #size-cells = <2>;

> >>> +               ranges;

> >>> +

> >>> +               aop_cmd_db_mem: memory@80860000 {

> >>> +                       reg = <0x0 0x80860000 0x0 0x20000>;

> >>> +                       compatible = "qcom,cmd-db";

> >>> +                       no-map;

> >>> +               };

> >>> +       };

> >>> +

> >>>          cpus {

> >>>                  #address-cells = <2>;

> >>>                  #size-cells = <0>;

> >>> @@ -203,6 +229,7 @@

> >>>                          interrupt-controller;

> >>>                          #interrupt-cells = <2>;

> >>>                          gpio-ranges = <&tlmm 0 0 175>;

> >>> +                       wakeup-parent = <&pdc>;

> >>>                            qup_uart5_default: qup-uart5-default {

> >>>                                  pins = "gpio46", "gpio47";

> >>> @@ -287,6 +314,23 @@

> >>>                                  status = "disabled";

> >>>                          };

> >>>                  };

> >>> +

> >>> +               apps_rsc: rsc@18200000 {

> >>

> >> Any better name than 'rsc'? Maybe 'power-controller'?

> >

> > hmm, Maulik, any thoughts? This would perhaps need the bindings docs

> > to be updated as well (and maybe the existing platform DTs using rsc too)

> 

> I think we should be good with rsc (resource-state-coordinator). RSC 

> itself don't do any resource power management.

> 


Maybe 'mailbox' then? Or 'remoteproc'? I am not "good" with rsc as it
isn't part of the standardized nodes names per the DT spec.
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 4a56d9c..21c2399 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -7,6 +7,7 @@ 
 
 #include <dt-bindings/clock/qcom,gcc-sc7280.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/soc/qcom,rpmh-rsc.h>
 
 / {
 	interrupt-parent = <&intc>;
@@ -30,6 +31,18 @@ 
 		};
 	};
 
+	reserved_memory: reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		aop_cmd_db_mem: memory@80860000 {
+			reg = <0x0 0x80860000 0x0 0x20000>;
+			compatible = "qcom,cmd-db";
+			no-map;
+		};
+	};
+
 	cpus {
 		#address-cells = <2>;
 		#size-cells = <0>;
@@ -194,6 +207,19 @@ 
 			};
 		};
 
+		pdc: interrupt-controller@b220000 {
+			compatible = "qcom,sc7280-pdc", "qcom,pdc";
+			reg = <0 0x0b220000 0 0x30000>;
+			qcom,pdc-ranges = <0 480 40>, <40 140 14>, <54 263 1>,
+					  <55 306 4>, <59 312 3>, <62 374 2>,
+					  <64 434 2>, <66 438 3>, <69 86 1>,
+					  <70 520 54>, <124 609 31>, <155 63 1>,
+					  <156 716 12>;
+			#interrupt-cells = <2>;
+			interrupt-parent = <&intc>;
+			interrupt-controller;
+		};
+
 		tlmm: pinctrl@f100000 {
 			compatible = "qcom,sc7280-pinctrl";
 			reg = <0 0x0f100000 0 0x1000000>;
@@ -203,6 +229,7 @@ 
 			interrupt-controller;
 			#interrupt-cells = <2>;
 			gpio-ranges = <&tlmm 0 0 175>;
+			wakeup-parent = <&pdc>;
 
 			qup_uart5_default: qup-uart5-default {
 				pins = "gpio46", "gpio47";
@@ -287,6 +314,23 @@ 
 				status = "disabled";
 			};
 		};
+
+		apps_rsc: rsc@18200000 {
+			compatible = "qcom,rpmh-rsc";
+			reg = <0 0x18200000 0 0x10000>,
+			      <0 0x18210000 0 0x10000>,
+			      <0 0x18220000 0 0x10000>;
+			reg-names = "drv-0", "drv-1", "drv-2";
+			interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+			qcom,tcs-offset = <0xd00>;
+			qcom,drv-id = <2>;
+			qcom,tcs-config = <ACTIVE_TCS  2>,
+					  <SLEEP_TCS   3>,
+					  <WAKE_TCS    3>,
+					  <CONTROL_TCS 1>;
+		};
 	};
 
 	timer {