| Message ID | 20210211060532.23662-1-nava.manne@xilinx.com |
|---|---|
| Headers | show |
| Series | Add Bitstream configuration support for Versal | expand |
Hi-- On 2/10/21 10:05 PM, Nava kishore Manne wrote: > diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig > index bf85b9a65ec2..dcd2ed5a7956 100644 > --- a/drivers/fpga/Kconfig > +++ b/drivers/fpga/Kconfig > @@ -223,4 +223,12 @@ config FPGA_MGR_ZYNQMP_FPGA > to configure the programmable logic(PL) through PS > on ZynqMP SoC. > > +config FPGA_MGR_VERSAL_FPGA > + tristate "Xilinx Versal FPGA" > + depends on ARCH_ZYNQMP || COMPILE_TEST > + help > + Select this option to enable FPGA manager driver support for > + Xilinx Versal SOC. This driver uses the versal soc firmware How about consistently capitalizing Versal and SOC (above and below)? > + interface to load programmable logic(PL) images > + on versal soc. > endif # FPGA thanks.
Hi Rob, Please find my response inline. > -----Original Message----- > From: Rob Herring <robh@kernel.org> > Sent: Thursday, February 11, 2021 8:26 PM > To: Nava kishore Manne <navam@xilinx.com> > Cc: linux-arm-kernel@lists.infradead.org; mdf@kernel.org; linux- > fpga@vger.kernel.org; git <git@xilinx.com>; Appana Durga Kedareswara Rao > <appanad@xilinx.com>; devicetree@vger.kernel.org; robh+dt@kernel.org; > chinnikishore369@gmail.com; linux-kernel@vger.kernel.org; > trix@redhat.com; Michal Simek <michals@xilinx.com> > Subject: Re: [PATCH v2 2/3] dt-bindings: fpga: Add binding doc for versal fpga > manager > > On Thu, 11 Feb 2021 11:35:31 +0530, Nava kishore Manne wrote: > > From: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com> > > > > This patch adds binding doc for versal fpga manager driver. > > > > Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com> > > Signed-off-by: Appana Durga Kedareswara rao > > <appana.durga.rao@xilinx.com> > > --- > > Changes for v2: > > -Fixed file format and syntax issues. > > > > .../bindings/fpga/xlnx,versal-fpga.yaml | 33 +++++++++++++++++++ > > 1 file changed, 33 insertions(+) > > create mode 100644 > > Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml > > > > My bot found errors running 'make dt_binding_check' on your patch: > > yamllint warnings/errors: > ./Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml:12:14: > [warning] too many spaces after colon (colons) > ./Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml:20:9: > [warning] wrong indentation: expected 10 but found 8 (indentation) > > dtschema/dtc warnings/errors: > > See https://patchwork.ozlabs.org/patch/1439305 > > This check can fail if there are any dependencies. The base for a patch series > is generally the most recent rc1. > > If you already ran 'make dt_binding_check' and didn't see the above error(s), > then make sure 'yamllint' is installed and dt-schema is up to > date: > > pip3 install dtschema --upgrade > > Please check and re-submit. Initially, I couldn't see any issue when I run. After installing yamllint and with upgraded dt-schema, I am able to reproduce the above pointed issues. Is there any prerequisite(Other than yamllint) I need to follow to run dt-schema? Regards, Navakishore.
On Fri, Feb 12, 2021 at 06:13:33AM +0000, Nava kishore Manne wrote: > Hi Rob, > > Please find my response inline. > > > -----Original Message----- > > From: Rob Herring <robh@kernel.org> > > Sent: Thursday, February 11, 2021 8:26 PM > > To: Nava kishore Manne <navam@xilinx.com> > > Cc: linux-arm-kernel@lists.infradead.org; mdf@kernel.org; linux- > > fpga@vger.kernel.org; git <git@xilinx.com>; Appana Durga Kedareswara Rao > > <appanad@xilinx.com>; devicetree@vger.kernel.org; robh+dt@kernel.org; > > chinnikishore369@gmail.com; linux-kernel@vger.kernel.org; > > trix@redhat.com; Michal Simek <michals@xilinx.com> > > Subject: Re: [PATCH v2 2/3] dt-bindings: fpga: Add binding doc for versal fpga > > manager > > > > On Thu, 11 Feb 2021 11:35:31 +0530, Nava kishore Manne wrote: > > > From: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com> > > > > > > This patch adds binding doc for versal fpga manager driver. > > > > > > Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com> > > > Signed-off-by: Appana Durga Kedareswara rao > > > <appana.durga.rao@xilinx.com> > > > --- > > > Changes for v2: > > > -Fixed file format and syntax issues. > > > > > > .../bindings/fpga/xlnx,versal-fpga.yaml | 33 +++++++++++++++++++ > > > 1 file changed, 33 insertions(+) > > > create mode 100644 > > > Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml > > > > > > > My bot found errors running 'make dt_binding_check' on your patch: > > > > yamllint warnings/errors: > > ./Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml:12:14: > > [warning] too many spaces after colon (colons) > > ./Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml:20:9: > > [warning] wrong indentation: expected 10 but found 8 (indentation) > > > > dtschema/dtc warnings/errors: > > > > See https://patchwork.ozlabs.org/patch/1439305 > > > > This check can fail if there are any dependencies. The base for a patch series > > is generally the most recent rc1. > > > > If you already ran 'make dt_binding_check' and didn't see the above error(s), > > then make sure 'yamllint' is installed and dt-schema is up to > > date: > > > > pip3 install dtschema --upgrade > > > > Please check and re-submit. > > Initially, I couldn't see any issue when I run. > After installing yamllint and with upgraded dt-schema, I am able to reproduce the above pointed issues. > Is there any prerequisite(Other than yamllint) I need to follow to run dt-schema? No, just keeping dtschema up to date. Rob