| Message ID | 4ece21a7e9691ed1e775fd6b0b4046b1562e44bd.1612951821.git.michal.simek@xilinx.com |
|---|---|
| State | Accepted |
| Commit | 19e1f484a6bb452d28d79cf41f280cdfde3176a9 |
| Headers | show |
| Series | [v2] dt-bindings: spi: zynq: Convert Zynq QSPI binding to yaml | expand |
On Wed, 10 Feb 2021 11:10:25 +0100, Michal Simek wrote: > Convert spi-zynq-qspi.txt to yaml. > > Signed-off-by: Michal Simek <michal.simek@xilinx.com> > --- > > Changes in v2: > - s/additionalProperties: true/unevaluatedProperties: false/ > > .../devicetree/bindings/spi/spi-zynq-qspi.txt | 25 -------- > .../bindings/spi/xlnx,zynq-qspi.yaml | 59 +++++++++++++++++++ > MAINTAINERS | 1 + > 3 files changed, 60 insertions(+), 25 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/spi/spi-zynq-qspi.txt > create mode 100644 Documentation/devicetree/bindings/spi/xlnx,zynq-qspi.yaml > Reviewed-by: Rob Herring <robh@kernel.org>
On Thu, Feb 11, 2021 at 10:37:30AM +0100, Michal Simek wrote: > st 10. 2. 2021 v 11:10 odesÃlatel Michal Simek <michal.simek@xilinx.com> napsal: > > +description: > > + The Xilinx Zynq QSPI controller is used to access multi-bit serial flash > > + memory devices. > Applied. Doesn't really matter here but I would really expect subsystem binding documents to go through the subsystem tree.
On 2/11/21 1:39 PM, Mark Brown wrote: > On Thu, Feb 11, 2021 at 10:37:30AM +0100, Michal Simek wrote: >> st 10. 2. 2021 v 11:10 odesÃlatel Michal Simek <michal.simek@xilinx.com> napsal: > >>> +description: >>> + The Xilinx Zynq QSPI controller is used to access multi-bit serial flash >>> + memory devices. > >> Applied. > > Doesn't really matter here but I would really expect subsystem binding > documents to go through the subsystem tree. Sorry about it. I will keep that in my mind for future. Thanks, Michal
diff --git a/Documentation/devicetree/bindings/spi/spi-zynq-qspi.txt b/Documentation/devicetree/bindings/spi/spi-zynq-qspi.txt deleted file mode 100644 index 16b734ad3102..000000000000 --- a/Documentation/devicetree/bindings/spi/spi-zynq-qspi.txt +++ /dev/null @@ -1,25 +0,0 @@ -Xilinx Zynq QSPI controller Device Tree Bindings -------------------------------------------------------------------- - -Required properties: -- compatible : Should be "xlnx,zynq-qspi-1.0". -- reg : Physical base address and size of QSPI registers map. -- interrupts : Property with a value describing the interrupt - number. -- clock-names : List of input clock names - "ref_clk", "pclk" - (See clock bindings for details). -- clocks : Clock phandles (see clock bindings for details). - -Optional properties: -- num-cs : Number of chip selects used. - -Example: - qspi: spi@e000d000 { - compatible = "xlnx,zynq-qspi-1.0"; - reg = <0xe000d000 0x1000>; - interrupt-parent = <&intc>; - interrupts = <0 19 4>; - clock-names = "ref_clk", "pclk"; - clocks = <&clkc 10>, <&clkc 43>; - num-cs = <1>; - }; diff --git a/Documentation/devicetree/bindings/spi/xlnx,zynq-qspi.yaml b/Documentation/devicetree/bindings/spi/xlnx,zynq-qspi.yaml new file mode 100644 index 000000000000..1f1c40a9f320 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/xlnx,zynq-qspi.yaml @@ -0,0 +1,59 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/xlnx,zynq-qspi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xilinx Zynq QSPI controller + +description: + The Xilinx Zynq QSPI controller is used to access multi-bit serial flash + memory devices. + +allOf: + - $ref: "spi-controller.yaml#" + +maintainers: + - Michal Simek <michal.simek@xilinx.com> + +# Everything else is described in the common file +properties: + compatible: + const: xlnx,zynq-qspi-1.0 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: reference clock + - description: peripheral clock + + clock-names: + items: + - const: ref_clk + - const: pclk + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +unevaluatedProperties: false + +examples: + - | + spi@e000d000 { + compatible = "xlnx,zynq-qspi-1.0"; + reg = <0xe000d000 0x1000>; + interrupt-parent = <&intc>; + interrupts = <0 19 4>; + clock-names = "ref_clk", "pclk"; + clocks = <&clkc 10>, <&clkc 43>; + num-cs = <1>; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 546aa66428c9..e494b061dcd1 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2766,6 +2766,7 @@ W: http://wiki.xilinx.com T: git https://github.com/Xilinx/linux-xlnx.git F: Documentation/devicetree/bindings/i2c/cdns,i2c-r1p10.yaml F: Documentation/devicetree/bindings/i2c/xlnx,xps-iic-2.00.a.yaml +F: Documentation/devicetree/bindings/spi/xlnx,zynq-qspi.yaml F: arch/arm/mach-zynq/ F: drivers/block/xsysace.c F: drivers/clocksource/timer-cadence-ttc.c
Convert spi-zynq-qspi.txt to yaml. Signed-off-by: Michal Simek <michal.simek@xilinx.com> --- Changes in v2: - s/additionalProperties: true/unevaluatedProperties: false/ .../devicetree/bindings/spi/spi-zynq-qspi.txt | 25 -------- .../bindings/spi/xlnx,zynq-qspi.yaml | 59 +++++++++++++++++++ MAINTAINERS | 1 + 3 files changed, 60 insertions(+), 25 deletions(-) delete mode 100644 Documentation/devicetree/bindings/spi/spi-zynq-qspi.txt create mode 100644 Documentation/devicetree/bindings/spi/xlnx,zynq-qspi.yaml