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[stable-5.10,1/2] drm/i915: Fix ICL MG PHY vswing handling

Message ID 20210208175341.8695-1-ville.syrjala@linux.intel.com
State Accepted
Commit 5ec346476e795089b7dac8ab9dcee30c8d80ad84
Headers show
Series [stable-5.10,1/2] drm/i915: Fix ICL MG PHY vswing handling | expand

Commit Message

Ville Syrjala Feb. 8, 2021, 5:53 p.m. UTC 
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

commit a2a5f5628e5494ca9353f761f7fe783dfa82fb9a upstream.

The MH PHY vswing table does have all the entries these days. Get
rid of the old hacks in the code which claim otherwise.

This hack was totally bogus anyway. The correct way to handle the
lack of those two entries would have been to declare our max
vswing and pre-emph to both be level 2.

Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Clinton Taylor <clinton.a.taylor@intel.com>
Fixes: 9f7ffa297978 ("drm/i915/tc/icl: Update TC vswing tables")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201207203512.1718-1-ville.syrjala@linux.intel.com
Reviewed-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
(cherry picked from commit 5ec346476e795089b7dac8ab9dcee30c8d80ad84)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
(cherry picked from commit a2a5f5628e5494ca9353f761f7fe783dfa82fb9a)
---
 drivers/gpu/drm/i915/display/intel_ddi.c | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

Comments

Greg KH Feb. 11, 2021, 2:18 p.m. UTC | #1 
On Mon, Feb 08, 2021 at 07:53:41PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>

> 

> commit eaf5bfe37db871031232d2bf2535b6ca92afbad8 upstream.

> 

> In thunderbolt mode the PHY is owned by the thunderbolt controller.

> We are not supposed to touch it. So skip the vswing programming

> as well (we already skipped the other steps not applicable to TBT).

> 

> Touching this stuff could supposedly interfere with the PHY

> programming done by the thunderbolt controller.

> 

> Cc: stable@vger.kernel.org

> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> Link: https://patchwork.freedesktop.org/patch/msgid/20210128155948.13678-1-ville.syrjala@linux.intel.com

> Reviewed-by: Imre Deak <imre.deak@intel.com>

> (cherry picked from commit f8c6b615b921d8a1bcd74870f9105e62b0bceff3)

> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

> (cherry picked from commit eaf5bfe37db871031232d2bf2535b6ca92afbad8)

> ---

>  drivers/gpu/drm/i915/display/intel_ddi.c | 6 ++++++

>  1 file changed, 6 insertions(+)


Both n ow queued up,t hanks.

greg k-h
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 3f2bbd9370a8..51f4f4374dea 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -2605,12 +2605,11 @@  static void icl_mg_phy_ddi_vswing_sequence(struct intel_encoder *encoder,
 
 	ddi_translations = icl_get_mg_buf_trans(encoder, type, rate,
 						&n_entries);
-	/* The table does not have values for level 3 and level 9. */
-	if (level >= n_entries || level == 3 || level == 9) {
+	if (level >= n_entries) {
 		drm_dbg_kms(&dev_priv->drm,
 			    "DDI translation not found for level %d. Using %d instead.",
-			    level, n_entries - 2);
-		level = n_entries - 2;
+			    level, n_entries - 1);
+		level = n_entries - 1;
 	}
 
 	/* Set MG_TX_LINK_PARAMS cri_use_fs32 to 0. */