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[v2,3/3] ARM: pxa/pj4: Port problematic pj4 support code to v7/Thumb-2

Message ID 1315497854-13311-4-git-send-email-dave.martin@linaro.org
State New
Headers show

Commit Message

Dave Martin Sept. 8, 2011, 4:04 p.m. UTC
The iwmmxt code contains some code to implement a pseudo-ISB, but
this is not buildable for Thumb-2.

This patch replaces the pseudo-ISB with a real one on v7 and above.

Signed-off-by: Dave Martin <dave.martin@linaro.org>
---
 arch/arm/kernel/pj4-cp0.c |    4 ++++
 1 files changed, 4 insertions(+), 0 deletions(-)

Comments

Arnd Bergmann Sept. 8, 2011, 4:44 p.m. UTC | #1
On Thursday 08 September 2011, Dave Martin wrote:
>         __asm__ __volatile__ (
>                 "mcr    p15, 0, %1, c1, c0, 2\n\t"
> +#ifdef __LINUX_ARM_ARCH__ >= 7
> +               "isb\n\t"
> +#else
>                 "mrc    p15, 0, %0, c1, c0, 2\n\t"
>                 "mov    %0, %0\n\t"
>                 "sub    pc, pc, #4\n\t"
> +#endif
>                 : "=r" (temp) : "r" (value));
>  }

I thought we had concluded that we don't actually need the #else
path because there is no pre-v7 support for pj4 any more.

	Arnd
Nicolas Pitre Sept. 8, 2011, 5:06 p.m. UTC | #2
On Thu, 8 Sep 2011, Dave Martin wrote:

> The iwmmxt code contains some code to implement a pseudo-ISB, but
> this is not buildable for Thumb-2.
> 
> This patch replaces the pseudo-ISB with a real one on v7 and above.
> 
> Signed-off-by: Dave Martin <dave.martin@linaro.org>

In arch/arm/mm/Kconfig:

config CPU_PJ4
        bool
        select CPU_V7
        select ARM_THUMBEE

So this code may only be ARMv7 aware now.


Nicolas
Eric Miao Sept. 8, 2011, 5:06 p.m. UTC | #3
On Thu, Sep 8, 2011 at 10:06 AM, Nicolas Pitre <nicolas.pitre@linaro.org> wrote:
> On Thu, 8 Sep 2011, Dave Martin wrote:
>
>> The iwmmxt code contains some code to implement a pseudo-ISB, but
>> this is not buildable for Thumb-2.
>>
>> This patch replaces the pseudo-ISB with a real one on v7 and above.
>>
>> Signed-off-by: Dave Martin <dave.martin@linaro.org>
>
> In arch/arm/mm/Kconfig:
>
> config CPU_PJ4
>        bool
>        select CPU_V7
>        select ARM_THUMBEE
>
> So this code may only be ARMv7 aware now.
>

True.
Dave Martin Sept. 8, 2011, 5:23 p.m. UTC | #4
On Thu, Sep 08, 2011 at 06:44:21PM +0200, Arnd Bergmann wrote:
> On Thursday 08 September 2011, Dave Martin wrote:
> >         __asm__ __volatile__ (
> >                 "mcr    p15, 0, %1, c1, c0, 2\n\t"
> > +#ifdef __LINUX_ARM_ARCH__ >= 7
> > +               "isb\n\t"
> > +#else
> >                 "mrc    p15, 0, %0, c1, c0, 2\n\t"
> >                 "mov    %0, %0\n\t"
> >                 "sub    pc, pc, #4\n\t"
> > +#endif
> >                 : "=r" (temp) : "r" (value));
> >  }
> 
> I thought we had concluded that we don't actually need the #else
> path because there is no pre-v7 support for pj4 any more.
> 

Ah, OK -- I somewhat missed the point, the was focusing on the other
patches (I notice I didn't fix #ifdef to #if either...)

Anyway, this patch can be drastically simplified -- i.e.,
the #if conditional should just go away, along with the
xscale-style code (which really doesn't make sense for a v7-only
file).

So we'd end up with something like:

        __asm__ __volatile__ (
                "mcr    p15, 0, %0, c1, c0, 2\n\t"
                "isb"
                : "r" (value));

Better?

Cheers
---Dave
diff mbox

Patch

diff --git a/arch/arm/kernel/pj4-cp0.c b/arch/arm/kernel/pj4-cp0.c
index a4b1b07..5117d9d 100644
--- a/arch/arm/kernel/pj4-cp0.c
+++ b/arch/arm/kernel/pj4-cp0.c
@@ -66,9 +66,13 @@  static void __init pj4_cp_access_write(u32 value)
 
 	__asm__ __volatile__ (
 		"mcr	p15, 0, %1, c1, c0, 2\n\t"
+#ifdef __LINUX_ARM_ARCH__ >= 7
+		"isb\n\t"
+#else
 		"mrc	p15, 0, %0, c1, c0, 2\n\t"
 		"mov	%0, %0\n\t"
 		"sub	pc, pc, #4\n\t"
+#endif
 		: "=r" (temp) : "r" (value));
 }