diff mbox series

[PULL,22/27] target/tricore: Convert to CPUClass::tlb_fill

Message ID 20190510151944.22981-23-richard.henderson@linaro.org
State New
Headers show
Series tcg: Add CPUClass::tlb_fill | expand

Commit Message

Richard Henderson May 10, 2019, 3:19 p.m. UTC 
Acked-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 target/tricore/cpu.h       |  6 +++---
 target/tricore/cpu.c       |  1 +
 target/tricore/helper.c    | 27 +++++++++++++++++++--------
 target/tricore/op_helper.c | 26 --------------------------
 4 files changed, 23 insertions(+), 37 deletions(-)

-- 
2.17.1

Comments

Philippe Mathieu-Daudé Jan. 27, 2021, 7:47 p.m. UTC | #1 
Hi Richard,

On 5/10/19 5:19 PM, Richard Henderson wrote:
> Acked-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>

> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

> ---

>  target/tricore/cpu.h       |  6 +++---

>  target/tricore/cpu.c       |  1 +

>  target/tricore/helper.c    | 27 +++++++++++++++++++--------

>  target/tricore/op_helper.c | 26 --------------------------

>  4 files changed, 23 insertions(+), 37 deletions(-)

...

>  #define DEFINE_TRICORE_CPU_TYPE(cpu_model, initfn) \

> diff --git a/target/tricore/helper.c b/target/tricore/helper.c

> index 78ee87c9ea..ed184fee3a 100644

> --- a/target/tricore/helper.c

> +++ b/target/tricore/helper.c

> @@ -50,8 +50,9 @@ static void raise_mmu_exception(CPUTriCoreState *env, target_ulong address,

>  {

>  }

>  

> -int cpu_tricore_handle_mmu_fault(CPUState *cs, target_ulong address,

> -                                 int rw, int mmu_idx)

> +bool tricore_cpu_tlb_fill(CPUState *cs, vaddr address, int size,

> +                          MMUAccessType rw, int mmu_idx,

> +                          bool probe, uintptr_t retaddr)

>  {

>      TriCoreCPU *cpu = TRICORE_CPU(cs);

>      CPUTriCoreState *env = &cpu->env;


Completing the patch:

       hwaddr physical;
       int prot;
       int access_type;
       int ret = 0;

       rw &= 1;

       ^^^^^^^

This became a bit fragile... Having:

typedef enum MMUAccessType {
    MMU_DATA_LOAD  = 0,
    MMU_DATA_STORE = 1,
    MMU_INST_FETCH = 2
} MMUAccessType;

I see this enum has fixed value, but still...

Maybe we could have an helper to explicit the 'rw &= 1' magic?

>      access_type = ACCESS_INT;

>      ret = get_physical_address(env, &physical, &prot,

>                                 address, rw, access_type);

> -    qemu_log_mask(CPU_LOG_MMU, "%s address=" TARGET_FMT_lx " ret %d physical " TARGET_FMT_plx

> -                  " prot %d\n", __func__, address, ret, physical, prot);

> +

> +    qemu_log_mask(CPU_LOG_MMU, "%s address=" TARGET_FMT_lx " ret %d physical "

> +                  TARGET_FMT_plx " prot %d\n",

> +                  __func__, (target_ulong)address, ret, physical, prot);

>  

>      if (ret == TLBRET_MATCH) {

>          tlb_set_page(cs, address & TARGET_PAGE_MASK,

>                       physical & TARGET_PAGE_MASK, prot | PAGE_EXEC,

>                       mmu_idx, TARGET_PAGE_SIZE);

> -        ret = 0;

> -    } else if (ret < 0) {

> +        return true;

> +    } else {

> +        assert(ret < 0);

> +        if (probe) {

> +            return false;

> +        }

>          raise_mmu_exception(env, address, rw, ret);

> -        ret = 1;

> +        cpu_loop_exit_restore(cs, retaddr);

>      }

> +}
diff mbox series

Patch

diff --git a/target/tricore/cpu.h b/target/tricore/cpu.h
index 64d1a9c75e..287f4328a3 100644
--- a/target/tricore/cpu.h
+++ b/target/tricore/cpu.h
@@ -417,8 +417,8 @@  static inline void cpu_get_tb_cpu_state(CPUTriCoreState *env, target_ulong *pc,
 #define CPU_RESOLVING_TYPE TYPE_TRICORE_CPU
 
 /* helpers.c */
-int cpu_tricore_handle_mmu_fault(CPUState *cpu, target_ulong address,
-                                 int rw, int mmu_idx);
-#define cpu_handle_mmu_fault cpu_tricore_handle_mmu_fault
+bool tricore_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
+                          MMUAccessType access_type, int mmu_idx,
+                          bool probe, uintptr_t retaddr);
 
 #endif /* TRICORE_CPU_H */
diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c
index e8d37e4040..ea1199d27e 100644
--- a/target/tricore/cpu.c
+++ b/target/tricore/cpu.c
@@ -166,6 +166,7 @@  static void tricore_cpu_class_init(ObjectClass *c, void *data)
     cc->synchronize_from_tb = tricore_cpu_synchronize_from_tb;
     cc->get_phys_page_attrs_debug = tricore_cpu_get_phys_page_attrs_debug;
     cc->tcg_initialize = tricore_tcg_init;
+    cc->tlb_fill = tricore_cpu_tlb_fill;
 }
 
 #define DEFINE_TRICORE_CPU_TYPE(cpu_model, initfn) \
diff --git a/target/tricore/helper.c b/target/tricore/helper.c
index 78ee87c9ea..ed184fee3a 100644
--- a/target/tricore/helper.c
+++ b/target/tricore/helper.c
@@ -50,8 +50,9 @@  static void raise_mmu_exception(CPUTriCoreState *env, target_ulong address,
 {
 }
 
-int cpu_tricore_handle_mmu_fault(CPUState *cs, target_ulong address,
-                                 int rw, int mmu_idx)
+bool tricore_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
+                          MMUAccessType rw, int mmu_idx,
+                          bool probe, uintptr_t retaddr)
 {
     TriCoreCPU *cpu = TRICORE_CPU(cs);
     CPUTriCoreState *env = &cpu->env;
@@ -64,20 +65,30 @@  int cpu_tricore_handle_mmu_fault(CPUState *cs, target_ulong address,
     access_type = ACCESS_INT;
     ret = get_physical_address(env, &physical, &prot,
                                address, rw, access_type);
-    qemu_log_mask(CPU_LOG_MMU, "%s address=" TARGET_FMT_lx " ret %d physical " TARGET_FMT_plx
-                  " prot %d\n", __func__, address, ret, physical, prot);
+
+    qemu_log_mask(CPU_LOG_MMU, "%s address=" TARGET_FMT_lx " ret %d physical "
+                  TARGET_FMT_plx " prot %d\n",
+                  __func__, (target_ulong)address, ret, physical, prot);
 
     if (ret == TLBRET_MATCH) {
         tlb_set_page(cs, address & TARGET_PAGE_MASK,
                      physical & TARGET_PAGE_MASK, prot | PAGE_EXEC,
                      mmu_idx, TARGET_PAGE_SIZE);
-        ret = 0;
-    } else if (ret < 0) {
+        return true;
+    } else {
+        assert(ret < 0);
+        if (probe) {
+            return false;
+        }
         raise_mmu_exception(env, address, rw, ret);
-        ret = 1;
+        cpu_loop_exit_restore(cs, retaddr);
     }
+}
 
-    return ret;
+void tlb_fill(CPUState *cs, target_ulong addr, int size,
+              MMUAccessType access_type, int mmu_idx, uintptr_t retaddr)
+{
+    tricore_cpu_tlb_fill(cs, addr, size, access_type, mmu_idx, false, retaddr);
 }
 
 static void tricore_cpu_list_entry(gpointer data, gpointer user_data)
diff --git a/target/tricore/op_helper.c b/target/tricore/op_helper.c
index ed9dc0c83e..601e92f92a 100644
--- a/target/tricore/op_helper.c
+++ b/target/tricore/op_helper.c
@@ -2793,29 +2793,3 @@  uint32_t helper_psw_read(CPUTriCoreState *env)
 {
     return psw_read(env);
 }
-
-
-static inline void QEMU_NORETURN do_raise_exception_err(CPUTriCoreState *env,
-                                                        uint32_t exception,
-                                                        int error_code,
-                                                        uintptr_t pc)
-{
-    CPUState *cs = CPU(tricore_env_get_cpu(env));
-    cs->exception_index = exception;
-    env->error_code = error_code;
-    /* now we have a real cpu fault */
-    cpu_loop_exit_restore(cs, pc);
-}
-
-void tlb_fill(CPUState *cs, target_ulong addr, int size,
-              MMUAccessType access_type, int mmu_idx, uintptr_t retaddr)
-{
-    int ret;
-    ret = cpu_tricore_handle_mmu_fault(cs, addr, access_type, mmu_idx);
-    if (ret) {
-        TriCoreCPU *cpu = TRICORE_CPU(cs);
-        CPUTriCoreState *env = &cpu->env;
-        do_raise_exception_err(env, cs->exception_index,
-                               env->error_code, retaddr);
-    }
-}