| Message ID | 1604502407-14352-1-git-send-email-shubhrajyoti.datta@xilinx.com |
|---|---|
| Headers | show |
| Series | clk: clk-wizard: clock-wizard: Driver updates | expand |
On Wed, 04 Nov 2020 20:36:41 +0530, Shubhrajyoti Datta wrote: > Add the devicetree binding for the xilinx clocking wizard. > > Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> > --- > v6: > Fix a yaml warning > v7: > Add vendor prefix speed-grade > > .../bindings/clock/xlnx,clocking-wizard.yaml | 65 ++++++++++++++++++++++ > 1 file changed, 65 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml > My bot found errors running 'make dt_binding_check' on your patch: yamllint warnings/errors: ./Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml:21:7: [warning] wrong indentation: expected 4 but found 6 (indentation) ./Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml:38:7: [warning] wrong indentation: expected 4 but found 6 (indentation) ./Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml:40:5: [error] syntax error: expected <block end>, but found '<block mapping start>' (syntax) dtschema/dtc warnings/errors: Traceback (most recent call last): File "/usr/local/bin/dt-extract-example", line 45, in <module> binding = yaml.load(open(args.yamlfile, encoding='utf-8').read()) File "/usr/local/lib/python3.8/dist-packages/ruamel/yaml/main.py", line 343, in load return constructor.get_single_data() File "/usr/local/lib/python3.8/dist-packages/ruamel/yaml/constructor.py", line 111, in get_single_data node = self.composer.get_single_node() File "_ruamel_yaml.pyx", line 706, in _ruamel_yaml.CParser.get_single_node File "_ruamel_yaml.pyx", line 724, in _ruamel_yaml.CParser._compose_document File "_ruamel_yaml.pyx", line 775, in _ruamel_yaml.CParser._compose_node File "_ruamel_yaml.pyx", line 889, in _ruamel_yaml.CParser._compose_mapping_node File "_ruamel_yaml.pyx", line 775, in _ruamel_yaml.CParser._compose_node File "_ruamel_yaml.pyx", line 891, in _ruamel_yaml.CParser._compose_mapping_node File "_ruamel_yaml.pyx", line 904, in _ruamel_yaml.CParser._parse_next_event ruamel.yaml.parser.ParserError: while parsing a block mapping in "<unicode string>", line 20, column 3 did not find expected key in "<unicode string>", line 40, column 5 make[1]: *** [Documentation/devicetree/bindings/Makefile:20: Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.example.dts] Error 1 make[1]: *** Deleting file 'Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.example.dts' make[1]: *** Waiting for unfinished jobs.... make[1]: *** [Documentation/devicetree/bindings/Makefile:59: Documentation/devicetree/bindings/processed-schema-examples.json] Error 123 make: *** [Makefile:1364: dt_binding_check] Error 2 See https://patchwork.ozlabs.org/patch/1394053 The base for the patch is generally the last rc1. Any dependencies should be noted. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit.
On Wed, Nov 04, 2020 at 08:36:41PM +0530, Shubhrajyoti Datta wrote: > Add the devicetree binding for the xilinx clocking wizard. > > Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> > --- > v6: > Fix a yaml warning > v7: > Add vendor prefix speed-grade > > .../bindings/clock/xlnx,clocking-wizard.yaml | 65 ++++++++++++++++++++++ > 1 file changed, 65 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml > > diff --git a/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml b/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml > new file mode 100644 > index 0000000..a19b9bb > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml > @@ -0,0 +1,65 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/xlnx,clocking-wizard.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Xilinx clocking wizard > + > +maintainers: > + - Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> > + > +description: | > + The clocking wizard is a soft ip clocking block of Xilinx versal. It > + reads required input clock frequencies from the devicetree and acts as clock > + clock output. > + > +select: false Why? That's one way to make the example pass with your schema... > + > +properties: > + compatible: > + - enum: > + - xlnx,clocking-wizard > + > + "#clock-cells": > + const: 1 > + > + clocks: > + items: > + - description: clock input > + - description: axi clock > + > + clock-names: > + items: > + - const: clk_in1 > + - const: s_axi_aclk > + > + xlnx,speed-grade: > + - $ref: /schemas/types.yaml#/definitions/uint32 > + - enum: [1, 2, 3] > + description: > + Speed grade of the device. > + > +required: > + - compatible > + - "#clock-cells" > + - clocks > + - clock-names > + - speed-grade > + > +additionalProperties: false > + > +examples: > + - | > + clock-generator@40040000 { > + #clock-cells = <1>; > + reg = <0x40040000 0x1000>; > + compatible = "xlnx,clocking-wizard"; > + xlnx,speed-grade = <1>; > + clock-names = "clk_in1", "s_axi_aclk"; > + clocks = <&clkc 15>, <&clkc 15>; > + clock-output-names = "clk_out1", "clk_out2", > + "clk_out3", "clk_out4", "clk_out5", > + "clk_out6", "clk_out7"; > + }; > +... > -- > 2.1.1 >
Quoting Shubhrajyoti Datta (2020-11-04 07:06:40) > > Shubhrajyoti Datta (7): > dt-bindings: add documentation of xilinx clocking wizard Any chance to respond to Robs comments? > clk: clock-wizard: Add the clockwizard to clk directory Is it called 'wizard' anywhere in the documentation? I wonder if there is a better name that could be found for this. > clk: clock-wizard: Fix kernel-doc warning > clk: clock-wizard: Add support for dynamic reconfiguration > clk: clock-wizard: Add support for fractional support > clk: clock-wizard: Remove the hardcoding of the clock outputs > clk: clock-wizard: Update the fixed factor divisors >
Hi Stephen, On 04. 11. 20 16:06, Shubhrajyoti Datta wrote: > > In the thread [1] Greg suggested that we move the driver > to the clk from the staging. > Add patches to address the concerns regarding the fractional and > set rate support in the TODO. > > The patch set does the following > - Trivial fixes for kernel doc. > - Move the driver to the clk folder > - Add capability to set rate. > - Add fractional support. > - Add support for configurable outputs. > - Make the output names unique so that multiple instances > do not crib. > > Changes in the v3: > Added the cover-letter. > Add patches for rate setting and fractional support > Add patches for warning. > Remove the driver from staging as suggested > > v4: > Reorder the patches. > Merge the CLK_IS_BASIC patch. > Add the yaml form of binding document > > v5: > Fix a mismerge > > v6: > Fix the yaml warning > use poll timedout > > v7: > Binding doc updates > Use common divisor function. > > [1] https://spinics.net/lists/linux-driver-devel/msg117326.html > > Shubhrajyoti Datta (7): > dt-bindings: add documentation of xilinx clocking wizard > clk: clock-wizard: Add the clockwizard to clk directory > clk: clock-wizard: Fix kernel-doc warning > clk: clock-wizard: Add support for dynamic reconfiguration > clk: clock-wizard: Add support for fractional support > clk: clock-wizard: Remove the hardcoding of the clock outputs > clk: clock-wizard: Update the fixed factor divisors > > .../bindings/clock/xlnx,clocking-wizard.yaml | 65 ++ > drivers/clk/Kconfig | 9 + > drivers/clk/Makefile | 1 + > drivers/clk/clk-xlnx-clock-wizard.c | 689 +++++++++++++++++++++ > drivers/staging/Kconfig | 2 - > drivers/staging/Makefile | 1 - > drivers/staging/clocking-wizard/Kconfig | 10 - > drivers/staging/clocking-wizard/Makefile | 2 - > drivers/staging/clocking-wizard/TODO | 12 - > .../clocking-wizard/clk-xlnx-clock-wizard.c | 333 ---------- > drivers/staging/clocking-wizard/dt-binding.txt | 30 - > 11 files changed, 764 insertions(+), 390 deletions(-) > create mode 100644 Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml > create mode 100644 drivers/clk/clk-xlnx-clock-wizard.c > delete mode 100644 drivers/staging/clocking-wizard/Kconfig > delete mode 100644 drivers/staging/clocking-wizard/Makefile > delete mode 100644 drivers/staging/clocking-wizard/TODO > delete mode 100644 drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c > delete mode 100644 drivers/staging/clocking-wizard/dt-binding.txt > Can you please take a look at this series? Thanks, Michal
Quoting Michal Simek (2020-12-15 01:13:46) > > Can you please take a look at this series? > I did, see https://lore.kernel.org/r/160783777786.1580929.1950826106627397616@swboyd.mtv.corp.google.com
Hi Shubhrajyoti, Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> wrote on Wed, 4 Nov 2020 20:36:40 +0530: > In the thread [1] Greg suggested that we move the driver > to the clk from the staging. > Add patches to address the concerns regarding the fractional and > set rate support in the TODO. > > The patch set does the following > - Trivial fixes for kernel doc. > - Move the driver to the clk folder > - Add capability to set rate. > - Add fractional support. > - Add support for configurable outputs. > - Make the output names unique so that multiple instances > do not crib. Can someone tell me the status of this series? I think it would benefit everyone to have this driver "officially" supported in the main tree, unless there are crucial issues; in this case it might be good to know which ones? Thanks, Miquèl
Hi Stephen, First of all sorry for very slow response. I didn't get this email even xilinx alias is in CC. Something is really fishy here. On 12/13/20 6:36 AM, Stephen Boyd wrote: > Quoting Shubhrajyoti Datta (2020-11-04 07:06:40) >> >> Shubhrajyoti Datta (7): >> dt-bindings: add documentation of xilinx clocking wizard > > Any chance to respond to Robs comments? I will ensure that Rob's comments are addresses. > >> clk: clock-wizard: Add the clockwizard to clk directory > > Is it called 'wizard' anywhere in the documentation? I wonder if there > is a better name that could be found for this. It is really clocking wizard based on documentation. https://www.xilinx.com/support/documentation/ip_documentation/clk_wiz/v6_0/pg065-clk-wiz.pdf Can you please review that 6 patches if there is a need for any change for v8? Thanks, Michal
Hi Miquel, On 1/21/21 3:39 PM, Miquel Raynal wrote: > Hi Shubhrajyoti, > > Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> wrote on Wed, 4 Nov > 2020 20:36:40 +0530: > >> In the thread [1] Greg suggested that we move the driver >> to the clk from the staging. >> Add patches to address the concerns regarding the fractional and >> set rate support in the TODO. >> >> The patch set does the following >> - Trivial fixes for kernel doc. >> - Move the driver to the clk folder >> - Add capability to set rate. >> - Add fractional support. >> - Add support for configurable outputs. >> - Make the output names unique so that multiple instances >> do not crib. > > Can someone tell me the status of this series? I think it would > benefit everyone to have this driver "officially" supported in the > main tree, unless there are crucial issues; in this case it might be > good to know which ones? v8 was sent here. https://lore.kernel.org/r/1612446810-6113-1-git-send-email-shubhrajyoti.datta@xilinx.com Unfortunately v9 is required. Shubhrajyoti: Can you please keep Miquel in CC on v9? Thanks, Michal