| Message ID | 1315411158-17479-4-git-send-email-dave.martin@linaro.org |
|---|---|
| State | RFC |
| Headers | show |
On Wed, Sep 7, 2011 at 8:59 AM, Dave Martin <dave.martin@linaro.org> wrote: > The iwmmxt code contains some code to implement a pseudo-ISB, but > this is not buildable for Thumb-2. > > This patch replaces the pseudo-ISB with a real one on v7 and above. > > Signed-off-by: Dave Martin <dave.martin@linaro.org> > --- > arch/arm/kernel/pj4-cp0.c | 4 ++++ > 1 files changed, 4 insertions(+), 0 deletions(-) > > diff --git a/arch/arm/kernel/pj4-cp0.c b/arch/arm/kernel/pj4-cp0.c > index a4b1b07..5117d9d 100644 > --- a/arch/arm/kernel/pj4-cp0.c > +++ b/arch/arm/kernel/pj4-cp0.c > @@ -66,9 +66,13 @@ static void __init pj4_cp_access_write(u32 value) > > __asm__ __volatile__ ( > "mcr p15, 0, %1, c1, c0, 2\n\t" > +#ifdef __LINUX_ARM_ARCH__ >= 7 > + "isb\n\t" > +#else > "mrc p15, 0, %0, c1, c0, 2\n\t" > "mov %0, %0\n\t" > "sub pc, pc, #4\n\t" > +#endif Haojian, Could you check internally if isb() will work here as PJ4 is both v6/v7 compatible, and if it's in v7 mode, I guess isb() can be safely used here? > : "=r" (temp) : "r" (value)); > } > > -- > 1.7.4.1 > >
On Wednesday 07 September 2011 09:18:15 Eric Miao wrote: > > diff --git a/arch/arm/kernel/pj4-cp0.c b/arch/arm/kernel/pj4-cp0.c > > index a4b1b07..5117d9d 100644 > > --- a/arch/arm/kernel/pj4-cp0.c > > +++ b/arch/arm/kernel/pj4-cp0.c > > @@ -66,9 +66,13 @@ static void __init pj4_cp_access_write(u32 value) > > > > __asm__ __volatile__ ( > > "mcr p15, 0, %1, c1, c0, 2\n\t" > > +#ifdef __LINUX_ARM_ARCH__ >= 7 > > + "isb\n\t" > > +#else > > "mrc p15, 0, %0, c1, c0, 2\n\t" > > "mov %0, %0\n\t" > > "sub pc, pc, #4\n\t" > > +#endif > > Haojian, > > Could you check internally if isb() will work here as PJ4 is both v6/v7 > compatible, and if it's in v7 mode, I guess isb() can be safely used here? I thought we only support pj4 in v7 mode in Linux anyway. Arnd
On Wed, 2011-09-07 at 13:27 -0700, Arnd Bergmann wrote: > On Wednesday 07 September 2011 09:18:15 Eric Miao wrote: > > > diff --git a/arch/arm/kernel/pj4-cp0.c b/arch/arm/kernel/pj4-cp0.c > > > index a4b1b07..5117d9d 100644 > > > --- a/arch/arm/kernel/pj4-cp0.c > > > +++ b/arch/arm/kernel/pj4-cp0.c > > > @@ -66,9 +66,13 @@ static void __init pj4_cp_access_write(u32 value) > > > > > > __asm__ __volatile__ ( > > > "mcr p15, 0, %1, c1, c0, 2\n\t" > > > +#ifdef __LINUX_ARM_ARCH__ >= 7 > > > + "isb\n\t" > > > +#else > > > "mrc p15, 0, %0, c1, c0, 2\n\t" > > > "mov %0, %0\n\t" > > > "sub pc, pc, #4\n\t" > > > +#endif > > > > Haojian, > > > > Could you check internally if isb() will work here as PJ4 is both v6/v7 > > compatible, and if it's in v7 mode, I guess isb() can be safely used here? > PJ4 v6 mode is abandoned in real usage. So we only need to cover v7 mode. > I thought we only support pj4 in v7 mode in Linux anyway. > > Arnd
Hello. On 07-09-2011 19:59, Dave Martin wrote: > The iwmmxt code contains some code to implement a pseudo-ISB, but > this is not buildable for Thumb-2. > This patch replaces the pseudo-ISB with a real one on v7 and above. > Signed-off-by: Dave Martin<dave.martin@linaro.org> > --- > arch/arm/kernel/pj4-cp0.c | 4 ++++ > 1 files changed, 4 insertions(+), 0 deletions(-) > diff --git a/arch/arm/kernel/pj4-cp0.c b/arch/arm/kernel/pj4-cp0.c > index a4b1b07..5117d9d 100644 > --- a/arch/arm/kernel/pj4-cp0.c > +++ b/arch/arm/kernel/pj4-cp0.c > @@ -66,9 +66,13 @@ static void __init pj4_cp_access_write(u32 value) > > __asm__ __volatile__ ( > "mcr p15, 0, %1, c1, c0, 2\n\t" > +#ifdef __LINUX_ARM_ARCH__ >= 7 Maybe #if? WBR, Sergei
On Thu, Sep 08, 2011 at 03:10:30PM +0400, Sergei Shtylyov wrote: > Hello. > > On 07-09-2011 19:59, Dave Martin wrote: > > >The iwmmxt code contains some code to implement a pseudo-ISB, but > >this is not buildable for Thumb-2. > > >This patch replaces the pseudo-ISB with a real one on v7 and above. > > >Signed-off-by: Dave Martin<dave.martin@linaro.org> > >--- > > arch/arm/kernel/pj4-cp0.c | 4 ++++ > > 1 files changed, 4 insertions(+), 0 deletions(-) > > >diff --git a/arch/arm/kernel/pj4-cp0.c b/arch/arm/kernel/pj4-cp0.c > >index a4b1b07..5117d9d 100644 > >--- a/arch/arm/kernel/pj4-cp0.c > >+++ b/arch/arm/kernel/pj4-cp0.c > >@@ -66,9 +66,13 @@ static void __init pj4_cp_access_write(u32 value) > > > > __asm__ __volatile__ ( > > "mcr p15, 0, %1, c1, c0, 2\n\t" > >+#ifdef __LINUX_ARM_ARCH__ >= 7 > > Maybe #if? > > WBR, Sergei Hmmm, yes. With a bit of luck, we may be able to get rid of the conditional anyway. Cheers ---Dave
diff --git a/arch/arm/kernel/pj4-cp0.c b/arch/arm/kernel/pj4-cp0.c index a4b1b07..5117d9d 100644 --- a/arch/arm/kernel/pj4-cp0.c +++ b/arch/arm/kernel/pj4-cp0.c @@ -66,9 +66,13 @@ static void __init pj4_cp_access_write(u32 value) __asm__ __volatile__ ( "mcr p15, 0, %1, c1, c0, 2\n\t" +#ifdef __LINUX_ARM_ARCH__ >= 7 + "isb\n\t" +#else "mrc p15, 0, %0, c1, c0, 2\n\t" "mov %0, %0\n\t" "sub pc, pc, #4\n\t" +#endif : "=r" (temp) : "r" (value)); }
The iwmmxt code contains some code to implement a pseudo-ISB, but this is not buildable for Thumb-2. This patch replaces the pseudo-ISB with a real one on v7 and above. Signed-off-by: Dave Martin <dave.martin@linaro.org> --- arch/arm/kernel/pj4-cp0.c | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-)