| Message ID | 20210115210456.1053477-5-richard.henderson@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | tcg: backend constraints cleanup | expand |
On Fri, 15 Jan 2021 at 21:11, Richard Henderson <richard.henderson@linaro.org> wrote: > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > tcg/arm/tcg-target-con-str.h | 22 ++++++++++++ > tcg/arm/tcg-target.h | 1 + > tcg/arm/tcg-target.c.inc | 69 +++++++----------------------------- > 3 files changed, 36 insertions(+), 56 deletions(-) > create mode 100644 tcg/arm/tcg-target-con-str.h > > diff --git a/tcg/arm/tcg-target-con-str.h b/tcg/arm/tcg-target-con-str.h > new file mode 100644 > index 0000000000..2451ec6c7f > --- /dev/null > +++ b/tcg/arm/tcg-target-con-str.h > @@ -0,0 +1,22 @@ > +/* SPDX-License-Identifier: MIT */ > +/* > + * Define Arm target-specific operand constraint. "constraints" (check if you copied-and-pasted this into other headers). > + * Copyright (c) 2021 Linaro > + */ > + > - /* qemu_ld address */ > - case 'l': > - ct->regs = 0xffff; > #ifdef CONFIG_SOFTMMU > - /* r0-r2,lr will be overwritten when reading the tlb entry, > - so don't use these. */ > - tcg_regset_reset_reg(ct->regs, TCG_REG_R0); > - tcg_regset_reset_reg(ct->regs, TCG_REG_R1); > - tcg_regset_reset_reg(ct->regs, TCG_REG_R2); > - tcg_regset_reset_reg(ct->regs, TCG_REG_R3); > - tcg_regset_reset_reg(ct->regs, TCG_REG_R14); > +#define ALL_QLOAD_REGS \ > + (ALL_GENERAL_REGS & ~((1 << TCG_REG_R0) | (1 << TCG_REG_R1) | \ > + (1 << TCG_REG_R2) | (1 << TCG_REG_R3) | \ > + (1 << TCG_REG_R14))) > +#define ALL_QSTORE_REGS \ > + (ALL_GENERAL_REGS & ~((1 << TCG_REG_R0) | (1 << TCG_REG_R1) | \ > + (1 << TCG_REG_R2) | (1 << TCG_REG_R14) | \ > + ((TARGET_LONG_BITS == 64) << TCG_REG_R3))) > +#else > +#define ALL_QLOAD_REGS ALL_GENERAL_REGS > +#define ALL_QSTORE_REGS \ > + (ALL_GENERAL_REGS & ~((1 << TCG_REG_R0) | (1 << TCG_REG_R1))) > #endif > - break; > - > - /* qemu_st address & data */ > - case 's': > - ct->regs = 0xffff; > - /* r0-r2 will be overwritten when reading the tlb entry (softmmu only) > - and r0-r1 doing the byte swapping, so don't use these. */ > - tcg_regset_reset_reg(ct->regs, TCG_REG_R0); > - tcg_regset_reset_reg(ct->regs, TCG_REG_R1); > -#if defined(CONFIG_SOFTMMU) > - /* Avoid clashes with registers being used for helper args */ > - tcg_regset_reset_reg(ct->regs, TCG_REG_R2); > -#if TARGET_LONG_BITS == 64 > - /* Avoid clashes with registers being used for helper args */ > - tcg_regset_reset_reg(ct->regs, TCG_REG_R3); > -#endif > - tcg_regset_reset_reg(ct->regs, TCG_REG_R14); > -#endif > - break; Seems a bit of a shame to lose the commentary about why we need to exclude some of the registers. Otherwise Reviewed-by: Peter Maydell <peter.maydell@linaro.org> thanks -- PMM
diff --git a/tcg/arm/tcg-target-con-str.h b/tcg/arm/tcg-target-con-str.h new file mode 100644 index 0000000000..2451ec6c7f --- /dev/null +++ b/tcg/arm/tcg-target-con-str.h @@ -0,0 +1,22 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Define Arm target-specific operand constraint. + * Copyright (c) 2021 Linaro + */ + +/* + * Define constraint letters for register sets: + * REGS(letter, register_mask) + */ +REGS('r', ALL_GENERAL_REGS) +REGS('l', ALL_QLOAD_REGS) +REGS('s', ALL_QSTORE_REGS) + +/* + * Define constraint letters for constants: + * CONST(letter, TCG_CT_CONST_* bit set) + */ +CONST('I', TCG_CT_CONST_ARM) +CONST('K', TCG_CT_CONST_INV) +CONST('N', TCG_CT_CONST_NEG) +CONST('Z', TCG_CT_CONST_ZERO) diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h index 8d1fee6327..16336cd545 100644 --- a/tcg/arm/tcg-target.h +++ b/tcg/arm/tcg-target.h @@ -142,5 +142,6 @@ void tb_target_set_jmp_target(uintptr_t, uintptr_t, uintptr_t, uintptr_t); #define TCG_TARGET_NEED_LDST_LABELS #endif #define TCG_TARGET_NEED_POOL_LABELS +#define TCG_TARGET_CON_STR_H #endif diff --git a/tcg/arm/tcg-target.c.inc b/tcg/arm/tcg-target.c.inc index c2b26b3c45..e1a247b27f 100644 --- a/tcg/arm/tcg-target.c.inc +++ b/tcg/arm/tcg-target.c.inc @@ -237,65 +237,22 @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int type, #define TCG_CT_CONST_NEG 0x400 #define TCG_CT_CONST_ZERO 0x800 -/* parse target specific constraints */ -static const char *target_parse_constraint(TCGArgConstraint *ct, - const char *ct_str, TCGType type) -{ - switch (*ct_str++) { - case 'I': - ct->ct |= TCG_CT_CONST_ARM; - break; - case 'K': - ct->ct |= TCG_CT_CONST_INV; - break; - case 'N': /* The gcc constraint letter is L, already used here. */ - ct->ct |= TCG_CT_CONST_NEG; - break; - case 'Z': - ct->ct |= TCG_CT_CONST_ZERO; - break; +#define ALL_GENERAL_REGS 0xffffu - case 'r': - ct->regs = 0xffff; - break; - - /* qemu_ld address */ - case 'l': - ct->regs = 0xffff; #ifdef CONFIG_SOFTMMU - /* r0-r2,lr will be overwritten when reading the tlb entry, - so don't use these. */ - tcg_regset_reset_reg(ct->regs, TCG_REG_R0); - tcg_regset_reset_reg(ct->regs, TCG_REG_R1); - tcg_regset_reset_reg(ct->regs, TCG_REG_R2); - tcg_regset_reset_reg(ct->regs, TCG_REG_R3); - tcg_regset_reset_reg(ct->regs, TCG_REG_R14); +#define ALL_QLOAD_REGS \ + (ALL_GENERAL_REGS & ~((1 << TCG_REG_R0) | (1 << TCG_REG_R1) | \ + (1 << TCG_REG_R2) | (1 << TCG_REG_R3) | \ + (1 << TCG_REG_R14))) +#define ALL_QSTORE_REGS \ + (ALL_GENERAL_REGS & ~((1 << TCG_REG_R0) | (1 << TCG_REG_R1) | \ + (1 << TCG_REG_R2) | (1 << TCG_REG_R14) | \ + ((TARGET_LONG_BITS == 64) << TCG_REG_R3))) +#else +#define ALL_QLOAD_REGS ALL_GENERAL_REGS +#define ALL_QSTORE_REGS \ + (ALL_GENERAL_REGS & ~((1 << TCG_REG_R0) | (1 << TCG_REG_R1))) #endif - break; - - /* qemu_st address & data */ - case 's': - ct->regs = 0xffff; - /* r0-r2 will be overwritten when reading the tlb entry (softmmu only) - and r0-r1 doing the byte swapping, so don't use these. */ - tcg_regset_reset_reg(ct->regs, TCG_REG_R0); - tcg_regset_reset_reg(ct->regs, TCG_REG_R1); -#if defined(CONFIG_SOFTMMU) - /* Avoid clashes with registers being used for helper args */ - tcg_regset_reset_reg(ct->regs, TCG_REG_R2); -#if TARGET_LONG_BITS == 64 - /* Avoid clashes with registers being used for helper args */ - tcg_regset_reset_reg(ct->regs, TCG_REG_R3); -#endif - tcg_regset_reset_reg(ct->regs, TCG_REG_R14); -#endif - break; - - default: - return NULL; - } - return ct_str; -} static inline uint32_t rotl(uint32_t val, int n) {
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- tcg/arm/tcg-target-con-str.h | 22 ++++++++++++ tcg/arm/tcg-target.h | 1 + tcg/arm/tcg-target.c.inc | 69 +++++++----------------------------- 3 files changed, 36 insertions(+), 56 deletions(-) create mode 100644 tcg/arm/tcg-target-con-str.h -- 2.25.1