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[0/6] v3u: add & update (H)SCIF nodes

Message ID 20201228112715.14947-1-wsa+renesas@sang-engineering.com
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Series v3u: add & update (H)SCIF nodes | expand

Message

Wolfram Sang Dec. 28, 2020, 11:27 a.m. UTC
SCIF0 already worked because of firmware settings, but let's have a
proper node for it. Also add HSCIF0 because the last patch shows that it
also works. Because these blocks work in general, let's add the other
instances to the DTSI, too.

These additions make me a bit wonder about the 'reg'-based sorting in
our DTSI files. It looks a bit messy to me, but I kept it for
consistency. Same with the (H)SCIF reg sizes which are a tad too large
but in sync with our other DTSI files.

Looking forward to comments!

All the best,

   Wolfram


Linh Phung (1):
  arm64: dts: renesas: r8a779a0: Add HSCIF support

Wolfram Sang (5):
  arm64: dts: renesas: r8a779a0: add & update SCIF nodes
  arm64: dts: renesas: falcon: add SCIF0 nodes
  dt-bindings: serial: renesas,hscif: Add r8a779a0 support
  clk: renesas: r8a779a0: add HSCIF support
  WIP: arm64: dts: renesas: falcon: switch to from SCIF0 to HSCIF0

 .../bindings/serial/renesas,hscif.yaml        |   1 +
 .../boot/dts/renesas/r8a779a0-falcon.dts      |  31 ++++-
 arch/arm64/boot/dts/renesas/r8a779a0.dtsi     | 114 ++++++++++++++++++
 drivers/clk/renesas/r8a779a0-cpg-mssr.c       |   4 +
 4 files changed, 149 insertions(+), 1 deletion(-)

Comments

Geert Uytterhoeven Jan. 5, 2021, 4:24 p.m. UTC | #1
Hi Wolfram,

On Mon, Dec 28, 2020 at 12:28 PM Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> Mainly for testing the HSCIF0 node. We could make this switch permanent,

> but we never did for any other SoC. So, I think this is not to be

> applied.


The choice of serial console has to match the bootloader.
That's why we didn't do it for other SoCs where the serial console can be
muxed to different serial instances.

>

> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>


> --- a/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts

> +++ b/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts

> @@ -14,7 +14,7 @@ / {

>         compatible = "renesas,falcon-breakout", "renesas,falcon-cpu", "renesas,r8a779a0";

>

>         aliases {

> -               serial0 = &scif0;

> +               serial0 = &hscif0;

>         };


Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
Geert Uytterhoeven Jan. 5, 2021, 6:06 p.m. UTC | #2
Hi Wolfram,

On Mon, Dec 28, 2020 at 12:27 PM Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:

Missing "From: Linh Phung <linh.phung.jy@renesas.com>"?

> This is the result of multiple patches taken from the BSP, combined,

> rebased, and properly sorted. SCIF0 gets DMA properties, other SCIFs are

> entirely new.

>

> Signed-off-by: Linh Phung <linh.phung.jy@renesas.com>


> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>


Thanks for your patch!

> --- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi

> +++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi

> @@ -656,11 +656,61 @@ scif0: serial@e6e60000 {

>                                  <&cpg CPG_CORE R8A779A0_CLK_S1D2>,

>                                  <&scif_clk>;

>                         clock-names = "fck", "brg_int", "scif_clk";

> +                       dmas = <&dmac1 0x51>, <&dmac1 0x50>;

> +                       dma-names = "tx", "rx";


It may be prudent to leave out the DMA properties until we can
validate DMA operation.

>                         power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;

>                         resets = <&cpg 702>;

>                         status = "disabled";

>                 };

>

> +               scif1: serial@e6e68000 {

> +                       compatible = "renesas,scif-r8a779a0",

> +                                    "renesas,rcar-gen3-scif", "renesas,scif";

> +                       reg = <0 0xe6e68000 0 64>;

> +                       interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>;

> +                       clocks = <&cpg CPG_MOD 703>,

> +                                <&cpg CPG_CORE R8A779A0_CLK_S1D2>,

> +                                <&scif_clk>;

> +                       clock-names = "fck", "brg_int", "scif_clk";

> +                       dmas = <&dmac1 0x53>, <&dmac1 0x52>;

> +                       dma-names = "tx", "rx";

> +                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;

> +                       resets = <&cpg 703>;

> +                       status = "disabled";

> +               };

> +

> +               scif4: serial@e6c40000 {

> +                       compatible = "renesas,scif-r8a779a0",

> +                                    "renesas,rcar-gen3-scif", "renesas,scif";

> +                       reg = <0 0xe6c40000 0 64>;

> +                       interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>;

> +                       clocks = <&cpg CPG_MOD 705>,

> +                                <&cpg CPG_CORE R8A779A0_CLK_S1D2>,

> +                                <&scif_clk>;

> +                       clock-names = "fck", "brg_int", "scif_clk";

> +                       dmas = <&dmac1 0x59>, <&dmac1 0x58>;

> +                       dma-names = "tx", "rx";

> +                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;

> +                       resets = <&cpg 705>;

> +                       status = "disabled";

> +               };

> +

> +               scif3: serial@e6c50000 {


Please move scif3 before scif4.

> +                       compatible = "renesas,scif-r8a779a0",

> +                                    "renesas,rcar-gen3-scif", "renesas,scif";

> +                       reg = <0 0xe6c50000 0 64>;

> +                       interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>;

> +                       clocks = <&cpg CPG_MOD 704>,

> +                                <&cpg CPG_CORE R8A779A0_CLK_S1D2>,

> +                                <&scif_clk>;

> +                       clock-names = "fck", "brg_int", "scif_clk";

> +                       dmas = <&dmac1 0x57>, <&dmac1 0x56>;

> +                       dma-names = "tx", "rx";

> +                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;

> +                       resets = <&cpg 704>;

> +                       status = "disabled";

> +               };

> +


With the above fixed:
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>


Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
Geert Uytterhoeven Jan. 5, 2021, 6:22 p.m. UTC | #3
Hi Wolfram,

On Mon, Dec 28, 2020 at 12:27 PM Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> From: Linh Phung <linh.phung.jy@renesas.com>

>

> Define the generic parts of the HSCIF[0-3] device nodes.

>

> Signed-off-by: Linh Phung <linh.phung.jy@renesas.com>

> [wsa: double checked & rebased]

> Signed-off-by: Wolfram Sang <wsa@kernel.org>


Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>


> --- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi

> +++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi

> @@ -313,6 +313,70 @@ i2c2: i2c@e6510000 {

>                         status = "disabled";

>                 };

>

> +               hscif0: serial@e6540000 {

> +                       compatible = "renesas,hscif-r8a779a0",

> +                                    "renesas,rcar-gen3-hscif", "renesas,hscif";

> +                       reg = <0 0xe6540000 0 0x60>;

> +                       interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;

> +                       clocks = <&cpg CPG_MOD 514>,

> +                                <&cpg CPG_CORE R8A779A0_CLK_S1D2>,

> +                                <&scif_clk>;

> +                       clock-names = "fck", "brg_int", "scif_clk";

> +                       dmas = <&dmac1 0x31>, <&dmac1 0x30>;

> +                       dma-names = "tx", "rx";


It may be prudent to omit the DMA properties, until we can test DMA
operation.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
Wolfram Sang Jan. 14, 2021, 8:57 p.m. UTC | #4
> > +               scif3: serial@e6c50000 {

> 

> Please move scif3 before scif4.


I thought we are sorting by reg value?
Geert Uytterhoeven Jan. 15, 2021, 8 a.m. UTC | #5
Hi Wolfram,

On Thu, Jan 14, 2021 at 9:57 PM Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> > > +               scif3: serial@e6c50000 {

> >

> > Please move scif3 before scif4.

>

> I thought we are sorting by reg value?


Yeah, but we group nodes of the same type, and sort them by
label within the group.

We really need a script to take care of the sorting...

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds