diff mbox series

drm/bridge: ti-sn65dsi86: rename GPIO register bits

Message ID 20201210081853.17060-1-shawnguo@kernel.org
State New
Headers show
Series drm/bridge: ti-sn65dsi86: rename GPIO register bits | expand

Commit Message

Shawn Guo Dec. 10, 2020, 8:18 a.m. UTC
From: Shawn Guo <shawn.guo@linaro.org>


It renames GPIO register bits to drop 'SN_' prefix, so that they are
consistent to other definitions - prefixing register name with 'SN_' but
not for bit fields.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

---
 drivers/gpu/drm/bridge/ti-sn65dsi86.c | 26 +++++++++++++-------------
 1 file changed, 13 insertions(+), 13 deletions(-)

-- 
2.17.1

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Comments

Doug Anderson Jan. 11, 2021, 10:16 p.m. UTC | #1
Hi,

On Thu, Dec 10, 2020 at 12:19 AM Shawn Guo <shawnguo@kernel.org> wrote:
>

> From: Shawn Guo <shawn.guo@linaro.org>

>

> It renames GPIO register bits to drop 'SN_' prefix, so that they are

> consistent to other definitions - prefixing register name with 'SN_' but

> not for bit fields.

>

> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

> ---

>  drivers/gpu/drm/bridge/ti-sn65dsi86.c | 26 +++++++++++++-------------

>  1 file changed, 13 insertions(+), 13 deletions(-)


Sorry for taking so long to get back to this.  I think it came into my
inbox at the same time as a pile of other things and then got lost.
Your change looks good to me.  Sorry for being inconsistent when
adding those defines and thanks for fixing them!

Reviewed-by: Douglas Anderson <dianders@chromium.org>


-Doug
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Doug Anderson Jan. 11, 2021, 10:25 p.m. UTC | #2
Hi,

On Mon, Jan 11, 2021 at 2:16 PM Doug Anderson <dianders@chromium.org> wrote:
>

> Hi,

>

> On Thu, Dec 10, 2020 at 12:19 AM Shawn Guo <shawnguo@kernel.org> wrote:

> >

> > From: Shawn Guo <shawn.guo@linaro.org>

> >

> > It renames GPIO register bits to drop 'SN_' prefix, so that they are

> > consistent to other definitions - prefixing register name with 'SN_' but

> > not for bit fields.

> >

> > Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

> > ---

> >  drivers/gpu/drm/bridge/ti-sn65dsi86.c | 26 +++++++++++++-------------

> >  1 file changed, 13 insertions(+), 13 deletions(-)

>

> Sorry for taking so long to get back to this.  I think it came into my

> inbox at the same time as a pile of other things and then got lost.

> Your change looks good to me.  Sorry for being inconsistent when

> adding those defines and thanks for fixing them!

>

> Reviewed-by: Douglas Anderson <dianders@chromium.org>


Hrm, I just caught up on more email and found that in:

https://lore.kernel.org/r/20201210174338.kecryijwptzc2mi7@pengutronix.de

...that Uwe would prefer to keep these bits what I have and change all
the others.  ;-)  I don't have a strong opinion either way, but I
definitely agree that it'd be better for all the defines to be
consistent.  If I had to arbitrarily make the decision one way or the
other I'd probably land Shawn's patch but I certainly wouldn't object
if we went Uwe's way either.  :-P

-Doug
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Uwe Kleine-König Jan. 12, 2021, 7:53 p.m. UTC | #3
On Mon, Jan 11, 2021 at 02:25:37PM -0800, Doug Anderson wrote:
> Hi,

> 

> On Mon, Jan 11, 2021 at 2:16 PM Doug Anderson <dianders@chromium.org> wrote:

> >

> > Hi,

> >

> > On Thu, Dec 10, 2020 at 12:19 AM Shawn Guo <shawnguo@kernel.org> wrote:

> > >

> > > From: Shawn Guo <shawn.guo@linaro.org>

> > >

> > > It renames GPIO register bits to drop 'SN_' prefix, so that they are

> > > consistent to other definitions - prefixing register name with 'SN_' but

> > > not for bit fields.

> > >

> > > Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

> > > ---

> > >  drivers/gpu/drm/bridge/ti-sn65dsi86.c | 26 +++++++++++++-------------

> > >  1 file changed, 13 insertions(+), 13 deletions(-)

> >

> > Sorry for taking so long to get back to this.  I think it came into my

> > inbox at the same time as a pile of other things and then got lost.

> > Your change looks good to me.  Sorry for being inconsistent when

> > adding those defines and thanks for fixing them!

> >

> > Reviewed-by: Douglas Anderson <dianders@chromium.org>

> 

> Hrm, I just caught up on more email and found that in:

> 

> https://lore.kernel.org/r/20201210174338.kecryijwptzc2mi7@pengutronix.de

> 

> ...that Uwe would prefer to keep these bits what I have and change all

> the others.  ;-)  I don't have a strong opinion either way, but I

> definitely agree that it'd be better for all the defines to be

> consistent.  If I had to arbitrarily make the decision one way or the

> other I'd probably land Shawn's patch but I certainly wouldn't object

> if we went Uwe's way either.  :-P


For the the relevant argument for prefixes is that tools like ctags and
cscope work more reliable. Take for example the name TX_TIMEOUT. There
are around 60 symbols with that name in the kernel tree. This is quite
annoying if you want to jump from a certain use to its definition.

Best regards
Uwe

-- 
Pengutronix e.K.                           | Uwe Kleine-König            |
Industrial Linux Solutions                 | https://www.pengutronix.de/ |
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diff mbox series

Patch

diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c b/drivers/gpu/drm/bridge/ti-sn65dsi86.c
index f27306c51e4d..8eac9d77eba1 100644
--- a/drivers/gpu/drm/bridge/ti-sn65dsi86.c
+++ b/drivers/gpu/drm/bridge/ti-sn65dsi86.c
@@ -63,13 +63,13 @@ 
 #define SN_HPD_DISABLE_REG			0x5C
 #define  HPD_DISABLE				BIT(0)
 #define SN_GPIO_IO_REG				0x5E
-#define  SN_GPIO_INPUT_SHIFT			4
-#define  SN_GPIO_OUTPUT_SHIFT			0
+#define  GPIO_INPUT_SHIFT			4
+#define  GPIO_OUTPUT_SHIFT			0
 #define SN_GPIO_CTRL_REG			0x5F
-#define  SN_GPIO_MUX_INPUT			0
-#define  SN_GPIO_MUX_OUTPUT			1
-#define  SN_GPIO_MUX_SPECIAL			2
-#define  SN_GPIO_MUX_MASK			0x3
+#define  GPIO_MUX_INPUT				0
+#define  GPIO_MUX_OUTPUT			1
+#define  GPIO_MUX_SPECIAL			2
+#define  GPIO_MUX_MASK				0x3
 #define SN_AUX_WDATA_REG(x)			(0x64 + (x))
 #define SN_AUX_ADDR_19_16_REG			0x74
 #define SN_AUX_ADDR_15_8_REG			0x75
@@ -1035,7 +1035,7 @@  static int ti_sn_bridge_gpio_get(struct gpio_chip *chip, unsigned int offset)
 	if (ret)
 		return ret;
 
-	return !!(val & BIT(SN_GPIO_INPUT_SHIFT + offset));
+	return !!(val & BIT(GPIO_INPUT_SHIFT + offset));
 }
 
 static void ti_sn_bridge_gpio_set(struct gpio_chip *chip, unsigned int offset,
@@ -1051,8 +1051,8 @@  static void ti_sn_bridge_gpio_set(struct gpio_chip *chip, unsigned int offset,
 
 	val &= 1;
 	ret = regmap_update_bits(pdata->regmap, SN_GPIO_IO_REG,
-				 BIT(SN_GPIO_OUTPUT_SHIFT + offset),
-				 val << (SN_GPIO_OUTPUT_SHIFT + offset));
+				 BIT(GPIO_OUTPUT_SHIFT + offset),
+				 val << (GPIO_OUTPUT_SHIFT + offset));
 	if (ret)
 		dev_warn(pdata->dev,
 			 "Failed to set bridge GPIO %u: %d\n", offset, ret);
@@ -1069,8 +1069,8 @@  static int ti_sn_bridge_gpio_direction_input(struct gpio_chip *chip,
 		return 0;
 
 	ret = regmap_update_bits(pdata->regmap, SN_GPIO_CTRL_REG,
-				 SN_GPIO_MUX_MASK << shift,
-				 SN_GPIO_MUX_INPUT << shift);
+				 GPIO_MUX_MASK << shift,
+				 GPIO_MUX_INPUT << shift);
 	if (ret) {
 		set_bit(offset, pdata->gchip_output);
 		return ret;
@@ -1103,8 +1103,8 @@  static int ti_sn_bridge_gpio_direction_output(struct gpio_chip *chip,
 
 	/* Set direction */
 	ret = regmap_update_bits(pdata->regmap, SN_GPIO_CTRL_REG,
-				 SN_GPIO_MUX_MASK << shift,
-				 SN_GPIO_MUX_OUTPUT << shift);
+				 GPIO_MUX_MASK << shift,
+				 GPIO_MUX_OUTPUT << shift);
 	if (ret) {
 		clear_bit(offset, pdata->gchip_output);
 		pm_runtime_put(pdata->dev);