diff mbox series

[4/7] dt-bindings: ti-serdes-mux: Add defines for AM64 SoC

Message ID 20201224114250.1083-5-kishon@ti.com
State Superseded
Headers show
Series AM64: Add SERDES bindings and driver support | expand

Commit Message

Kishon Vijay Abraham I Dec. 24, 2020, 11:42 a.m. UTC
AM64 has a single lane SERDES which can be configured to be used
with either PCIe or USB. Define the possilbe values for the SERDES
function in AM64 SoC here.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>

---
 include/dt-bindings/mux/ti-serdes.h | 4 ++++
 1 file changed, 4 insertions(+)

-- 
2.17.1

Comments

Rob Herring (Arm) Jan. 8, 2021, 3:03 a.m. UTC | #1
On Thu, Dec 24, 2020 at 05:12:47PM +0530, Kishon Vijay Abraham I wrote:
> AM64 has a single lane SERDES which can be configured to be used

> with either PCIe or USB. Define the possilbe values for the SERDES

> function in AM64 SoC here.


Doesn't look like this is used? Would the common phy modes work?
> 

> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>

> ---

>  include/dt-bindings/mux/ti-serdes.h | 4 ++++

>  1 file changed, 4 insertions(+)

> 

> diff --git a/include/dt-bindings/mux/ti-serdes.h b/include/dt-bindings/mux/ti-serdes.h

> index 9047ec6bd3cf..68e0f76deed1 100644

> --- a/include/dt-bindings/mux/ti-serdes.h

> +++ b/include/dt-bindings/mux/ti-serdes.h

> @@ -90,4 +90,8 @@

>  #define J7200_SERDES0_LANE3_USB			0x2

>  #define J7200_SERDES0_LANE3_IP4_UNUSED		0x3

>  

> +/* AM64 */

> +#define AM64_SERDES0_LANE0_PCIE0		0x0

> +#define AM64_SERDES0_LANE0_USB			0x1

> +

>  #endif /* _DT_BINDINGS_MUX_TI_SERDES */

> -- 

> 2.17.1

>
Peter Rosin Jan. 8, 2021, 10:46 a.m. UTC | #2
Hi!

On 2020-12-24 12:42, Kishon Vijay Abraham I wrote:
> AM64 has a single lane SERDES which can be configured to be used

> with either PCIe or USB. Define the possilbe values for the SERDES

> function in AM64 SoC here.

> 

> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>

> ---

>  include/dt-bindings/mux/ti-serdes.h | 4 ++++

>  1 file changed, 4 insertions(+)

> 

> diff --git a/include/dt-bindings/mux/ti-serdes.h b/include/dt-bindings/mux/ti-serdes.h

> index 9047ec6bd3cf..68e0f76deed1 100644

> --- a/include/dt-bindings/mux/ti-serdes.h

> +++ b/include/dt-bindings/mux/ti-serdes.h

> @@ -90,4 +90,8 @@

>  #define J7200_SERDES0_LANE3_USB			0x2

>  #define J7200_SERDES0_LANE3_IP4_UNUSED		0x3

>  

> +/* AM64 */


In case you end up keeping these defines, despite the comment by Rob...

Nitpick, the J721E and J7200 sections have a blank line here, between the
header comment and the actual defines. But mehh...

Acked-by: Peter Rosin <peda@axentia.se>


Cheers,
Peter

> +#define AM64_SERDES0_LANE0_PCIE0		0x0

> +#define AM64_SERDES0_LANE0_USB			0x1

> +

>  #endif /* _DT_BINDINGS_MUX_TI_SERDES */

>
Kishon Vijay Abraham I Jan. 8, 2021, 11:01 a.m. UTC | #3
Hi Rob,

On 08/01/21 8:33 am, Rob Herring wrote:
> On Thu, Dec 24, 2020 at 05:12:47PM +0530, Kishon Vijay Abraham I wrote:

>> AM64 has a single lane SERDES which can be configured to be used

>> with either PCIe or USB. Define the possilbe values for the SERDES

>> function in AM64 SoC here.

> 

> Doesn't look like this is used? Would the common phy modes work?


This will be used when the dts files are added.

Thanks
Kishon
>>

>> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>

>> ---

>>  include/dt-bindings/mux/ti-serdes.h | 4 ++++

>>  1 file changed, 4 insertions(+)

>>

>> diff --git a/include/dt-bindings/mux/ti-serdes.h b/include/dt-bindings/mux/ti-serdes.h

>> index 9047ec6bd3cf..68e0f76deed1 100644

>> --- a/include/dt-bindings/mux/ti-serdes.h

>> +++ b/include/dt-bindings/mux/ti-serdes.h

>> @@ -90,4 +90,8 @@

>>  #define J7200_SERDES0_LANE3_USB			0x2

>>  #define J7200_SERDES0_LANE3_IP4_UNUSED		0x3

>>  

>> +/* AM64 */

>> +#define AM64_SERDES0_LANE0_PCIE0		0x0

>> +#define AM64_SERDES0_LANE0_USB			0x1

>> +

>>  #endif /* _DT_BINDINGS_MUX_TI_SERDES */

>> -- 

>> 2.17.1

>>
Kishon Vijay Abraham I Jan. 8, 2021, 11:03 a.m. UTC | #4
Hi Peter,

On 08/01/21 4:16 pm, Peter Rosin wrote:
> Hi!

> 

> On 2020-12-24 12:42, Kishon Vijay Abraham I wrote:

>> AM64 has a single lane SERDES which can be configured to be used

>> with either PCIe or USB. Define the possilbe values for the SERDES

>> function in AM64 SoC here.

>>

>> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>

>> ---

>>  include/dt-bindings/mux/ti-serdes.h | 4 ++++

>>  1 file changed, 4 insertions(+)

>>

>> diff --git a/include/dt-bindings/mux/ti-serdes.h b/include/dt-bindings/mux/ti-serdes.h

>> index 9047ec6bd3cf..68e0f76deed1 100644

>> --- a/include/dt-bindings/mux/ti-serdes.h

>> +++ b/include/dt-bindings/mux/ti-serdes.h

>> @@ -90,4 +90,8 @@

>>  #define J7200_SERDES0_LANE3_USB			0x2

>>  #define J7200_SERDES0_LANE3_IP4_UNUSED		0x3

>>  

>> +/* AM64 */

> 

> In case you end up keeping these defines, despite the comment by Rob...

> 

> Nitpick, the J721E and J7200 sections have a blank line here, between the

> header comment and the actual defines. But mehh...

> 

> Acked-by: Peter Rosin <peda@axentia.se>

Sure, will fix it in the next revision.

Thanks
Kishon

> 

> Cheers,

> Peter

> 

>> +#define AM64_SERDES0_LANE0_PCIE0		0x0

>> +#define AM64_SERDES0_LANE0_USB			0x1

>> +

>>  #endif /* _DT_BINDINGS_MUX_TI_SERDES */

>>
diff mbox series

Patch

diff --git a/include/dt-bindings/mux/ti-serdes.h b/include/dt-bindings/mux/ti-serdes.h
index 9047ec6bd3cf..68e0f76deed1 100644
--- a/include/dt-bindings/mux/ti-serdes.h
+++ b/include/dt-bindings/mux/ti-serdes.h
@@ -90,4 +90,8 @@ 
 #define J7200_SERDES0_LANE3_USB			0x2
 #define J7200_SERDES0_LANE3_IP4_UNUSED		0x3
 
+/* AM64 */
+#define AM64_SERDES0_LANE0_PCIE0		0x0
+#define AM64_SERDES0_LANE0_USB			0x1
+
 #endif /* _DT_BINDINGS_MUX_TI_SERDES */