Message ID | 3343e82ab52e753b385a3e451c07b774920790fc.1608216796.git.agx@sigxcpu.org |
---|---|
State | Superseded |
Headers | show |
Series | Config and device tree updates for the Librem 5 devkit | expand |
On Thu, Dec 17, 2020 at 04:13:15PM +0100, Guido Günther wrote: > Otherwise the boot hangs early on and the resulting clock tree without > this already closely matches the selected rates (722534400 and > 786432000). > > audio_pll2 0 0 0 722534397 0 0 50000 > audio_pll2_bypass 0 0 0 722534397 0 0 50000 > audio_pll2_out 0 0 0 722534397 0 0 50000 > audio_pll1 1 1 0 786431998 0 0 50000 > audio_pll1_bypass 1 1 0 786431998 0 0 50000 > audio_pll1_out 1 1 0 786431998 0 0 50000 > sai2 1 1 0 24576000 0 0 50000 > sai2_root_clk 1 1 0 24576000 0 0 50000 > sai6 0 0 0 24576000 0 0 50000 > sai6_root_clk 0 0 0 24576000 0 0 50000 > > Signed-off-by: Guido Günther <agx@sigxcpu.org> > --- > arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts | 5 ----- > 1 file changed, 5 deletions(-) > Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Best regards, Krzysztof
On Thu, Dec 17, 2020 at 04:13:15PM +0100, Guido Günther wrote: > Otherwise the boot hangs early on and the resulting clock tree without > this already closely matches the selected rates (722534400 and > 786432000). > > audio_pll2 0 0 0 722534397 0 0 50000 > audio_pll2_bypass 0 0 0 722534397 0 0 50000 > audio_pll2_out 0 0 0 722534397 0 0 50000 > audio_pll1 1 1 0 786431998 0 0 50000 > audio_pll1_bypass 1 1 0 786431998 0 0 50000 > audio_pll1_out 1 1 0 786431998 0 0 50000 > sai2 1 1 0 24576000 0 0 50000 > sai2_root_clk 1 1 0 24576000 0 0 50000 > sai6 0 0 0 24576000 0 0 50000 > sai6_root_clk 0 0 0 24576000 0 0 50000 > > Signed-off-by: Guido Günther <agx@sigxcpu.org> Applied, thanks.
diff --git a/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts b/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts index 05a43ee6d051..dd217a0760e9 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts +++ b/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts @@ -244,11 +244,6 @@ &A53_3 { cpu-supply = <&buck2_reg>; }; -&clk { - assigned-clocks = <&clk IMX8MQ_AUDIO_PLL1>, <&clk IMX8MQ_AUDIO_PLL2>; - assigned-clock-rates = <786432000>, <722534400>; -}; - &dphy { status = "okay"; };
Otherwise the boot hangs early on and the resulting clock tree without this already closely matches the selected rates (722534400 and 786432000). audio_pll2 0 0 0 722534397 0 0 50000 audio_pll2_bypass 0 0 0 722534397 0 0 50000 audio_pll2_out 0 0 0 722534397 0 0 50000 audio_pll1 1 1 0 786431998 0 0 50000 audio_pll1_bypass 1 1 0 786431998 0 0 50000 audio_pll1_out 1 1 0 786431998 0 0 50000 sai2 1 1 0 24576000 0 0 50000 sai2_root_clk 1 1 0 24576000 0 0 50000 sai6 0 0 0 24576000 0 0 50000 sai6_root_clk 0 0 0 24576000 0 0 50000 Signed-off-by: Guido Günther <agx@sigxcpu.org> --- arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts | 5 ----- 1 file changed, 5 deletions(-)