| Message ID | 20201214160454.22769-1-matthias.bgg@kernel.org |
|---|---|
| State | New |
| Headers | show |
| Series | [1/2] hwrng: iproc-rng200: Fix disable of the block. | expand |
On 2020-12-14 8:04 a.m., matthias.bgg@kernel.org wrote: > From: Matthias Brugger <mbrugger@suse.com> > > When trying to disable the block we bitwise or the control > register with value zero. This will leave the block always turned on. > Fix this by setting the corresponding bit to zero. > > Fixes: c83d45d5685f ("hwrng: iproc-rng200 - Add Broadcom IPROC RNG driver") Commit message needs to be re-written. I don't think this is an actual fix as the ~RNG_CTL_RNG_RBGEN_MASK already zeros the bit. This is just a code change, which is fine because it makes things clearer > Signed-off-by: Matthias Brugger <mbrugger@suse.com> > --- > > drivers/char/hw_random/iproc-rng200.c | 5 ++--- > 1 file changed, 2 insertions(+), 3 deletions(-) > > diff --git a/drivers/char/hw_random/iproc-rng200.c b/drivers/char/hw_random/iproc-rng200.c > index 01583faf9893..e106ce3c0146 100644 > --- a/drivers/char/hw_random/iproc-rng200.c > +++ b/drivers/char/hw_random/iproc-rng200.c > @@ -28,7 +28,6 @@ > #define RNG_CTRL_OFFSET 0x00 > #define RNG_CTRL_RNG_RBGEN_MASK 0x00001FFF > #define RNG_CTRL_RNG_RBGEN_ENABLE 0x00000001 > -#define RNG_CTRL_RNG_RBGEN_DISABLE 0x00000000 > > #define RNG_SOFT_RESET_OFFSET 0x04 > #define RNG_SOFT_RESET 0x00000001 > @@ -61,7 +60,7 @@ static void iproc_rng200_restart(void __iomem *rng_base) > /* Disable RBG */ > val = ioread32(rng_base + RNG_CTRL_OFFSET); > val &= ~RNG_CTRL_RNG_RBGEN_MASK; This mask will already zero the enable bit. > - val |= RNG_CTRL_RNG_RBGEN_DISABLE; > + val &= ~RNG_CTRL_RNG_RBGEN_ENABLE; > iowrite32(val, rng_base + RNG_CTRL_OFFSET); > > /* Clear all interrupt status */ > @@ -174,7 +173,7 @@ static void iproc_rng200_cleanup(struct hwrng *rng) > /* Disable RNG hardware */ > val = ioread32(priv->base + RNG_CTRL_OFFSET); > val &= ~RNG_CTRL_RNG_RBGEN_MASK; > - val |= RNG_CTRL_RNG_RBGEN_DISABLE; > + val &= ~RNG_CTRL_RNG_RBGEN_ENABLE; > iowrite32(val, priv->base + RNG_CTRL_OFFSET); > } >
On 2020-12-14 8:04 a.m., matthias.bgg@kernel.org wrote: > From: Matthias Brugger <mbrugger@suse.com> > > We are calling the same code for enable and disable the block in various > parts of the driver. Put that code into a new function to reduce code > duplication. Patch needs to be regenerated after most of PATCH 1 dropped. > > Signed-off-by: Matthias Brugger <mbrugger@suse.com> > > --- > > drivers/char/hw_random/iproc-rng200.c | 37 ++++++++++++--------------- > 1 file changed, 17 insertions(+), 20 deletions(-) > > diff --git a/drivers/char/hw_random/iproc-rng200.c b/drivers/char/hw_random/iproc-rng200.c > index e106ce3c0146..3367b26085e8 100644 > --- a/drivers/char/hw_random/iproc-rng200.c > +++ b/drivers/char/hw_random/iproc-rng200.c > @@ -53,15 +53,26 @@ struct iproc_rng200_dev { > > #define to_rng_priv(rng) container_of(rng, struct iproc_rng200_dev, rng) > > -static void iproc_rng200_restart(void __iomem *rng_base) > +static void iproc_rng200_enable(void __iomem *rng_base, bool enable) > { > uint32_t val; > > - /* Disable RBG */ > val = ioread32(rng_base + RNG_CTRL_OFFSET); > val &= ~RNG_CTRL_RNG_RBGEN_MASK; > - val &= ~RNG_CTRL_RNG_RBGEN_ENABLE; > + > + if (enable) > + val |= RNG_CTRL_RNG_RBGEN_ENABLE; > + else > + val &= ~RNG_CTRL_RNG_RBGEN_ENABLE; > + > iowrite32(val, rng_base + RNG_CTRL_OFFSET); > +} > + > +static void iproc_rng200_restart(void __iomem *rng_base) > +{ > + uint32_t val; > + > + iproc_rng200_enable(rng_base, false); > > /* Clear all interrupt status */ > iowrite32(0xFFFFFFFFUL, rng_base + RNG_INT_STATUS_OFFSET); > @@ -83,11 +94,7 @@ static void iproc_rng200_restart(void __iomem *rng_base) > val &= ~RBG_SOFT_RESET; > iowrite32(val, rng_base + RBG_SOFT_RESET_OFFSET); > > - /* Enable RBG */ > - val = ioread32(rng_base + RNG_CTRL_OFFSET); > - val &= ~RNG_CTRL_RNG_RBGEN_MASK; > - val |= RNG_CTRL_RNG_RBGEN_ENABLE; > - iowrite32(val, rng_base + RNG_CTRL_OFFSET); > + iproc_rng200_enable(rng_base, true); > } > > static int iproc_rng200_read(struct hwrng *rng, void *buf, size_t max, > @@ -154,13 +161,8 @@ static int iproc_rng200_read(struct hwrng *rng, void *buf, size_t max, > static int iproc_rng200_init(struct hwrng *rng) > { > struct iproc_rng200_dev *priv = to_rng_priv(rng); > - uint32_t val; > > - /* Setup RNG. */ > - val = ioread32(priv->base + RNG_CTRL_OFFSET); > - val &= ~RNG_CTRL_RNG_RBGEN_MASK; > - val |= RNG_CTRL_RNG_RBGEN_ENABLE; > - iowrite32(val, priv->base + RNG_CTRL_OFFSET); > + iproc_rng200_enable(priv->base, true); > > return 0; > } > @@ -168,13 +170,8 @@ static int iproc_rng200_init(struct hwrng *rng) > static void iproc_rng200_cleanup(struct hwrng *rng) > { > struct iproc_rng200_dev *priv = to_rng_priv(rng); > - uint32_t val; > > - /* Disable RNG hardware */ > - val = ioread32(priv->base + RNG_CTRL_OFFSET); > - val &= ~RNG_CTRL_RNG_RBGEN_MASK; > - val &= ~RNG_CTRL_RNG_RBGEN_ENABLE; > - iowrite32(val, priv->base + RNG_CTRL_OFFSET); > + iproc_rng200_enable(priv->base, false); > } > > static int iproc_rng200_probe(struct platform_device *pdev)
On 14/12/2020 18:45, Scott Branden wrote: > > > On 2020-12-14 8:04 a.m., matthias.bgg@kernel.org wrote: >> From: Matthias Brugger <mbrugger@suse.com> >> >> When trying to disable the block we bitwise or the control >> register with value zero. This will leave the block always turned on. >> Fix this by setting the corresponding bit to zero. >> >> Fixes: c83d45d5685f ("hwrng: iproc-rng200 - Add Broadcom IPROC RNG driver") > Commit message needs to be re-written. > I don't think this is an actual fix as the ~RNG_CTL_RNG_RBGEN_MASK already zeros the bit. This is just a code change, which is fine because it makes things clearer Right, I'll reword it. >> Signed-off-by: Matthias Brugger <mbrugger@suse.com> >> --- >> >> drivers/char/hw_random/iproc-rng200.c | 5 ++--- >> 1 file changed, 2 insertions(+), 3 deletions(-) >> >> diff --git a/drivers/char/hw_random/iproc-rng200.c b/drivers/char/hw_random/iproc-rng200.c >> index 01583faf9893..e106ce3c0146 100644 >> --- a/drivers/char/hw_random/iproc-rng200.c >> +++ b/drivers/char/hw_random/iproc-rng200.c >> @@ -28,7 +28,6 @@ >> #define RNG_CTRL_OFFSET 0x00 >> #define RNG_CTRL_RNG_RBGEN_MASK 0x00001FFF >> #define RNG_CTRL_RNG_RBGEN_ENABLE 0x00000001 >> -#define RNG_CTRL_RNG_RBGEN_DISABLE 0x00000000 >> >> #define RNG_SOFT_RESET_OFFSET 0x04 >> #define RNG_SOFT_RESET 0x00000001 >> @@ -61,7 +60,7 @@ static void iproc_rng200_restart(void __iomem *rng_base) >> /* Disable RBG */ >> val = ioread32(rng_base + RNG_CTRL_OFFSET); >> val &= ~RNG_CTRL_RNG_RBGEN_MASK; > This mask will already zero the enable bit. >> - val |= RNG_CTRL_RNG_RBGEN_DISABLE; >> + val &= ~RNG_CTRL_RNG_RBGEN_ENABLE; Correct, so no need for this extra line. I'll delete it. >> iowrite32(val, rng_base + RNG_CTRL_OFFSET); >> >> /* Clear all interrupt status */ >> @@ -174,7 +173,7 @@ static void iproc_rng200_cleanup(struct hwrng *rng) >> /* Disable RNG hardware */ >> val = ioread32(priv->base + RNG_CTRL_OFFSET); >> val &= ~RNG_CTRL_RNG_RBGEN_MASK; >> - val |= RNG_CTRL_RNG_RBGEN_DISABLE; >> + val &= ~RNG_CTRL_RNG_RBGEN_ENABLE; >> iowrite32(val, priv->base + RNG_CTRL_OFFSET); >> } >> >
diff --git a/drivers/char/hw_random/iproc-rng200.c b/drivers/char/hw_random/iproc-rng200.c index 01583faf9893..e106ce3c0146 100644 --- a/drivers/char/hw_random/iproc-rng200.c +++ b/drivers/char/hw_random/iproc-rng200.c @@ -28,7 +28,6 @@ #define RNG_CTRL_OFFSET 0x00 #define RNG_CTRL_RNG_RBGEN_MASK 0x00001FFF #define RNG_CTRL_RNG_RBGEN_ENABLE 0x00000001 -#define RNG_CTRL_RNG_RBGEN_DISABLE 0x00000000 #define RNG_SOFT_RESET_OFFSET 0x04 #define RNG_SOFT_RESET 0x00000001 @@ -61,7 +60,7 @@ static void iproc_rng200_restart(void __iomem *rng_base) /* Disable RBG */ val = ioread32(rng_base + RNG_CTRL_OFFSET); val &= ~RNG_CTRL_RNG_RBGEN_MASK; - val |= RNG_CTRL_RNG_RBGEN_DISABLE; + val &= ~RNG_CTRL_RNG_RBGEN_ENABLE; iowrite32(val, rng_base + RNG_CTRL_OFFSET); /* Clear all interrupt status */ @@ -174,7 +173,7 @@ static void iproc_rng200_cleanup(struct hwrng *rng) /* Disable RNG hardware */ val = ioread32(priv->base + RNG_CTRL_OFFSET); val &= ~RNG_CTRL_RNG_RBGEN_MASK; - val |= RNG_CTRL_RNG_RBGEN_DISABLE; + val &= ~RNG_CTRL_RNG_RBGEN_ENABLE; iowrite32(val, priv->base + RNG_CTRL_OFFSET); }