| Message ID | 1394134385-1727-19-git-send-email-peter.maydell@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
On Fri, Mar 7, 2014 at 5:33 AM, Peter Maydell <peter.maydell@linaro.org> wrote: > Move arm_log_exception() into internals.h so we can use it from > helper-a64.c for the AArch64 exception entry code. > > Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> > --- > target-arm/helper.c | 31 ------------------------------- > target-arm/internals.h | 31 +++++++++++++++++++++++++++++++ > 2 files changed, 31 insertions(+), 31 deletions(-) > > diff --git a/target-arm/helper.c b/target-arm/helper.c > index 3a976f7..e461914 100644 > --- a/target-arm/helper.c > +++ b/target-arm/helper.c > @@ -2849,37 +2849,6 @@ static void do_v7m_exception_exit(CPUARMState *env) > pointer. */ > } > > -/* Exception names for debug logging; note that not all of these > - * precisely correspond to architectural exceptions. > - */ > -static const char * const excnames[] = { > - [EXCP_UDEF] = "Undefined Instruction", > - [EXCP_SWI] = "SVC", > - [EXCP_PREFETCH_ABORT] = "Prefetch Abort", > - [EXCP_DATA_ABORT] = "Data Abort", > - [EXCP_IRQ] = "IRQ", > - [EXCP_FIQ] = "FIQ", > - [EXCP_BKPT] = "Breakpoint", > - [EXCP_EXCEPTION_EXIT] = "QEMU v7M exception exit", > - [EXCP_KERNEL_TRAP] = "QEMU intercept of kernel commpage", > - [EXCP_STREX] = "QEMU intercept of STREX", > -}; > - > -static inline void arm_log_exception(int idx) > -{ > - if (qemu_loglevel_mask(CPU_LOG_INT)) { > - const char *exc = NULL; > - > - if (idx >= 0 && idx < ARRAY_SIZE(excnames)) { > - exc = excnames[idx]; > - } > - if (!exc) { > - exc = "unknown"; > - } > - qemu_log_mask(CPU_LOG_INT, "Taking exception %d [%s]\n", idx, exc); > - } > -} > - > void arm_v7m_cpu_do_interrupt(CPUState *cs) > { > ARMCPU *cpu = ARM_CPU(cs); > diff --git a/target-arm/internals.h b/target-arm/internals.h > index 97a76c2..e15136b 100644 > --- a/target-arm/internals.h > +++ b/target-arm/internals.h > @@ -39,6 +39,37 @@ static inline bool excp_is_internal(int excp) > || excp == EXCP_STREX; > } > > +/* Exception names for debug logging; note that not all of these > + * precisely correspond to architectural exceptions. > + */ > +static const char * const excnames[] = { > + [EXCP_UDEF] = "Undefined Instruction", > + [EXCP_SWI] = "SVC", > + [EXCP_PREFETCH_ABORT] = "Prefetch Abort", > + [EXCP_DATA_ABORT] = "Data Abort", > + [EXCP_IRQ] = "IRQ", > + [EXCP_FIQ] = "FIQ", > + [EXCP_BKPT] = "Breakpoint", > + [EXCP_EXCEPTION_EXIT] = "QEMU v7M exception exit", > + [EXCP_KERNEL_TRAP] = "QEMU intercept of kernel commpage", > + [EXCP_STREX] = "QEMU intercept of STREX", > +}; > + > +static inline void arm_log_exception(int idx) > +{ > + if (qemu_loglevel_mask(CPU_LOG_INT)) { > + const char *exc = NULL; > + > + if (idx >= 0 && idx < ARRAY_SIZE(excnames)) { > + exc = excnames[idx]; > + } > + if (!exc) { > + exc = "unknown"; > + } > + qemu_log_mask(CPU_LOG_INT, "Taking exception %d [%s]\n", idx, exc); > + } > +} > + > /* Scale factor for generic timers, ie number of ns per tick. > * This gives a 62.5MHz timer. > */ > -- > 1.9.0 > >
diff --git a/target-arm/helper.c b/target-arm/helper.c index 3a976f7..e461914 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -2849,37 +2849,6 @@ static void do_v7m_exception_exit(CPUARMState *env) pointer. */ } -/* Exception names for debug logging; note that not all of these - * precisely correspond to architectural exceptions. - */ -static const char * const excnames[] = { - [EXCP_UDEF] = "Undefined Instruction", - [EXCP_SWI] = "SVC", - [EXCP_PREFETCH_ABORT] = "Prefetch Abort", - [EXCP_DATA_ABORT] = "Data Abort", - [EXCP_IRQ] = "IRQ", - [EXCP_FIQ] = "FIQ", - [EXCP_BKPT] = "Breakpoint", - [EXCP_EXCEPTION_EXIT] = "QEMU v7M exception exit", - [EXCP_KERNEL_TRAP] = "QEMU intercept of kernel commpage", - [EXCP_STREX] = "QEMU intercept of STREX", -}; - -static inline void arm_log_exception(int idx) -{ - if (qemu_loglevel_mask(CPU_LOG_INT)) { - const char *exc = NULL; - - if (idx >= 0 && idx < ARRAY_SIZE(excnames)) { - exc = excnames[idx]; - } - if (!exc) { - exc = "unknown"; - } - qemu_log_mask(CPU_LOG_INT, "Taking exception %d [%s]\n", idx, exc); - } -} - void arm_v7m_cpu_do_interrupt(CPUState *cs) { ARMCPU *cpu = ARM_CPU(cs); diff --git a/target-arm/internals.h b/target-arm/internals.h index 97a76c2..e15136b 100644 --- a/target-arm/internals.h +++ b/target-arm/internals.h @@ -39,6 +39,37 @@ static inline bool excp_is_internal(int excp) || excp == EXCP_STREX; } +/* Exception names for debug logging; note that not all of these + * precisely correspond to architectural exceptions. + */ +static const char * const excnames[] = { + [EXCP_UDEF] = "Undefined Instruction", + [EXCP_SWI] = "SVC", + [EXCP_PREFETCH_ABORT] = "Prefetch Abort", + [EXCP_DATA_ABORT] = "Data Abort", + [EXCP_IRQ] = "IRQ", + [EXCP_FIQ] = "FIQ", + [EXCP_BKPT] = "Breakpoint", + [EXCP_EXCEPTION_EXIT] = "QEMU v7M exception exit", + [EXCP_KERNEL_TRAP] = "QEMU intercept of kernel commpage", + [EXCP_STREX] = "QEMU intercept of STREX", +}; + +static inline void arm_log_exception(int idx) +{ + if (qemu_loglevel_mask(CPU_LOG_INT)) { + const char *exc = NULL; + + if (idx >= 0 && idx < ARRAY_SIZE(excnames)) { + exc = excnames[idx]; + } + if (!exc) { + exc = "unknown"; + } + qemu_log_mask(CPU_LOG_INT, "Taking exception %d [%s]\n", idx, exc); + } +} + /* Scale factor for generic timers, ie number of ns per tick. * This gives a 62.5MHz timer. */
Move arm_log_exception() into internals.h so we can use it from helper-a64.c for the AArch64 exception entry code. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- target-arm/helper.c | 31 ------------------------------- target-arm/internals.h | 31 +++++++++++++++++++++++++++++++ 2 files changed, 31 insertions(+), 31 deletions(-)