Message ID | 1607403341-57214-1-git-send-email-yash.shah@sifive.com |
---|---|
Headers | show |
Series | arch: riscv: add board and SoC DT file support | expand |
On Tue, 8 Dec 2020 10:25:32 +0530, Yash Shah wrote: > Start board support by adding initial support for the SiFive FU740 SoC > and the first development board that uses it, the SiFive HiFive > Unmatched A00. > > Boot-tested on Linux 5.10-rc4 on a HiFive Unmatched A00 board using the > U-boot and OpenSBI. > > [...] Applied to https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next Thanks! [2/9] dt-bindings: spi: Update DT binding docs to support SiFive FU740 SoC commit: 76347344c522da78be29403dda81463ffae2bc99 All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark
On Mon, 07 Dec 2020 20:55:32 PST (-0800), yash.shah@sifive.com wrote: > Start board support by adding initial support for the SiFive FU740 SoC > and the first development board that uses it, the SiFive HiFive > Unmatched A00. > > Boot-tested on Linux 5.10-rc4 on a HiFive Unmatched A00 board using the > U-boot and OpenSBI. > > This patch series is dependent on Zong's Patchset[0]. The patchset also > adds two new nodes in dtsi file. The binding documentation patch > for these nodes are already posted on the mailing list[1][2]. > > [0]: https://lore.kernel.org/linux-riscv/20201130082330.77268-4-zong.li@sifive.com/T/#u > [1]: https://lore.kernel.org/linux-riscv/1606714984-16593-1-git-send-email-yash.shah@sifive.com/T/#t > [2]: https://lore.kernel.org/linux-riscv/20201126030043.67390-1-zong.li@sifive.com/T/#u > > Changes in v2: > - The dt bindings patch is split into several individual patches. > - Expand the full list for compatible strings in i2c-ocores.txt > > Yash Shah (9): > dt-bindings: riscv: Update DT binding docs to support SiFive FU740 SoC > dt-bindings: spi: Update DT binding docs to support SiFive FU740 SoC > dt-bindings: pwm: Update DT binding docs to support SiFive FU740 SoC > dt-bindings: serial: Update DT binding docs to support SiFive FU740 > SoC > dt-bindings: gpio: Update DT binding docs to support SiFive FU740 SoC > dt-bindings: i2c: Update DT binding docs to support SiFive FU740 SoC > riscv: dts: add initial support for the SiFive FU740-C000 SoC > dt-bindings: riscv: Update YAML doc to support SiFive HiFive Unmatched > board > riscv: dts: add initial board data for the SiFive HiFive Unmatched > > .../devicetree/bindings/gpio/sifive,gpio.yaml | 4 +- > .../devicetree/bindings/i2c/i2c-ocores.txt | 8 +- > .../devicetree/bindings/pwm/pwm-sifive.yaml | 9 +- > Documentation/devicetree/bindings/riscv/cpus.yaml | 6 + > .../devicetree/bindings/riscv/sifive.yaml | 17 +- > .../devicetree/bindings/serial/sifive-serial.yaml | 4 +- > .../devicetree/bindings/spi/spi-sifive.yaml | 10 +- > arch/riscv/boot/dts/sifive/Makefile | 3 +- > arch/riscv/boot/dts/sifive/fu740-c000.dtsi | 293 +++++++++++++++++++++ > .../riscv/boot/dts/sifive/hifive-unmatched-a00.dts | 253 ++++++++++++++++++ > 10 files changed, 590 insertions(+), 17 deletions(-) > create mode 100644 arch/riscv/boot/dts/sifive/fu740-c000.dtsi > create mode 100644 arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts Aside from that question about the i2c bug these look good to me. I don't see any Ack/Review on the DT side of things, though. If you want to take them through a DT tree that's fine for me, I'll leave them in my inbox for now and if nobody says anything I'll look a bit more and take them for 5.12. Acked-by: Palmer Dabbelt <palmerdabbelt@google.com>
On Mon, 07 Dec 2020 20:55:32 PST (-0800), yash.shah@sifive.com wrote: > Start board support by adding initial support for the SiFive FU740 SoC > and the first development board that uses it, the SiFive HiFive > Unmatched A00. > > Boot-tested on Linux 5.10-rc4 on a HiFive Unmatched A00 board using the > U-boot and OpenSBI. > > This patch series is dependent on Zong's Patchset[0]. The patchset also > adds two new nodes in dtsi file. The binding documentation patch > for these nodes are already posted on the mailing list[1][2]. > > [0]: https://lore.kernel.org/linux-riscv/20201130082330.77268-4-zong.li@sifive.com/T/#u > [1]: https://lore.kernel.org/linux-riscv/1606714984-16593-1-git-send-email-yash.shah@sifive.com/T/#t > [2]: https://lore.kernel.org/linux-riscv/20201126030043.67390-1-zong.li@sifive.com/T/#u > > Changes in v2: > - The dt bindings patch is split into several individual patches. > - Expand the full list for compatible strings in i2c-ocores.txt > > Yash Shah (9): > dt-bindings: riscv: Update DT binding docs to support SiFive FU740 SoC > dt-bindings: spi: Update DT binding docs to support SiFive FU740 SoC > dt-bindings: pwm: Update DT binding docs to support SiFive FU740 SoC > dt-bindings: serial: Update DT binding docs to support SiFive FU740 > SoC > dt-bindings: gpio: Update DT binding docs to support SiFive FU740 SoC > dt-bindings: i2c: Update DT binding docs to support SiFive FU740 SoC > riscv: dts: add initial support for the SiFive FU740-C000 SoC > dt-bindings: riscv: Update YAML doc to support SiFive HiFive Unmatched > board > riscv: dts: add initial board data for the SiFive HiFive Unmatched > > .../devicetree/bindings/gpio/sifive,gpio.yaml | 4 +- > .../devicetree/bindings/i2c/i2c-ocores.txt | 8 +- > .../devicetree/bindings/pwm/pwm-sifive.yaml | 9 +- > Documentation/devicetree/bindings/riscv/cpus.yaml | 6 + > .../devicetree/bindings/riscv/sifive.yaml | 17 +- > .../devicetree/bindings/serial/sifive-serial.yaml | 4 +- > .../devicetree/bindings/spi/spi-sifive.yaml | 10 +- > arch/riscv/boot/dts/sifive/Makefile | 3 +- > arch/riscv/boot/dts/sifive/fu740-c000.dtsi | 293 +++++++++++++++++++++ > .../riscv/boot/dts/sifive/hifive-unmatched-a00.dts | 253 ++++++++++++++++++ > 10 files changed, 590 insertions(+), 17 deletions(-) > create mode 100644 arch/riscv/boot/dts/sifive/fu740-c000.dtsi > create mode 100644 arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts Thanks, these are on for-next. There was one checkpatch warning about the missing ISSI device tree entry, but we already had that in the FU540 so I'm OK letting it slide. I'm also not really sure this is the right way to do this sort of thing: most of the patches here really aren't RISC-V things, they're SiFive SOC things. Some of these patches have been picked up by other trees, but I just took the rest. I'm not all that happy about taking DT bindings for things like GPIO or PWM bindings, but as they're pretty small I'm OK doing it in this instance. In the future it would really be better to split these up and land them via their respectitve trees, rather than trying to do all the SOC stuff over here. I know that can be a headache, but we have that SOC group for this purpose to try and keep things a bit more together -- I know it was a while ago and there really hasn't been much SOC activity on the RISC-V side of things so maybe it hasn't been that widley discussed, but that was really designed to solve these sorts of problems.