diff mbox series

[05/11] target/arm: Enforce alignment for SRS

Message ID 20201125040642.2339476-6-richard.henderson@linaro.org
State New
Headers show
Series target/arm: enforce alignment | expand

Commit Message

Richard Henderson Nov. 25, 2020, 4:06 a.m. UTC
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 target/arm/translate.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

-- 
2.25.1

Comments

Peter Maydell Dec. 3, 2020, 11:38 a.m. UTC | #1
On Wed, 25 Nov 2020 at 04:09, Richard Henderson
<richard.henderson@linaro.org> wrote:
>

> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

> ---

>  target/arm/translate.c | 6 ++++--

>  1 file changed, 4 insertions(+), 2 deletions(-)

>

> diff --git a/target/arm/translate.c b/target/arm/translate.c

> index 4406f6a67c..b1f43bfb8f 100644

> --- a/target/arm/translate.c

> +++ b/target/arm/translate.c

> @@ -5124,11 +5124,13 @@ static void gen_srs(DisasContext *s,

>      }

>      tcg_gen_addi_i32(addr, addr, offset);

>      tmp = load_reg(s, 14);

> -    gen_aa32_st32(s, tmp, addr, get_mem_index(s));

> +    gen_aa32_st_i32(s, tmp, addr, get_mem_index(s),

> +                    MO_UL | MO_ALIGN | s->be_data);

>      tcg_temp_free_i32(tmp);

>      tmp = load_cpu_field(spsr);

>      tcg_gen_addi_i32(addr, addr, 4);

> -    gen_aa32_st32(s, tmp, addr, get_mem_index(s));

> +    gen_aa32_st_i32(s, tmp, addr, get_mem_index(s),

> +                    MO_UL | MO_ALIGN | s->be_data);


Having just come back to look at this as a result of reading
a review comment from you on the v8.1M series, it's a bit
unfortunate that we now have to remember to factor in s->be_data
in every memory access. Previously gen_aa32_st32() got this
right for us automatically, as well as being able to provide
the right sized MO_UL or whatever part... Can we make the
new API a bit less awkward ? (I suspect we're eventually
going to want to be able to pass an enum for "always OK
unaligned", "never OK unaligned", or "OK unaligned only
if SCTLR.A is 0", for that matter.)

thanks
-- PMM
diff mbox series

Patch

diff --git a/target/arm/translate.c b/target/arm/translate.c
index 4406f6a67c..b1f43bfb8f 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -5124,11 +5124,13 @@  static void gen_srs(DisasContext *s,
     }
     tcg_gen_addi_i32(addr, addr, offset);
     tmp = load_reg(s, 14);
-    gen_aa32_st32(s, tmp, addr, get_mem_index(s));
+    gen_aa32_st_i32(s, tmp, addr, get_mem_index(s),
+                    MO_UL | MO_ALIGN | s->be_data);
     tcg_temp_free_i32(tmp);
     tmp = load_cpu_field(spsr);
     tcg_gen_addi_i32(addr, addr, 4);
-    gen_aa32_st32(s, tmp, addr, get_mem_index(s));
+    gen_aa32_st_i32(s, tmp, addr, get_mem_index(s),
+                    MO_UL | MO_ALIGN | s->be_data);
     tcg_temp_free_i32(tmp);
     if (writeback) {
         switch (amode) {