Message ID | 20201123002723.28463-1-digetx@gmail.com |
---|---|
Headers | show |
Series | Introduce memory interconnect for NVIDIA Tegra SoCs | expand |
Hi Dmitry, On 23.11.20 2:27, Dmitry Osipenko wrote: > Now Internal and External memory controllers are memory interconnection > providers. This allows us to use interconnect API for tuning of memory > configuration. EMC driver now supports OPPs and DVFS. MC driver now > supports tuning of memory arbitration latency, which needs to be done > for ISO memory clients, like a Display client for example. > > Tested-by: Peter Geis <pgwipeout@gmail.com> > Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Georgi Djakov <georgi.djakov@linaro.org> Thank you for the continuous work on this patchset! BR, Georgi > --- > drivers/memory/tegra/Kconfig | 1 + > drivers/memory/tegra/tegra30-emc.c | 344 +++++++++++++++++++++++++++-- > drivers/memory/tegra/tegra30.c | 173 ++++++++++++++- > 3 files changed, 496 insertions(+), 22 deletions(-)
On 11/23/20 9:27 AM, Dmitry Osipenko wrote: > Remove tegra20-devfreq in order to replace it with a EMC_STAT based > devfreq driver. Previously we were going to use MC_STAT based > tegra20-devfreq driver because EMC_STAT wasn't working properly, but > now that problem is resolved. This resolves complications imposed by > the removed driver since it was depending on both EMC and MC drivers > simultaneously. > > Acked-by: Chanwoo Choi <cw00.choi@samsung.com> > Signed-off-by: Dmitry Osipenko <digetx@gmail.com> > --- > MAINTAINERS | 1 - > drivers/devfreq/Kconfig | 10 -- > drivers/devfreq/Makefile | 1 - > drivers/devfreq/tegra20-devfreq.c | 210 ------------------------------ > 4 files changed, 222 deletions(-) > delete mode 100644 drivers/devfreq/tegra20-devfreq.c > > diff --git a/MAINTAINERS b/MAINTAINERS > index 5f10105cac6f..56c560320f00 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -11370,7 +11370,6 @@ L: linux-pm@vger.kernel.org > L: linux-tegra@vger.kernel.org > T: git git://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/linux.git > S: Maintained > -F: drivers/devfreq/tegra20-devfreq.c > F: drivers/devfreq/tegra30-devfreq.c > > MEMORY MANAGEMENT > diff --git a/drivers/devfreq/Kconfig b/drivers/devfreq/Kconfig > index 0ee36ae2fa79..00704efe6398 100644 > --- a/drivers/devfreq/Kconfig > +++ b/drivers/devfreq/Kconfig > @@ -121,16 +121,6 @@ config ARM_TEGRA_DEVFREQ > It reads ACTMON counters of memory controllers and adjusts the > operating frequencies and voltages with OPP support. > > -config ARM_TEGRA20_DEVFREQ > - tristate "NVIDIA Tegra20 DEVFREQ Driver" > - depends on ARCH_TEGRA_2x_SOC || COMPILE_TEST > - depends on COMMON_CLK > - select DEVFREQ_GOV_SIMPLE_ONDEMAND > - help > - This adds the DEVFREQ driver for the Tegra20 family of SoCs. > - It reads Memory Controller counters and adjusts the operating > - frequencies and voltages with OPP support. > - > config ARM_RK3399_DMC_DEVFREQ > tristate "ARM RK3399 DMC DEVFREQ Driver" > depends on (ARCH_ROCKCHIP && HAVE_ARM_SMCCC) || \ > diff --git a/drivers/devfreq/Makefile b/drivers/devfreq/Makefile > index 3ca1ad0ecb97..a16333ea7034 100644 > --- a/drivers/devfreq/Makefile > +++ b/drivers/devfreq/Makefile > @@ -13,7 +13,6 @@ obj-$(CONFIG_ARM_IMX_BUS_DEVFREQ) += imx-bus.o > obj-$(CONFIG_ARM_IMX8M_DDRC_DEVFREQ) += imx8m-ddrc.o > obj-$(CONFIG_ARM_RK3399_DMC_DEVFREQ) += rk3399_dmc.o > obj-$(CONFIG_ARM_TEGRA_DEVFREQ) += tegra30-devfreq.o > -obj-$(CONFIG_ARM_TEGRA20_DEVFREQ) += tegra20-devfreq.o > > # DEVFREQ Event Drivers > obj-$(CONFIG_PM_DEVFREQ_EVENT) += event/ > diff --git a/drivers/devfreq/tegra20-devfreq.c b/drivers/devfreq/tegra20-devfreq.c > deleted file mode 100644 > index fd801534771d..000000000000 > --- a/drivers/devfreq/tegra20-devfreq.c > +++ /dev/null > @@ -1,210 +0,0 @@ > -// SPDX-License-Identifier: GPL-2.0 > -/* > - * NVIDIA Tegra20 devfreq driver > - * > - * Copyright (C) 2019 GRATE-DRIVER project > - */ > - > -#include <linux/clk.h> > -#include <linux/devfreq.h> > -#include <linux/io.h> > -#include <linux/kernel.h> > -#include <linux/module.h> > -#include <linux/of_device.h> > -#include <linux/platform_device.h> > -#include <linux/pm_opp.h> > -#include <linux/slab.h> > - > -#include <soc/tegra/mc.h> > - > -#include "governor.h" > - > -#define MC_STAT_CONTROL 0x90 > -#define MC_STAT_EMC_CLOCK_LIMIT 0xa0 > -#define MC_STAT_EMC_CLOCKS 0xa4 > -#define MC_STAT_EMC_CONTROL 0xa8 > -#define MC_STAT_EMC_COUNT 0xb8 > - > -#define EMC_GATHER_CLEAR (1 << 8) > -#define EMC_GATHER_ENABLE (3 << 8) > - > -struct tegra_devfreq { > - struct devfreq *devfreq; > - struct clk *emc_clock; > - void __iomem *regs; > -}; > - > -static int tegra_devfreq_target(struct device *dev, unsigned long *freq, > - u32 flags) > -{ > - struct tegra_devfreq *tegra = dev_get_drvdata(dev); > - struct devfreq *devfreq = tegra->devfreq; > - struct dev_pm_opp *opp; > - unsigned long rate; > - int err; > - > - opp = devfreq_recommended_opp(dev, freq, flags); > - if (IS_ERR(opp)) > - return PTR_ERR(opp); > - > - rate = dev_pm_opp_get_freq(opp); > - dev_pm_opp_put(opp); > - > - err = clk_set_min_rate(tegra->emc_clock, rate); > - if (err) > - return err; > - > - err = clk_set_rate(tegra->emc_clock, 0); > - if (err) > - goto restore_min_rate; > - > - return 0; > - > -restore_min_rate: > - clk_set_min_rate(tegra->emc_clock, devfreq->previous_freq); > - > - return err; > -} > - > -static int tegra_devfreq_get_dev_status(struct device *dev, > - struct devfreq_dev_status *stat) > -{ > - struct tegra_devfreq *tegra = dev_get_drvdata(dev); > - > - /* > - * EMC_COUNT returns number of memory events, that number is lower > - * than the number of clocks. Conversion ratio of 1/8 results in a > - * bit higher bandwidth than actually needed, it is good enough for > - * the time being because drivers don't support requesting minimum > - * needed memory bandwidth yet. > - * > - * TODO: adjust the ratio value once relevant drivers will support > - * memory bandwidth management. > - */ > - stat->busy_time = readl_relaxed(tegra->regs + MC_STAT_EMC_COUNT); > - stat->total_time = readl_relaxed(tegra->regs + MC_STAT_EMC_CLOCKS) / 8; > - stat->current_frequency = clk_get_rate(tegra->emc_clock); > - > - writel_relaxed(EMC_GATHER_CLEAR, tegra->regs + MC_STAT_CONTROL); > - writel_relaxed(EMC_GATHER_ENABLE, tegra->regs + MC_STAT_CONTROL); > - > - return 0; > -} > - > -static struct devfreq_dev_profile tegra_devfreq_profile = { > - .polling_ms = 500, > - .target = tegra_devfreq_target, > - .get_dev_status = tegra_devfreq_get_dev_status, > -}; > - > -static struct tegra_mc *tegra_get_memory_controller(void) > -{ > - struct platform_device *pdev; > - struct device_node *np; > - struct tegra_mc *mc; > - > - np = of_find_compatible_node(NULL, NULL, "nvidia,tegra20-mc-gart"); > - if (!np) > - return ERR_PTR(-ENOENT); > - > - pdev = of_find_device_by_node(np); > - of_node_put(np); > - if (!pdev) > - return ERR_PTR(-ENODEV); > - > - mc = platform_get_drvdata(pdev); > - if (!mc) > - return ERR_PTR(-EPROBE_DEFER); > - > - return mc; > -} > - > -static int tegra_devfreq_probe(struct platform_device *pdev) > -{ > - struct tegra_devfreq *tegra; > - struct tegra_mc *mc; > - unsigned long max_rate; > - unsigned long rate; > - int err; > - > - mc = tegra_get_memory_controller(); > - if (IS_ERR(mc)) { > - err = PTR_ERR(mc); > - dev_err(&pdev->dev, "failed to get memory controller: %d\n", > - err); > - return err; > - } > - > - tegra = devm_kzalloc(&pdev->dev, sizeof(*tegra), GFP_KERNEL); > - if (!tegra) > - return -ENOMEM; > - > - /* EMC is a system-critical clock that is always enabled */ > - tegra->emc_clock = devm_clk_get(&pdev->dev, "emc"); > - if (IS_ERR(tegra->emc_clock)) > - return dev_err_probe(&pdev->dev, PTR_ERR(tegra->emc_clock), > - "failed to get emc clock\n"); > - > - tegra->regs = mc->regs; > - > - max_rate = clk_round_rate(tegra->emc_clock, ULONG_MAX); > - > - for (rate = 0; rate <= max_rate; rate++) { > - rate = clk_round_rate(tegra->emc_clock, rate); > - > - err = dev_pm_opp_add(&pdev->dev, rate, 0); > - if (err) { > - dev_err(&pdev->dev, "failed to add opp: %d\n", err); > - goto remove_opps; > - } > - } > - > - /* > - * Reset statistic gathers state, select global bandwidth for the > - * statistics collection mode and set clocks counter saturation > - * limit to maximum. > - */ > - writel_relaxed(0x00000000, tegra->regs + MC_STAT_CONTROL); > - writel_relaxed(0x00000000, tegra->regs + MC_STAT_EMC_CONTROL); > - writel_relaxed(0xffffffff, tegra->regs + MC_STAT_EMC_CLOCK_LIMIT); > - > - platform_set_drvdata(pdev, tegra); > - > - tegra->devfreq = devfreq_add_device(&pdev->dev, &tegra_devfreq_profile, > - DEVFREQ_GOV_SIMPLE_ONDEMAND, NULL); > - if (IS_ERR(tegra->devfreq)) { > - err = PTR_ERR(tegra->devfreq); > - goto remove_opps; > - } > - > - return 0; > - > -remove_opps: > - dev_pm_opp_remove_all_dynamic(&pdev->dev); > - > - return err; > -} > - > -static int tegra_devfreq_remove(struct platform_device *pdev) > -{ > - struct tegra_devfreq *tegra = platform_get_drvdata(pdev); > - > - devfreq_remove_device(tegra->devfreq); > - dev_pm_opp_remove_all_dynamic(&pdev->dev); > - > - return 0; > -} > - > -static struct platform_driver tegra_devfreq_driver = { > - .probe = tegra_devfreq_probe, > - .remove = tegra_devfreq_remove, > - .driver = { > - .name = "tegra20-devfreq", > - }, > -}; > -module_platform_driver(tegra_devfreq_driver); > - > -MODULE_ALIAS("platform:tegra20-devfreq"); > -MODULE_AUTHOR("Dmitry Osipenko <digetx@gmail.com>"); > -MODULE_DESCRIPTION("NVIDIA Tegra20 devfreq driver"); > -MODULE_LICENSE("GPL v2"); > Applied it. Thanks.
23.11.2020 09:32, Georgi Djakov пишет: > Hi Dmitry, > > On 23.11.20 2:27, Dmitry Osipenko wrote: >> Now Internal and External memory controllers are memory interconnection >> providers. This allows us to use interconnect API for tuning of memory >> configuration. EMC driver now supports OPPs and DVFS. MC driver now >> supports tuning of memory arbitration latency, which needs to be done >> for ISO memory clients, like a Display client for example. >> >> Tested-by: Peter Geis <pgwipeout@gmail.com> >> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> > > Acked-by: Georgi Djakov <georgi.djakov@linaro.org> > > Thank you for the continuous work on this patchset! Hello Georgi, Thank you for reviewing the patches!
On Mon, Nov 30, 2020 at 05:44:39PM +0900, Chanwoo Choi wrote: > Hi Dmitry, > > The v5.10-rc6 was released from linus git tree. > Generally, I will send the pull-quest about devfreq to linux-pm.git maintainer > after releasing the v5.1-rc7 for the integration test on linux-pm.git. > > The icc patches in this patch have not yet merged. If these patches > are not merged before v5.10-rc7, Maybe, I'll apply the devfreq patches > for v5.12-rc1. None of the patches here are going to be merged to Linus' in the current cycle. They will only go to the next so if there is dependency, everything will be broken and non-bisectable. However no such dependencies or merging requirements were mention in the cover letter. Best regards, Krzysztof
Hi Dmitry, The v5.10-rc6 was released from linus git tree. Generally, I will send the pull-quest about devfreq to linux-pm.git maintainer after releasing the v5.1-rc7 for the integration test on linux-pm.git. The icc patches in this patch have not yet merged. If these patches are not merged before v5.10-rc7, Maybe, I'll apply the devfreq patches for v5.12-rc1. Best Regards, Chanwoo Choi On 11/23/20 9:27 AM, Dmitry Osipenko wrote: > This series brings initial support for memory interconnect to Tegra20, > Tegra30 and Tegra124 SoCs. > > For the starter only display controllers and devfreq devices are getting > interconnect API support, others could be supported later on. The display > controllers have the biggest demand for interconnect API right now because > dynamic memory frequency scaling can't be done safely without taking into > account bandwidth requirement from the displays. In particular this series > fixes distorted display output on T30 Ouya and T124 TK1 devices. > > Changelog: > > v10 - In a longer run it will be much nicer if we could support EMC > hardware versioning on Tegra20 and it's not late to support it now. > Hence I added these new patches: > > dt-bindings: memory: tegra20: emc: Document opp-supported-hw property > memory: tegra20: Support hardware versioning and clean up OPP table initialization > > - Removed error message from tegra30-devfreq driver about missing OPP > properties in a device-tree because EMC driver already prints that > message and it uses OPP API error code instead of checking DT directly, > which is a more correct way of doing that. > > v9: - Squashed "memory: tegra30-emc: Factor out clk initialization" into > patch "tegra30: Support interconnect framework". > Suggested by Krzysztof Kozlowski. > > - Improved Kconfig in the patch "memory: tegra124-emc: Make driver modular" > by adding CONFIG_TEGRA124_CLK_EMC entry, which makes clk-driver changes > to look a bit more cleaner. Suggested by Krzysztof Kozlowski. > > - Dropped voltage regulator support from ICC and DT patches for now > because there is a new discussion about using a power domain abstraction > for controlling the regulator, which is likely to happen. > > - Replaced direct "operating-points-v2" property checking in EMC drivers > with checking of a returned error code from dev_pm_opp_of_add_table(). > Note that I haven't touched T20 EMC driver because it's very likely > that we'll replace that code with a common helper soon anyways. > Suggested by Viresh Kumar. > > - The T30 DT patches now include EMC OPP changes for Ouya board, which > is available now in linux-next. > > Dmitry Osipenko (19): > dt-bindings: memory: tegra20: emc: Document opp-supported-hw property > memory: tegra20: Support hardware versioning and clean up OPP table > initialization > memory: tegra30: Support interconnect framework > memory: tegra124-emc: Make driver modular > memory: tegra124-emc: Continue probing if timings are missing in > device-tree > memory: tegra124: Support interconnect framework > drm/tegra: dc: Support memory bandwidth management > drm/tegra: dc: Extend debug stats with total number of events > PM / devfreq: tegra30: Support interconnect and OPPs from device-tree > PM / devfreq: tegra30: Separate configurations per-SoC generation > PM / devfreq: tegra20: Deprecate in a favor of emc-stat based driver > ARM: tegra: Correct EMC registers size in Tegra20 device-tree > ARM: tegra: Add interconnect properties to Tegra20 device-tree > ARM: tegra: Add interconnect properties to Tegra30 device-tree > ARM: tegra: Add interconnect properties to Tegra124 device-tree > ARM: tegra: Add nvidia,memory-controller phandle to Tegra20 EMC > device-tree > ARM: tegra: Add EMC OPP properties to Tegra20 device-trees > ARM: tegra: Add EMC OPP and ICC properties to Tegra30 EMC and ACTMON > device-tree nodes > ARM: tegra: Add EMC OPP and ICC properties to Tegra124 EMC and ACTMON > device-tree nodes > > .../memory-controllers/nvidia,tegra20-emc.txt | 6 + > MAINTAINERS | 1 - > arch/arm/boot/dts/tegra124-apalis-emc.dtsi | 8 + > .../arm/boot/dts/tegra124-jetson-tk1-emc.dtsi | 8 + > arch/arm/boot/dts/tegra124-nyan-big-emc.dtsi | 10 + > .../arm/boot/dts/tegra124-nyan-blaze-emc.dtsi | 10 + > .../boot/dts/tegra124-peripherals-opp.dtsi | 419 ++++++++++++++++++ > arch/arm/boot/dts/tegra124.dtsi | 31 ++ > .../boot/dts/tegra20-acer-a500-picasso.dts | 5 + > arch/arm/boot/dts/tegra20-colibri.dtsi | 4 + > arch/arm/boot/dts/tegra20-paz00.dts | 4 + > .../arm/boot/dts/tegra20-peripherals-opp.dtsi | 109 +++++ > arch/arm/boot/dts/tegra20.dtsi | 33 +- > ...30-asus-nexus7-grouper-memory-timings.dtsi | 12 + > arch/arm/boot/dts/tegra30-ouya.dts | 8 + > .../arm/boot/dts/tegra30-peripherals-opp.dtsi | 383 ++++++++++++++++ > arch/arm/boot/dts/tegra30.dtsi | 33 +- > drivers/clk/tegra/Kconfig | 3 + > drivers/clk/tegra/Makefile | 2 +- > drivers/clk/tegra/clk-tegra124-emc.c | 41 +- > drivers/clk/tegra/clk-tegra124.c | 26 +- > drivers/clk/tegra/clk.h | 18 +- > drivers/devfreq/Kconfig | 10 - > drivers/devfreq/Makefile | 1 - > drivers/devfreq/tegra20-devfreq.c | 210 --------- > drivers/devfreq/tegra30-devfreq.c | 147 +++--- > drivers/gpu/drm/tegra/Kconfig | 1 + > drivers/gpu/drm/tegra/dc.c | 359 +++++++++++++++ > drivers/gpu/drm/tegra/dc.h | 19 + > drivers/gpu/drm/tegra/drm.c | 14 + > drivers/gpu/drm/tegra/hub.c | 3 + > drivers/gpu/drm/tegra/plane.c | 121 +++++ > drivers/gpu/drm/tegra/plane.h | 15 + > drivers/memory/tegra/Kconfig | 5 +- > drivers/memory/tegra/tegra124-emc.c | 377 ++++++++++++++-- > drivers/memory/tegra/tegra124.c | 82 +++- > drivers/memory/tegra/tegra20-emc.c | 48 +- > drivers/memory/tegra/tegra30-emc.c | 344 +++++++++++++- > drivers/memory/tegra/tegra30.c | 173 +++++++- > include/linux/clk/tegra.h | 8 + > include/soc/tegra/emc.h | 16 - > 41 files changed, 2725 insertions(+), 402 deletions(-) > create mode 100644 arch/arm/boot/dts/tegra124-peripherals-opp.dtsi > create mode 100644 arch/arm/boot/dts/tegra20-peripherals-opp.dtsi > create mode 100644 arch/arm/boot/dts/tegra30-peripherals-opp.dtsi > delete mode 100644 drivers/devfreq/tegra20-devfreq.c > delete mode 100644 include/soc/tegra/emc.h >
On 11/30/20 5:36 PM, Krzysztof Kozlowski wrote: > On Mon, Nov 30, 2020 at 05:44:39PM +0900, Chanwoo Choi wrote: >> Hi Dmitry, >> >> The v5.10-rc6 was released from linus git tree. >> Generally, I will send the pull-quest about devfreq to linux-pm.git maintainer >> after releasing the v5.1-rc7 for the integration test on linux-pm.git. >> >> The icc patches in this patch have not yet merged. If these patches >> are not merged before v5.10-rc7, Maybe, I'll apply the devfreq patches >> for v5.12-rc1. > > None of the patches here are going to be merged to Linus' in the current > cycle. They will only go to the next so if there is dependency, > everything will be broken and non-bisectable. > > However no such dependencies or merging requirements were mention in the > cover letter. Thanks for reply. The devfreq patch depends on the icc changes. I'll apply the devfreq patches on next time (v5.12-rc1). Thanks.