| Message ID | 20201116173141.31873-4-kishon@ti.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | PCI: J721E: Fix Broken DT w.r.t SYSCON DT | expand |
On Mon, Nov 16, 2020 at 11:01:41PM +0530, Kishon Vijay Abraham I wrote: > Remove "syscon" nodes added for pcieX_ctrl and have the PCIe node > point to the parent with an offset argument. This should say breaks compatibility, but that fine because ????. It only landed in 5.9 and a new platform I suppose. > > Link: http://lore.kernel.org/r/CAL_JsqKiUcO76bo1GoepWM1TusJWoty_BRy2hFSgtEVMqtrvvQ@mail.gmail.com Should have a Fixes tag IMO. > Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> > --- > arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 48 ++++------------------- > 1 file changed, 8 insertions(+), 40 deletions(-) > > diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > index 620e69e42974..23a0024dda79 100644 > --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > @@ -28,38 +28,6 @@ > #size-cells = <1>; > ranges = <0x0 0x0 0x00100000 0x1c000>; > > - pcie0_ctrl: syscon@4070 { > - compatible = "ti,j721e-system-controller", "syscon", "simple-mfd"; > - reg = <0x00004070 0x4>; > - #address-cells = <1>; > - #size-cells = <1>; > - ranges = <0x4070 0x4070 0x4>; > - }; > - > - pcie1_ctrl: syscon@4074 { > - compatible = "ti,j721e-system-controller", "syscon", "simple-mfd"; > - reg = <0x00004074 0x4>; > - #address-cells = <1>; > - #size-cells = <1>; > - ranges = <0x4074 0x4074 0x4>; > - }; > - > - pcie2_ctrl: syscon@4078 { > - compatible = "ti,j721e-system-controller", "syscon", "simple-mfd"; > - reg = <0x00004078 0x4>; > - #address-cells = <1>; > - #size-cells = <1>; > - ranges = <0x4078 0x4078 0x4>; > - }; > - > - pcie3_ctrl: syscon@407c { > - compatible = "ti,j721e-system-controller", "syscon", "simple-mfd"; > - reg = <0x0000407c 0x4>; > - #address-cells = <1>; > - #size-cells = <1>; > - ranges = <0x407c 0x407c 0x4>; > - }; > - > serdes_ln_ctrl: mux@4080 { > compatible = "mmio-mux"; > reg = <0x00004080 0x50>; > @@ -619,7 +587,7 @@ > interrupt-names = "link_state"; > interrupts = <GIC_SPI 318 IRQ_TYPE_EDGE_RISING>; > device_type = "pci"; > - ti,syscon-pcie-ctrl = <&pcie0_ctrl>; > + ti,syscon-pcie-ctrl = <&scm_conf 0x4070>; > max-link-speed = <3>; > num-lanes = <2>; > power-domains = <&k3_pds 239 TI_SCI_PD_EXCLUSIVE>; > @@ -646,7 +614,7 @@ > reg-names = "intd_cfg", "user_cfg", "reg", "mem"; > interrupt-names = "link_state"; > interrupts = <GIC_SPI 318 IRQ_TYPE_EDGE_RISING>; > - ti,syscon-pcie-ctrl = <&pcie0_ctrl>; > + ti,syscon-pcie-ctrl = <&scm_conf 0x4070>; > max-link-speed = <3>; > num-lanes = <2>; > power-domains = <&k3_pds 239 TI_SCI_PD_EXCLUSIVE>; > @@ -668,7 +636,7 @@ > interrupt-names = "link_state"; > interrupts = <GIC_SPI 330 IRQ_TYPE_EDGE_RISING>; > device_type = "pci"; > - ti,syscon-pcie-ctrl = <&pcie1_ctrl>; > + ti,syscon-pcie-ctrl = <&scm_conf 0x4074>; > max-link-speed = <3>; > num-lanes = <2>; > power-domains = <&k3_pds 240 TI_SCI_PD_EXCLUSIVE>; > @@ -695,7 +663,7 @@ > reg-names = "intd_cfg", "user_cfg", "reg", "mem"; > interrupt-names = "link_state"; > interrupts = <GIC_SPI 330 IRQ_TYPE_EDGE_RISING>; > - ti,syscon-pcie-ctrl = <&pcie1_ctrl>; > + ti,syscon-pcie-ctrl = <&scm_conf 0x4074>; > max-link-speed = <3>; > num-lanes = <2>; > power-domains = <&k3_pds 240 TI_SCI_PD_EXCLUSIVE>; > @@ -717,7 +685,7 @@ > interrupt-names = "link_state"; > interrupts = <GIC_SPI 342 IRQ_TYPE_EDGE_RISING>; > device_type = "pci"; > - ti,syscon-pcie-ctrl = <&pcie2_ctrl>; > + ti,syscon-pcie-ctrl = <&scm_conf 0x4078>; > max-link-speed = <3>; > num-lanes = <2>; > power-domains = <&k3_pds 241 TI_SCI_PD_EXCLUSIVE>; > @@ -744,7 +712,7 @@ > reg-names = "intd_cfg", "user_cfg", "reg", "mem"; > interrupt-names = "link_state"; > interrupts = <GIC_SPI 342 IRQ_TYPE_EDGE_RISING>; > - ti,syscon-pcie-ctrl = <&pcie2_ctrl>; > + ti,syscon-pcie-ctrl = <&scm_conf 0x4078>; > max-link-speed = <3>; > num-lanes = <2>; > power-domains = <&k3_pds 241 TI_SCI_PD_EXCLUSIVE>; > @@ -766,7 +734,7 @@ > interrupt-names = "link_state"; > interrupts = <GIC_SPI 354 IRQ_TYPE_EDGE_RISING>; > device_type = "pci"; > - ti,syscon-pcie-ctrl = <&pcie3_ctrl>; > + ti,syscon-pcie-ctrl = <&scm_conf 0x407c>; > max-link-speed = <3>; > num-lanes = <2>; > power-domains = <&k3_pds 242 TI_SCI_PD_EXCLUSIVE>; > @@ -793,7 +761,7 @@ > reg-names = "intd_cfg", "user_cfg", "reg", "mem"; > interrupt-names = "link_state"; > interrupts = <GIC_SPI 354 IRQ_TYPE_EDGE_RISING>; > - ti,syscon-pcie-ctrl = <&pcie3_ctrl>; > + ti,syscon-pcie-ctrl = <&scm_conf 0x407c>; > max-link-speed = <3>; > num-lanes = <2>; > power-domains = <&k3_pds 242 TI_SCI_PD_EXCLUSIVE>; > -- > 2.17.1 >
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi index 620e69e42974..23a0024dda79 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi @@ -28,38 +28,6 @@ #size-cells = <1>; ranges = <0x0 0x0 0x00100000 0x1c000>; - pcie0_ctrl: syscon@4070 { - compatible = "ti,j721e-system-controller", "syscon", "simple-mfd"; - reg = <0x00004070 0x4>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x4070 0x4070 0x4>; - }; - - pcie1_ctrl: syscon@4074 { - compatible = "ti,j721e-system-controller", "syscon", "simple-mfd"; - reg = <0x00004074 0x4>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x4074 0x4074 0x4>; - }; - - pcie2_ctrl: syscon@4078 { - compatible = "ti,j721e-system-controller", "syscon", "simple-mfd"; - reg = <0x00004078 0x4>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x4078 0x4078 0x4>; - }; - - pcie3_ctrl: syscon@407c { - compatible = "ti,j721e-system-controller", "syscon", "simple-mfd"; - reg = <0x0000407c 0x4>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x407c 0x407c 0x4>; - }; - serdes_ln_ctrl: mux@4080 { compatible = "mmio-mux"; reg = <0x00004080 0x50>; @@ -619,7 +587,7 @@ interrupt-names = "link_state"; interrupts = <GIC_SPI 318 IRQ_TYPE_EDGE_RISING>; device_type = "pci"; - ti,syscon-pcie-ctrl = <&pcie0_ctrl>; + ti,syscon-pcie-ctrl = <&scm_conf 0x4070>; max-link-speed = <3>; num-lanes = <2>; power-domains = <&k3_pds 239 TI_SCI_PD_EXCLUSIVE>; @@ -646,7 +614,7 @@ reg-names = "intd_cfg", "user_cfg", "reg", "mem"; interrupt-names = "link_state"; interrupts = <GIC_SPI 318 IRQ_TYPE_EDGE_RISING>; - ti,syscon-pcie-ctrl = <&pcie0_ctrl>; + ti,syscon-pcie-ctrl = <&scm_conf 0x4070>; max-link-speed = <3>; num-lanes = <2>; power-domains = <&k3_pds 239 TI_SCI_PD_EXCLUSIVE>; @@ -668,7 +636,7 @@ interrupt-names = "link_state"; interrupts = <GIC_SPI 330 IRQ_TYPE_EDGE_RISING>; device_type = "pci"; - ti,syscon-pcie-ctrl = <&pcie1_ctrl>; + ti,syscon-pcie-ctrl = <&scm_conf 0x4074>; max-link-speed = <3>; num-lanes = <2>; power-domains = <&k3_pds 240 TI_SCI_PD_EXCLUSIVE>; @@ -695,7 +663,7 @@ reg-names = "intd_cfg", "user_cfg", "reg", "mem"; interrupt-names = "link_state"; interrupts = <GIC_SPI 330 IRQ_TYPE_EDGE_RISING>; - ti,syscon-pcie-ctrl = <&pcie1_ctrl>; + ti,syscon-pcie-ctrl = <&scm_conf 0x4074>; max-link-speed = <3>; num-lanes = <2>; power-domains = <&k3_pds 240 TI_SCI_PD_EXCLUSIVE>; @@ -717,7 +685,7 @@ interrupt-names = "link_state"; interrupts = <GIC_SPI 342 IRQ_TYPE_EDGE_RISING>; device_type = "pci"; - ti,syscon-pcie-ctrl = <&pcie2_ctrl>; + ti,syscon-pcie-ctrl = <&scm_conf 0x4078>; max-link-speed = <3>; num-lanes = <2>; power-domains = <&k3_pds 241 TI_SCI_PD_EXCLUSIVE>; @@ -744,7 +712,7 @@ reg-names = "intd_cfg", "user_cfg", "reg", "mem"; interrupt-names = "link_state"; interrupts = <GIC_SPI 342 IRQ_TYPE_EDGE_RISING>; - ti,syscon-pcie-ctrl = <&pcie2_ctrl>; + ti,syscon-pcie-ctrl = <&scm_conf 0x4078>; max-link-speed = <3>; num-lanes = <2>; power-domains = <&k3_pds 241 TI_SCI_PD_EXCLUSIVE>; @@ -766,7 +734,7 @@ interrupt-names = "link_state"; interrupts = <GIC_SPI 354 IRQ_TYPE_EDGE_RISING>; device_type = "pci"; - ti,syscon-pcie-ctrl = <&pcie3_ctrl>; + ti,syscon-pcie-ctrl = <&scm_conf 0x407c>; max-link-speed = <3>; num-lanes = <2>; power-domains = <&k3_pds 242 TI_SCI_PD_EXCLUSIVE>; @@ -793,7 +761,7 @@ reg-names = "intd_cfg", "user_cfg", "reg", "mem"; interrupt-names = "link_state"; interrupts = <GIC_SPI 354 IRQ_TYPE_EDGE_RISING>; - ti,syscon-pcie-ctrl = <&pcie3_ctrl>; + ti,syscon-pcie-ctrl = <&scm_conf 0x407c>; max-link-speed = <3>; num-lanes = <2>; power-domains = <&k3_pds 242 TI_SCI_PD_EXCLUSIVE>;
Remove "syscon" nodes added for pcieX_ctrl and have the PCIe node point to the parent with an offset argument. Link: http://lore.kernel.org/r/CAL_JsqKiUcO76bo1GoepWM1TusJWoty_BRy2hFSgtEVMqtrvvQ@mail.gmail.com Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> --- arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 48 ++++------------------- 1 file changed, 8 insertions(+), 40 deletions(-) -- 2.17.1