diff mbox

[[PATCH,v2,6/6] ARM: mx5: use generic function for displaying silicon revision

Message ID 1314162277-2840-7-git-send-email-jason.hui@linaro.org
State New
Headers show

Commit Message

Jason Hui Aug. 24, 2011, 5:04 a.m. UTC 
Update to use generic function for displaying silicon revision

Signed-off-by: Jason Liu <jason.hui@linaro.org>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
---
 arch/arm/mach-mx5/clock-mx51-mx53.c |    6 +--
 arch/arm/mach-mx5/cpu.c             |   74 ++++++++---------------------------
 2 files changed, 19 insertions(+), 61 deletions(-)

Comments

Sascha Hauer Aug. 25, 2011, 2:51 p.m. UTC | #1 
On Wed, Aug 24, 2011 at 01:04:37PM +0800, Jason Liu wrote:
> Update to use generic function for displaying silicon revision
> 
> Signed-off-by: Jason Liu <jason.hui@linaro.org>
> Cc: Fabio Estevam <fabio.estevam@freescale.com>
> Cc: Sascha Hauer <s.hauer@pengutronix.de>
> ---
>  arch/arm/mach-mx5/clock-mx51-mx53.c |    6 +--
>  arch/arm/mach-mx5/cpu.c             |   74 ++++++++---------------------------
>  2 files changed, 19 insertions(+), 61 deletions(-)
> 
> diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c
> index f7bf996..0e23e1d 100644
> --- a/arch/arm/mach-mx5/clock-mx51-mx53.c
> +++ b/arch/arm/mach-mx5/clock-mx51-mx53.c
> @@ -1548,9 +1548,8 @@ int __init mx51_clocks_init(unsigned long ckil, unsigned long osc,
>  	clk_enable(&main_bus_clk);
>  
>  	clk_enable(&iim_clk);
> -	mx51_revision();
> +	imx_print_silicon_rev("i.MX51", mx51_revision());
>  	clk_disable(&iim_clk);
> -	mx51_display_revision();
>  
>  	/* move usb_phy_clk to 24MHz */
>  	clk_set_parent(&usb_phy1_clk, &osc_clk);
> @@ -1592,9 +1591,8 @@ int __init mx53_clocks_init(unsigned long ckil, unsigned long osc,
>  	clk_enable(&main_bus_clk);
>  
>  	clk_enable(&iim_clk);
> -	mx53_revision();
> +	imx_print_silicon_rev("i.MX53", mx53_revision());
>  	clk_disable(&iim_clk);
> -	mx53_display_revision();
>  
>  	/* Set SDHC parents to be PLL2 */
>  	clk_set_parent(&esdhc1_clk, &pll2_sw_clk);
> diff --git a/arch/arm/mach-mx5/cpu.c b/arch/arm/mach-mx5/cpu.c
> index 86f87da..df46967 100644
> --- a/arch/arm/mach-mx5/cpu.c
> +++ b/arch/arm/mach-mx5/cpu.c
> @@ -18,7 +18,7 @@
>  #include <mach/hardware.h>
>  #include <asm/io.h>
>  
> -static int cpu_silicon_rev = -1;
> +static int mx5_cpu_rev = -1;
>  
>  #define IIM_SREV 0x24
>  #define MX50_HW_ADADIG_DIGPROG	0xB0
> @@ -28,11 +28,14 @@ static int get_mx51_srev(void)
>  	void __iomem *iim_base = MX51_IO_ADDRESS(MX51_IIM_BASE_ADDR);
>  	u32 rev = readl(iim_base + IIM_SREV) & 0xff;
>  
> -	if (rev == 0x0)
> +	switch (rev) {
> +	case 0x0:
>  		return IMX_CHIP_REVISION_2_0;
> -	else if (rev == 0x10)
> +	case 0x2:
>  		return IMX_CHIP_REVISION_3_0;

0x2 != 0x10

My babbage board now shows a unknown cpu revision.

Sascha
Fabio Estevam Aug. 25, 2011, 3:20 p.m. UTC | #2 
Sascha,

On Thu, Aug 25, 2011 at 11:51 AM, Sascha Hauer <s.hauer@pengutronix.de> wrote:

>> -     if (rev == 0x0)
>> +     switch (rev) {
>> +     case 0x0:
>>               return IMX_CHIP_REVISION_2_0;
>> -     else if (rev == 0x10)
>> +     case 0x2:
>>               return IMX_CHIP_REVISION_3_0;
>
> 0x2 != 0x10
>
> My babbage board now shows a unknown cpu revision.

Just sent a patch to fix this.

Regards,

Fabio Estevam
diff mbox

Patch

diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c
index f7bf996..0e23e1d 100644
--- a/arch/arm/mach-mx5/clock-mx51-mx53.c
+++ b/arch/arm/mach-mx5/clock-mx51-mx53.c
@@ -1548,9 +1548,8 @@  int __init mx51_clocks_init(unsigned long ckil, unsigned long osc,
 	clk_enable(&main_bus_clk);
 
 	clk_enable(&iim_clk);
-	mx51_revision();
+	imx_print_silicon_rev("i.MX51", mx51_revision());
 	clk_disable(&iim_clk);
-	mx51_display_revision();
 
 	/* move usb_phy_clk to 24MHz */
 	clk_set_parent(&usb_phy1_clk, &osc_clk);
@@ -1592,9 +1591,8 @@  int __init mx53_clocks_init(unsigned long ckil, unsigned long osc,
 	clk_enable(&main_bus_clk);
 
 	clk_enable(&iim_clk);
-	mx53_revision();
+	imx_print_silicon_rev("i.MX53", mx53_revision());
 	clk_disable(&iim_clk);
-	mx53_display_revision();
 
 	/* Set SDHC parents to be PLL2 */
 	clk_set_parent(&esdhc1_clk, &pll2_sw_clk);
diff --git a/arch/arm/mach-mx5/cpu.c b/arch/arm/mach-mx5/cpu.c
index 86f87da..df46967 100644
--- a/arch/arm/mach-mx5/cpu.c
+++ b/arch/arm/mach-mx5/cpu.c
@@ -18,7 +18,7 @@ 
 #include <mach/hardware.h>
 #include <asm/io.h>
 
-static int cpu_silicon_rev = -1;
+static int mx5_cpu_rev = -1;
 
 #define IIM_SREV 0x24
 #define MX50_HW_ADADIG_DIGPROG	0xB0
@@ -28,11 +28,14 @@  static int get_mx51_srev(void)
 	void __iomem *iim_base = MX51_IO_ADDRESS(MX51_IIM_BASE_ADDR);
 	u32 rev = readl(iim_base + IIM_SREV) & 0xff;
 
-	if (rev == 0x0)
+	switch (rev) {
+	case 0x0:
 		return IMX_CHIP_REVISION_2_0;
-	else if (rev == 0x10)
+	case 0x2:
 		return IMX_CHIP_REVISION_3_0;
-	return 0;
+	default:
+		return IMX_CHIP_REVISION_UNKNOWN;
+	}
 }
 
 /*
@@ -45,33 +48,13 @@  int mx51_revision(void)
 	if (!cpu_is_mx51())
 		return -EINVAL;
 
-	if (cpu_silicon_rev == -1)
-		cpu_silicon_rev = get_mx51_srev();
+	if (mx5_cpu_rev == -1)
+		mx5_cpu_rev = get_mx51_srev();
 
-	return cpu_silicon_rev;
+	return mx5_cpu_rev;
 }
 EXPORT_SYMBOL(mx51_revision);
 
-void mx51_display_revision(void)
-{
-	int rev;
-	char *srev;
-	rev = mx51_revision();
-
-	switch (rev) {
-	case IMX_CHIP_REVISION_2_0:
-		srev = IMX_CHIP_REVISION_2_0_STRING;
-		break;
-	case IMX_CHIP_REVISION_3_0:
-		srev = IMX_CHIP_REVISION_3_0_STRING;
-		break;
-	default:
-		srev = IMX_CHIP_REVISION_UNKNOWN_STRING;
-	}
-	printk(KERN_INFO "CPU identified as i.MX51, silicon rev %s\n", srev);
-}
-EXPORT_SYMBOL(mx51_display_revision);
-
 #ifdef CONFIG_NEON
 
 /*
@@ -121,10 +104,10 @@  int mx53_revision(void)
 	if (!cpu_is_mx53())
 		return -EINVAL;
 
-	if (cpu_silicon_rev == -1)
-		cpu_silicon_rev = get_mx53_srev();
+	if (mx5_cpu_rev == -1)
+		mx5_cpu_rev = get_mx53_srev();
 
-	return cpu_silicon_rev;
+	return mx5_cpu_rev;
 }
 EXPORT_SYMBOL(mx53_revision);
 
@@ -134,7 +117,7 @@  static int get_mx50_srev(void)
 	u32 rev;
 
 	if (!anatop) {
-		cpu_silicon_rev = -EINVAL;
+		mx5_cpu_rev = -EINVAL;
 		return 0;
 	}
 
@@ -159,36 +142,13 @@  int mx50_revision(void)
 	if (!cpu_is_mx50())
 		return -EINVAL;
 
-	if (cpu_silicon_rev == -1)
-		cpu_silicon_rev = get_mx50_srev();
+	if (mx5_cpu_rev == -1)
+		mx5_cpu_rev = get_mx50_srev();
 
-	return cpu_silicon_rev;
+	return mx5_cpu_rev;
 }
 EXPORT_SYMBOL(mx50_revision);
 
-void mx53_display_revision(void)
-{
-	int rev;
-	char *srev;
-	rev = mx53_revision();
-
-	switch (rev) {
-	case IMX_CHIP_REVISION_1_0:
-		srev = IMX_CHIP_REVISION_1_0_STRING;
-		break;
-	case IMX_CHIP_REVISION_2_0:
-		srev = IMX_CHIP_REVISION_2_0_STRING;
-		break;
-	case IMX_CHIP_REVISION_2_1:
-		srev = IMX_CHIP_REVISION_2_1_STRING;
-		break;
-	default:
-		srev = IMX_CHIP_REVISION_UNKNOWN_STRING;
-	}
-	printk(KERN_INFO "CPU identified as i.MX53, silicon rev %s\n", srev);
-}
-EXPORT_SYMBOL(mx53_display_revision);
-
 static int __init post_cpu_init(void)
 {
 	unsigned int reg;