| Message ID | 20201102105802.39332-1-remi.denis.courmont@huawei.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [01/14] target/arm: add arm_is_el2_enabled() helper | expand |
On Mon, 2 Nov 2020 at 10:58, <remi.denis.courmont@huawei.com> wrote: > > From: Rémi Denis-Courmont <remi.denis.courmont@huawei.com> > > This checks if EL2 is enabled (meaning EL2 registers take effects) in > the current security context. > > Signed-off-by: Rémi Denis-Courmont <remi.denis.courmont@huawei.com> > --- > target/arm/cpu.h | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > > diff --git a/target/arm/cpu.h b/target/arm/cpu.h > index c18a916766..aaf3671806 100644 > --- a/target/arm/cpu.h > +++ b/target/arm/cpu.h > @@ -2040,6 +2040,15 @@ static inline bool arm_is_secure(CPUARMState *env) > return arm_is_secure_below_el3(env); > } > > +/* Return true if the current security state has AArch64 EL2 or AArch32 Hyp */ > +static inline bool arm_is_el2_enabled(CPUARMState *env) > +{ > + if (arm_feature(env, ARM_FEATURE_EL2)) { > + return !arm_is_secure_below_el3(env); > + } > + return false; You could usefully add a comment mentioning the EL2Enabled() pseudocode and that we'll need to adjust this if we implement Secure EL2 in future. thanks -- PMM
On Mon, 2 Nov 2020 at 11:06, Peter Maydell <peter.maydell@linaro.org> wrote: > > On Mon, 2 Nov 2020 at 10:58, <remi.denis.courmont@huawei.com> wrote: > > > > From: Rémi Denis-Courmont <remi.denis.courmont@huawei.com> > > > > This checks if EL2 is enabled (meaning EL2 registers take effects) in > > the current security context. > > > > Signed-off-by: Rémi Denis-Courmont <remi.denis.courmont@huawei.com> > > --- > > target/arm/cpu.h | 14 ++++++++++++++ > > 1 file changed, 14 insertions(+) > > > > diff --git a/target/arm/cpu.h b/target/arm/cpu.h > > index c18a916766..aaf3671806 100644 > > --- a/target/arm/cpu.h > > +++ b/target/arm/cpu.h > > @@ -2040,6 +2040,15 @@ static inline bool arm_is_secure(CPUARMState *env) > > return arm_is_secure_below_el3(env); > > } > > > > +/* Return true if the current security state has AArch64 EL2 or AArch32 Hyp */ > > +static inline bool arm_is_el2_enabled(CPUARMState *env) > > +{ > > + if (arm_feature(env, ARM_FEATURE_EL2)) { > > + return !arm_is_secure_below_el3(env); > > + } > > + return false; > > You could usefully add a comment mentioning the EL2Enabled() > pseudocode and that we'll need to adjust this if we implement > Secure EL2 in future. I replied to this before the cover letter explaining what the series is doing arrived in my inbox, so the second part of my suggestion would be a bit pointless. The first part (mentioning the name of the pseudocode function) still seems worth doing. thanks -- PMM
Hi, > I replied to this before the cover letter explaining what the series > is doing arrived in my inbox, so the second part of my suggestion > would be a bit pointless. The first part (mentioning the name of > the pseudocode function) still seems worth doing. Yeah well, some spam filter seems to helped itself to the original cover letter, had to resend it, so I figured. And then it seems I made a booboo and accidentally dropped the first patch in the series, handling HCR.{F,I}MO bits.
On 11/2/20 2:57 AM, remi.denis.courmont@huawei.com wrote: > From: Rémi Denis-Courmont <remi.denis.courmont@huawei.com> > > This checks if EL2 is enabled (meaning EL2 registers take effects) in > the current security context. > > Signed-off-by: Rémi Denis-Courmont <remi.denis.courmont@huawei.com> > --- > target/arm/cpu.h | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index c18a916766..aaf3671806 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -2040,6 +2040,15 @@ static inline bool arm_is_secure(CPUARMState *env) return arm_is_secure_below_el3(env); } +/* Return true if the current security state has AArch64 EL2 or AArch32 Hyp */ +static inline bool arm_is_el2_enabled(CPUARMState *env) +{ + if (arm_feature(env, ARM_FEATURE_EL2)) { + return !arm_is_secure_below_el3(env); + } + return false; +} + #else static inline bool arm_is_secure_below_el3(CPUARMState *env) { @@ -2050,6 +2059,11 @@ static inline bool arm_is_secure(CPUARMState *env) { return false; } + +static inline bool arm_is_el2_enabled(CPUARMState *env) +{ + return false; +} #endif /**