| Message ID | 2f7f2621dda197492b848fcf186f1cb6fb3eb53d.1603467169.git.alistair.francis@wdc.com |
|---|---|
| State | New |
| Headers | show |
| Series | RISC-V: Start to remove xlen preprocess | expand |
On Fri, Oct 23, 2020 at 11:44 PM Alistair Francis <alistair.francis@wdc.com> wrote: > > Signed-off-by: Alistair Francis <alistair.francis@wdc.com> > --- > include/hw/riscv/spike.h | 6 ------ > hw/riscv/spike.c | 2 +- > 2 files changed, 1 insertion(+), 7 deletions(-) > Reviewed-by: Bin Meng <bin.meng@windriver.com>
diff --git a/include/hw/riscv/spike.h b/include/hw/riscv/spike.h index cddeca2e77..cdd1a13011 100644 --- a/include/hw/riscv/spike.h +++ b/include/hw/riscv/spike.h @@ -47,10 +47,4 @@ enum { SPIKE_DRAM }; -#if defined(TARGET_RISCV32) -#define SPIKE_V1_10_0_CPU TYPE_RISCV_CPU_BASE32 -#elif defined(TARGET_RISCV64) -#define SPIKE_V1_10_0_CPU TYPE_RISCV_CPU_BASE64 -#endif - #endif diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c index facac6e7d2..29f07f47b1 100644 --- a/hw/riscv/spike.c +++ b/hw/riscv/spike.c @@ -317,7 +317,7 @@ static void spike_machine_class_init(ObjectClass *oc, void *data) mc->init = spike_board_init; mc->max_cpus = SPIKE_CPUS_MAX; mc->is_default = true; - mc->default_cpu_type = SPIKE_V1_10_0_CPU; + mc->default_cpu_type = TYPE_RISCV_CPU_BASE; mc->possible_cpu_arch_ids = riscv_numa_possible_cpu_arch_ids; mc->cpu_index_to_instance_props = riscv_numa_cpu_index_to_props; mc->get_default_cpu_node_id = riscv_numa_get_default_cpu_node_id;
Signed-off-by: Alistair Francis <alistair.francis@wdc.com> --- include/hw/riscv/spike.h | 6 ------ hw/riscv/spike.c | 2 +- 2 files changed, 1 insertion(+), 7 deletions(-)