| Message ID | 20200929145152.v1.1.I7900a579743ce0fc5fe382213612b5af29e3706f@changeid |
|---|---|
| State | New |
| Headers | show |
| Series | [v1] arm: socfpga: fix Gen5 enable of EMAC via FPGA | expand |
On Tue, Sep 29, 2020 at 02:52:05PM -0400, Ralph Siemsen wrote: >Fixes: db5741f7a85ec3ee79b64496172afaa7dc2cb225 ("arm: socfpga: Convert >system manager from struct to defines") Just curious if you have had a chance to look over this patch? http://patchwork.ozlabs.org/project/uboot/patch/20200929145152.v1.1.I7900a579743ce0fc5fe382213612b5af29e3706f@changeid/ It fixes a problem introduced here: https://gitlab.denx.de/u-boot/u-boot/-/commit/db5741f7a85ec3ee79b64496172afaa7dc2cb225?view=parallel#fd949530559c32d01169ed7f0667e63ab210fe14_16_16 after which one of the GMAC on Gen 5 devices no longer operates at 100mbit. Thanks, Ralph
> -----Original Message----- > From: Ralph Siemsen <ralph.siemsen@linaro.org> > Sent: Tuesday, October 20, 2020 1:43 AM > To: Tan, Ley Foon <ley.foon.tan@intel.com> > Cc: Dinh Nguyen <dinguyen@kernel.org>; Marek Vasut <marex@denx.de>; > Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>; u- > boot@lists.denx.de; Tom Rini <trini@konsulko.com> > Subject: Re: [PATCH v1] arm: socfpga: fix Gen5 enable of EMAC via FPGA > > On Tue, Sep 29, 2020 at 02:52:05PM -0400, Ralph Siemsen wrote: > >Fixes: db5741f7a85ec3ee79b64496172afaa7dc2cb225 ("arm: socfpga: > Convert > >system manager from struct to defines") > > Just curious if you have had a chance to look over this patch? > http://patchwork.ozlabs.org/project/uboot/patch/20200929145152.v1.1.I79 > 00a579743ce0fc5fe382213612b5af29e3706f@changeid/ > > It fixes a problem introduced here: > https://gitlab.denx.de/u-boot/u-boot/- > /commit/db5741f7a85ec3ee79b64496172afaa7dc2cb225?view=parallel#fd9 > 49530559c32d01169ed7f0667e63ab210fe14_16_16 > after which one of the GMAC on Gen 5 devices no longer operates at > 100mbit. > > Thanks, > Ralph Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com> Thanks for the patch, will merge this to next -rc. Regards Ley Foon
diff --git a/arch/arm/mach-socfpga/include/mach/system_manager_gen5.h b/arch/arm/mach-socfpga/include/mach/system_manager_gen5.h index 90cb465d13..a63a4ee27d 100644 --- a/arch/arm/mach-socfpga/include/mach/system_manager_gen5.h +++ b/arch/arm/mach-socfpga/include/mach/system_manager_gen5.h @@ -26,9 +26,9 @@ void sysmgr_get_pinmux_table(const u8 **table, unsigned int *table_len); #define SYSMGR_GEN5_ECCGRP_OCRAM 0x144 #define SYSMGR_GEN5_EMACIO 0x400 #define SYSMGR_GEN5_NAND_USEFPGA 0x6f0 -#define SYSMGR_GEN5_RGMII0_USEFPGA 0x6f8 +#define SYSMGR_GEN5_RGMII1_USEFPGA 0x6f8 #define SYSMGR_GEN5_SDMMC_USEFPGA 0x708 -#define SYSMGR_GEN5_RGMII1_USEFPGA 0x704 +#define SYSMGR_GEN5_RGMII0_USEFPGA 0x714 #define SYSMGR_GEN5_SPIM1_USEFPGA 0x730 #define SYSMGR_GEN5_SPIM0_USEFPGA 0x738
An earlier conversion from struct to defines introduced two errors, both related to setup of EMAC routed via the FPGA. One of the offsets was incorrect, and the EMAC0/EMAC1 were swapped. The effect of this was rather odd: both ports could operate at gigabit, but one of them would fail to transmit when operating at 100Mbit. Fixes: db5741f7a85ec3ee79b64496172afaa7dc2cb225 ("arm: socfpga: Convert system manager from struct to defines") Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org> --- I reviewed the other #defines for gen5 and they seem correct. I have NOT checked the defines for Arria 10 or Stratix 10! arch/arm/mach-socfpga/include/mach/system_manager_gen5.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.17.1