diff mbox series

[RFC,06/12] hw/arm/virt-acpi-build: distinguish possible and present cpus

Message ID 20200917032033.2020-7-fangying1@huawei.com
State New
Headers show
Series hw/arm/virt: Introduce cpu and cache topology support | expand

Commit Message

Ying Fang Sept. 17, 2020, 3:20 a.m. UTC 
When building ACPI tables regarding CPUs we should always build
them for the number of possible CPUs, not the number of present
CPUs. We then ensure only the present CPUs are enabled.

Signed-off-by: Andrew Jones <drjones@redhat.com>
Signed-off-by: Ying Fang <fangying1@huawei.com>
---
 hw/arm/virt-acpi-build.c | 17 ++++++++++++-----
 1 file changed, 12 insertions(+), 5 deletions(-)

Comments

Andrew Jones Sept. 17, 2020, 8:20 a.m. UTC | #1 
On Thu, Sep 17, 2020 at 11:20:27AM +0800, Ying Fang wrote:
> When building ACPI tables regarding CPUs we should always build

> them for the number of possible CPUs, not the number of present

> CPUs. We then ensure only the present CPUs are enabled.

> 

> Signed-off-by: Andrew Jones <drjones@redhat.com>

> Signed-off-by: Ying Fang <fangying1@huawei.com>

> ---

>  hw/arm/virt-acpi-build.c | 17 ++++++++++++-----

>  1 file changed, 12 insertions(+), 5 deletions(-)


I approached this in a different way in the refresh, so the this patch
was dropped, but the refresh is completely untested, so something similar
may still be necessary.

Thanks,
drew
Ying Fang Sept. 17, 2020, 1:58 p.m. UTC | #2 
On 9/17/2020 4:20 PM, Andrew Jones wrote:
> On Thu, Sep 17, 2020 at 11:20:27AM +0800, Ying Fang wrote:

>> When building ACPI tables regarding CPUs we should always build

>> them for the number of possible CPUs, not the number of present

>> CPUs. We then ensure only the present CPUs are enabled.

>>

>> Signed-off-by: Andrew Jones <drjones@redhat.com>

>> Signed-off-by: Ying Fang <fangying1@huawei.com>

>> ---

>>   hw/arm/virt-acpi-build.c | 17 ++++++++++++-----

>>   1 file changed, 12 insertions(+), 5 deletions(-)

> 

> I approached this in a different way in the refresh, so the this patch

> was dropped, but the refresh is completely untested, so something similar

> may still be necessary.


Nice work, I'll open it and take a look.
Thanks.
> 

> Thanks,

> drew

> 

> .

>
diff mbox series

Patch

diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index 9efd7a3881..f1d574b5d3 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -56,14 +56,18 @@ 
 
 #define ARM_SPI_BASE 32
 
-static void acpi_dsdt_add_cpus(Aml *scope, int smp_cpus)
+static void acpi_dsdt_add_cpus(Aml *scope, VirtMachineState *vms)
 {
     uint16_t i;
+    CPUArchIdList *possible_cpus = MACHINE(vms)->possible_cpus;
 
-    for (i = 0; i < smp_cpus; i++) {
+    for (i = 0; i < possible_cpus->len; i++) {
         Aml *dev = aml_device("C%.03X", i);
         aml_append(dev, aml_name_decl("_HID", aml_string("ACPI0007")));
         aml_append(dev, aml_name_decl("_UID", aml_int(i)));
+        if (possible_cpus->cpus[i].cpu == NULL) {
+            aml_append(dev, aml_name_decl("_STA", aml_int(0)));
+        }
         aml_append(scope, dev);
     }
 }
@@ -635,6 +639,7 @@  build_madt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
     const int *irqmap = vms->irqmap;
     AcpiMadtGenericDistributor *gicd;
     AcpiMadtGenericMsiFrame *gic_msi;
+    int possible_cpus = MACHINE(vms)->possible_cpus->len;
     int i;
 
     acpi_data_push(table_data, sizeof(AcpiMultipleApicTable));
@@ -645,7 +650,7 @@  build_madt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
     gicd->base_address = cpu_to_le64(memmap[VIRT_GIC_DIST].base);
     gicd->version = vms->gic_version;
 
-    for (i = 0; i < vms->smp_cpus; i++) {
+    for (i = 0; i < possible_cpus; i++) {
         AcpiMadtGenericCpuInterface *gicc = acpi_data_push(table_data,
                                                            sizeof(*gicc));
         ARMCPU *armcpu = ARM_CPU(qemu_get_cpu(i));
@@ -660,7 +665,9 @@  build_madt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
         gicc->cpu_interface_number = cpu_to_le32(i);
         gicc->arm_mpidr = cpu_to_le64(armcpu->mp_affinity);
         gicc->uid = cpu_to_le32(i);
-        gicc->flags = cpu_to_le32(ACPI_MADT_GICC_ENABLED);
+        if (i < vms->smp_cpus) {
+            gicc->flags = cpu_to_le32(ACPI_MADT_GICC_ENABLED);
+        }
 
         if (arm_feature(&armcpu->env, ARM_FEATURE_PMU)) {
             gicc->performance_interrupt = cpu_to_le32(PPI(VIRTUAL_PMU_IRQ));
@@ -764,7 +771,7 @@  build_dsdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
      * the RTC ACPI device at all when using UEFI.
      */
     scope = aml_scope("\\_SB");
-    acpi_dsdt_add_cpus(scope, vms->smp_cpus);
+    acpi_dsdt_add_cpus(scope, vms);
     acpi_dsdt_add_uart(scope, &memmap[VIRT_UART],
                        (irqmap[VIRT_UART] + ARM_SPI_BASE));
     if (vmc->acpi_expose_flash) {