| Message ID | 20200916004638.2444147-6-richard.henderson@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | qom: Allow object to be aligned | expand |
On Tue, Sep 15, 2020 at 5:47 PM Richard Henderson <richard.henderson@linaro.org> wrote: > > Fix alignment of CPURISCVState.vreg. > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > Cc: Alistair Francis <Alistair.Francis@wdc.com> > Cc: qemu-riscv@nongnu.org > --- > target/riscv/cpu.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c > index 57c006df5d..0bbfd7f457 100644 > --- a/target/riscv/cpu.c > +++ b/target/riscv/cpu.c > @@ -628,6 +628,7 @@ static const TypeInfo riscv_cpu_type_infos[] = { > .name = TYPE_RISCV_CPU, > .parent = TYPE_CPU, > .instance_size = sizeof(RISCVCPU), > + .instance_align = __alignof__(RISCVCPU), > .instance_init = riscv_cpu_init, > .abstract = true, > .class_size = sizeof(RISCVCPUClass), > -- > 2.25.1 > >
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 57c006df5d..0bbfd7f457 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -628,6 +628,7 @@ static const TypeInfo riscv_cpu_type_infos[] = { .name = TYPE_RISCV_CPU, .parent = TYPE_CPU, .instance_size = sizeof(RISCVCPU), + .instance_align = __alignof__(RISCVCPU), .instance_init = riscv_cpu_init, .abstract = true, .class_size = sizeof(RISCVCPUClass),
Fix alignment of CPURISCVState.vreg. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- Cc: Alistair Francis <Alistair.Francis@wdc.com> Cc: qemu-riscv@nongnu.org --- target/riscv/cpu.c | 1 + 1 file changed, 1 insertion(+)